Document the device tree bindings for the Canaan Kendryte K210 SoC
Fully Programmable IO Array (FPIOA) pinctrl driver in
Documentation/devicetree/bindings/pinctrl/canaan,k210-fpioa.yaml. The
new header file include/dt-bindings/pinctrl/k210-fpioa.h is added to
define all 256 possible pin functions of the SoC IO pins, as well as
macros simplifying the definition of pin functions in a device tree.
Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
I had queued up a batch of fixes that got a bit close to the release for
sending in before the merge window opened, so I'm including them in the
batch of pull requests instead. They're mostly smaller DT tweaks and
fixes, the usual mix that we tend to have through the releases.
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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC fixes from Olof Johansson:
"I had queued up a batch of fixes that got a bit close to the release
for sending in before the merge window opened, so I'm including them
in the merge window batch instead.
Mostly smaller DT tweaks and fixes, the usual mix that we tend to have
through the releases"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
ARM: dts: iwg20d-q7-common: Fix touch controller probe failure
ARM: OMAP2+: Restore MPU power domain if cpu_cluster_pm_enter() fails
ARM: dts: am33xx: modify AM33XX_IOPAD for #pinctrl-cells = 2
soc: actions: include header to fix missing prototype
arm64: dts: ti: k3-j721e: Rename mux header and update macro names
soc: qcom: pdr: Fixup array type of get_domain_list_resp message
arm64: dts: qcom: pm660: Fix missing pound sign in interrupt-cells
arm64: dts: qcom: kitakami: Temporarily disable SDHCI1
arm64: dts: sdm630: Temporarily disable SMMUs by default
arm64: dts: sdm845: Fixup OPP table for all qup devices
arm64: dts: allwinner: h5: remove Mali GPU PMU module
ARM: dts: sun8i: r40: bananapi-m2-ultra: Fix dcdc1 regulator
soc: xilinx: Fix error code in zynqmp_pm_probe()
Modify the AM33XX_IOPAD macro so that it works now that #pinctrl-cells =
<2>. The third parameter is just a zero and the pinctrl-single driver
will just OR this with the second parameter so it has no actual effect.
There are no longer any dts files using this macro (following my patch
to am335x-guardian.dts), but this will keep dts files not in mainline
from breaking.
Fixes: 27c90e5e48 ("ARM: dts: am33xx-l4: change #pinctrl-cells from 1 to 2")
Suggested-by: Tony Lindgren <tony@atomide.com>
Reported-by: Trent Piepho <tpiepho@gmail.com>
Link: https://lore.kernel.org/linux-devicetree/20200921064707.GN7101@atomide.com/
Signed-off-by: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
kernel series:
Core changes:
- The GPIO patch "gpiolib: Introduce
for_each_requested_gpio_in_range() macro" was put in an
immutable branch and merged into the pinctrl tree as well.
We see these changes also here.
- Improved debug output for pins used as GPIO.
New drivers:
- Ocelot Sparx5 SoC driver.
- Intel Emmitsburg SoC subdriver.
- Intel Tiger Lake-H SoC subdriver.
- Qualcomm PM660 SoC subdriver.
- Renesas SH-PFC R8A774E1 subdriver.
Driver improvements:
- Linear improvement and cleanups of the Intel drivers for
Cherryview, Lynxpoint, Baytrail etc. Improved locking among
other things.
- Renesas SH-PFC has added support for RPC pins, groups, and
functions to r8a77970 and r8a77980.
- The newere Freescale (now NXP) i.MX8 pin controllers have
been modularized. This is driven by the Google Android
GKI initiative I think.
- Open drain support for pins on the Qualcomm IPQ4019.
- The Ingenic driver can handle both edges IRQ detection.
- A big slew of documentation fixes all over the place.
- A few irqchip template conversions by yours truly.
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Merge tag 'pinctrl-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is the bulk of the pin control changes for the v5.9 kernel
series:
Core changes:
- The GPIO patch "gpiolib: Introduce for_each_requested_gpio_in_range()
macro" was put in an immutable branch and merged into the pinctrl
tree as well. We see these changes also here.
- Improved debug output for pins used as GPIO.
New drivers:
- Ocelot Sparx5 SoC driver.
- Intel Emmitsburg SoC subdriver.
- Intel Tiger Lake-H SoC subdriver.
- Qualcomm PM660 SoC subdriver.
- Renesas SH-PFC R8A774E1 subdriver.
Driver improvements:
- Linear improvement and cleanups of the Intel drivers for
Cherryview, Lynxpoint, Baytrail etc. Improved locking among other
things.
- Renesas SH-PFC has added support for RPC pins, groups, and
functions to r8a77970 and r8a77980.
- The newere Freescale (now NXP) i.MX8 pin controllers have been
modularized. This is driven by the Google Android GKI initiative I
think.
- Open drain support for pins on the Qualcomm IPQ4019.
- The Ingenic driver can handle both edges IRQ detection.
- A big slew of documentation fixes all over the place.
- A few irqchip template conversions by yours truly.
* tag 'pinctrl-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (107 commits)
dt-bindings: pinctrl: add bindings for MediaTek MT6779 SoC
pinctrl: stmfx: Use irqchip template
pinctrl: amd: Use irqchip template
pinctrl: mediatek: fix build for tristate changes
pinctrl: samsung: Use bank name as irqchip name
pinctrl: core: print gpio in pins debugfs file
pinctrl: mediatek: add mt6779 eint support
pinctrl: mediatek: add pinctrl support for MT6779 SoC
pinctrl: mediatek: avoid virtual gpio trying to set reg
pinctrl: mediatek: update pinmux definitions for mt6779
pinctrl: stm32: use the hwspin_lock_timeout_in_atomic() API
pinctrl: mcp23s08: Use irqchip template
pinctrl: sx150x: Use irqchip template
dt-bindings: ingenic,pinctrl: Support pinmux/pinconf nodes
pinctrl: intel: Add Intel Emmitsburg pin controller support
pinctl: ti: iodelay: Replace HTTP links with HTTPS ones
Revert "gpio: omap: handle pin config bias flags"
pinctrl: single: Use fallthrough pseudo-keyword
pinctrl: qcom: spmi-gpio: Use fallthrough pseudo-keyword
pinctrl: baytrail: Use fallthrough pseudo-keyword
...
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.
Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Increase #pinctrl-cells to 2 so that mux and conf be kept separate. This
requires the AM33XX_PADCONF macro in omap.h to also be modified to keep pin
conf and pin mux values separate.
Signed-off-by: Drew Fustini <drew@beagleboard.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Link: https://lore.kernel.org/r/20200701013320.130441-3-drew@beagleboard.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
kernel cycle.
New drivers:
- Intel Jasper Lake support.
- NXP Freescale i.MX8DXL support.
- Qualcomm SM8250 support.
- Renesas R8A7742 SH-PFC support.
Driver improvements:
- Severe cleanup and modernization of the MCP23s08 driver.
- Mediatek driver modularized.
- Setting config supported in the Meson driver.
- Wakeup support for the Broadcom BCM7211.
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Merge tag 'pinctrl-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is the bulk of pin control changes for the v5.8 kernel cycle.
It's just really boring this time. Zero core changes. Just linear
development, cleanups and misc noncritical fixes. Some new drivers for
very new Qualcomm and Intel chips.
New drivers:
- Intel Jasper Lake support.
- NXP Freescale i.MX8DXL support.
- Qualcomm SM8250 support.
- Renesas R8A7742 SH-PFC support.
Driver improvements:
- Severe cleanup and modernization of the MCP23s08 driver.
- Mediatek driver modularized.
- Setting config supported in the Meson driver.
- Wakeup support for the Broadcom BCM7211"
* tag 'pinctrl-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (72 commits)
pinctrl: sprd: Fix the incorrect pull-up definition
pinctrl: pxa: pxa2xx: Remove 'pxa2xx_pinctrl_exit()' which is unused and broken
pinctrl: freescale: imx: Use 'devm_of_iomap()' to avoid a resource leak in case of error in 'imx_pinctrl_probe()'
pinctrl: freescale: imx: Fix an error handling path in 'imx_pinctrl_probe()'
pinctrl: sirf: add missing put_device() call in sirfsoc_gpio_probe()
pinctrl: imxl: Fix an error handling path in 'imx1_pinctrl_core_probe()'
pinctrl: bcm2835: Add support for wake-up interrupts
pinctrl: bcm2835: Match BCM7211 compatible string
dt-bindings: pinctrl: Document optional BCM7211 wake-up interrupts
dt-bindings: pinctrl: Document 7211 compatible for brcm, bcm2835-gpio.txt
dt-bindings: pinctrl: stm32: Add missing interrupts property
pinctrl: at91-pio4: Add COMPILE_TEST support
pinctrl: Fix return value about devm_platform_ioremap_resource()
MAINTAINERS: Renesas Pin Controllers are supported
dt-bindings: pinctrl: ocelot: Add Sparx5 SoC support
pinctrl: ocelot: Fix GPIO interrupt decoding on Jaguar2
pinctrl: ocelot: Remove instance number from pin functions
pinctrl: ocelot: Always register GPIO driver
dt-bindings: pinctrl: rockchip: update example
pinctrl: amd: Add ACPI dependency
...
The Rockchip dtsi and dts files have been bulk-converted for the
remaining raw gpio numbers into their descriptive counterparts and
also got rid of the unhelpful RK_FUNC_x -> x and RK_GPIOx -> x
mappings, so remove the unused defines in 'rockchip.h' to prevent
that someone start using them again.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20200512203524.7317-3-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
i.MX8DXL contains a system controller that is responsible for controlling
the pad setting of the IPs that are present. Communication between the
host processor running an OS and the system controller happens through
a SCU protocol, add support for the SCU based i.MX8DXL pinctrl driver.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Link: https://lore.kernel.org/r/1585306559-13973-2-git-send-email-Anson.Huang@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
On SAM9X60, slewrate should be enabled on pins with a switching frequency
below 50Mhz. Since most of our pins do not exceed this value, we enable
slewrate by default. Pins with a switching value that exceeds 50Mhz will
have to explicitly disable slewrate.
This patch changes the ABI. However, the slewrate macros are only used
by SAM9X60 and, at this moment, there are no device-tree files available
for this platform.
Suggested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Link: https://lore.kernel.org/r/20191101092031.24896-1-codrin.ciubotariu@microchip.com
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The defines RK_FUNC_1, RK_FUNC_2, RK_FUNC_3 and RK_FUNC_4
are no longer used. Mark them as "deprecated"
to prevent that someone start using them again.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20191015205852.4200-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add pinctrl macros for J721E SoC. These macro definitions are
similar to that of AM6, but adding new definitions to avoid
any naming confusions in the soc dts files.
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Based on 2 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation #
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 4122 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Based on 1 normalized pattern(s):
gplv2 only
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 4 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Armijn Hemel <armijn@tjaldur.nl>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.666840552@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms and conditions of the gnu general public license
version 2 as published by the free software foundation this program
is distributed in the hope it will be useful but without any
warranty without even the implied warranty of merchantability or
fitness for a particular purpose see the gnu general public license
for more details
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 263 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141901.208660670@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Based on 1 normalized pattern(s):
license terms gnu general public license gpl version 2
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 161 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Steve Winslow <swinslow@gmail.com>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190528170027.447718015@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation this program is
distributed in the hope that it will be useful but without any
warranty without even the implied warranty of merchantability or
fitness for a particular purpose see the gnu general public license
for more details
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 655 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070034.575739538@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Based on 3 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license as published by
the free software foundation either version 2 of the license or at
your option any later version this program is distributed in the
hope that it will be useful but without any warranty without even
the implied warranty of merchantability or fitness for a particular
purpose see the gnu general public license for more details
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license as published by
the free software foundation either version 2 of the license or at
your option any later version [author] [kishon] [vijay] [abraham]
[i] [kishon]@[ti] [com] this program is distributed in the hope that
it will be useful but without any warranty without even the implied
warranty of merchantability or fitness for a particular purpose see
the gnu general public license for more details
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license as published by
the free software foundation either version 2 of the license or at
your option any later version [author] [graeme] [gregory]
[gg]@[slimlogic] [co] [uk] [author] [kishon] [vijay] [abraham] [i]
[kishon]@[ti] [com] [based] [on] [twl6030]_[usb] [c] [author] [hema]
[hk] [hemahk]@[ti] [com] this program is distributed in the hope
that it will be useful but without any warranty without even the
implied warranty of merchantability or fitness for a particular
purpose see the gnu general public license for more details
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-or-later
has been chosen to replace the boilerplate/reference in 1105 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070033.202006027@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
AM33XX_PADCONF takes three instead of two parameters, to make
future changes to #pinctrl-cells easier.
For old boards which are not mainlined, we left the AM33XX_IOPAD
macro.
Signed-off-by: Christina Quast <cquast@hanoverdisplays.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The values are extraced from the "AM335x SitaraTM Processors Technical
Reference Manual", Section 9.3.1 CONTROL_MODULE Registers, based on the
file autogenerated by TI PinMux.
Signed-off-by: Christina Quast <cquast@hanoverdisplays.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
No core changes.
New drivers:
- NXP (ex Freescale) i.MX 8QM driver.
- NXP (ex Freescale) i.MX 8MM driver.
- AT91 SAM9X60 subdriver.
Improvements:
- Support for external interrups (EINT) on Mediatek virtual GPIOs.
- Make BCM2835 pin config fully generic.
- Lots of Renesas SH-PFC incremental improvements.
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Merge tag 'pinctrl-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is a calm cycle, not much happened this time around: not even
much incremental development. Some three new drivers, that is all.
No core changes.
New drivers:
- NXP (ex Freescale) i.MX 8QM driver.
- NXP (ex Freescale) i.MX 8MM driver.
- AT91 SAM9X60 subdriver.
Improvements:
- Support for external interrups (EINT) on Mediatek virtual GPIOs.
- Make BCM2835 pin config fully generic.
- Lots of Renesas SH-PFC incremental improvements"
* tag 'pinctrl-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (70 commits)
pinctrl: imx: fix scu link errors
dt-bindings: pinctrl: Document the i.MX50 IOMUXC binding
pinctrl: qcom: spmi-gpio: Reorder debug print
pinctrl: nomadik: fix possible object reference leak
pinctrl: stm32: return error upon hwspinlock failure
pinctrl: stm32: fix memory leak issue
pinctrl: sh-pfc: r8a77965: Add DRIF pins, groups and functions
pinctrl: sh-pfc: r8a77965: Add TMU pins, groups and functions
pinctrl: sh-pfc: Validate fixed-size field widths at build time
pinctrl: sh-pfc: sh73a0: Fix fsic_spdif pin groups
pinctrl: sh-pfc: r8a7792: Fix vin1_data18_b pin group
pinctrl: sh-pfc: r8a7791: Fix scifb2_data_c pin group
pinctrl: sh-pfc: emev2: Add missing pinmux functions
pinctrl: sunxi: Support I/O bias voltage setting on A80
pinctrl: ingenic: Add LCD pins for the JZ4725B SoC
pinctrl: samsung: Remove legacy API for handling external wakeup interrupts mask
pinctrl: bcm2835: Direct GPIO config changes to generic pinctrl
pinctrl: bcm2835: declare pin config as generic
pinctrl: qcom: qcs404: Drop unused UFS_RESET macro
dt-bindings: add documentation for slew rate
...
Lochnagar is an evaluation and development board for Cirrus
Logic Smart CODEC and Amp devices. It allows the connection of
most Cirrus Logic devices on mini-cards, as well as allowing
connection of various application processor systems to provide a
full evaluation platform. This driver supports the board
controller chip on the Lochnagar board.
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
No core changes this time.
New drivers:
- NXP (ex Freescale) i.MX 8 QXP SoC driver.
- Mediatek MT6797 SoC driver.
- Mediatek MT7629 SoC driver.
- Actions Semiconductor S700 SoC driver.
- Renesas RZ/A2 SoC driver.
- Allwinner sunxi suniv F1C100 SoC driver.
- Qualcomm PMS405 PMIC driver.
- Microsemi Ocelot Jaguar2 SoC driver.
Improvements:
- Some RT improvements (using raw spinlocks where appropriate).
- A lot of new pin sets on the Renesas PFC pin controllers.
- GPIO hogs now work on the Qualcomm SPMI/SSBI pin controller GPIO
chips, and Xway.
- Major modernization of the Intel pin control drivers.
- STM32 pin control driver will now synchronize usage of pins
with another CPU using a hardware spinlock.
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Merge tag 'pinctrl-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"We have no core changes but lots of incremental development in drivers
all over the place: Renesas, NXP, Mediatek and Actions Semiconductor
keep churning out new SoCs.
I have some subtree maintainers for Renesas and Intel helping out to
keep down the load, it's been working smoothly (Samsung also have a
subtree but it was not used this cycle.)
New drivers:
- NXP (ex Freescale) i.MX 8 QXP SoC driver.
- Mediatek MT6797 SoC driver.
- Mediatek MT7629 SoC driver.
- Actions Semiconductor S700 SoC driver.
- Renesas RZ/A2 SoC driver.
- Allwinner sunxi suniv F1C100 SoC driver.
- Qualcomm PMS405 PMIC driver.
- Microsemi Ocelot Jaguar2 SoC driver.
Improvements:
- Some RT improvements (using raw spinlocks where appropriate).
- A lot of new pin sets on the Renesas PFC pin controllers.
- GPIO hogs now work on the Qualcomm SPMI/SSBI pin controller GPIO
chips, and Xway.
- Major modernization of the Intel pin control drivers.
- STM32 pin control driver will now synchronize usage of pins with
another CPU using a hardware spinlock"
* tag 'pinctrl-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (145 commits)
dt-bindings: arm: fsl-scu: add imx8qm pinctrl support
pinctrl: freescale: Break dependency on SOC_IMX8MQ for i.MX8MQ
pinctrl: imx-scu: Depend on IMX_SCU
pinctrl: ocelot: Add dependency on HAS_IOMEM
pinctrl: ocelot: add MSCC Jaguar2 support
pinctrl: bcm: ns: support updated DT binding as syscon subnode
dt-bindings: pinctrl: bcm4708-pinmux: rework binding to use syscon
MAINTAINERS: merge at91 pinctrl entries
pinctrl: imx8qxp: break the dependency on SOC_IMX8QXP
pinctrl: uniphier: constify uniphier_pinctrl_socdata
pinctrl: mediatek: improve Kconfig dependencies
pinctrl: msm: mark PM functions as __maybe_unused
dt-bindings: pinctrl: sunxi: Add supply properties
pinctrl: meson: meson8b: add the missing GPIO_GROUPs for BOOT and CARD
pinctrl: meson: meson8: add the missing GPIO_GROUPs for BOOT and CARD
pinctrl: meson: meson8: rename the "gpio" function to "gpio_periphs"
pinctrl: meson: meson8: rename the "gpio" function to "gpio_periphs"
pinctrl: meson: meson8b: fix the GPIO function for the GPIOAO pins
pinctrl: meson: meson8: fix the GPIO function for the GPIOAO pins
pinctrl: sh-pfc: Make pinmux_cfg_reg.var_field_width[] variable-length
...
The dt-bindings header for TI K3 AM6 SoCs define a set of macros for
defining pinmux configs in human readable form, instead of raw-coded
hex values.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
- Fix VIN (Video IN) versioned groups on R-Car V2H, H3, and M3-W,
- Add I2C[0-3], DU1, VIN, QSPI1, and SDHI pin groups on RZ/G1C,
- Add audio, SDHI, VIN, HSCIF, and CAN(FD) support on R-Car E3,
- Add QSPI pin groups on R-Car V3M and V3H,
- Add VIN and CAN(FD) pin groups on R-Car M3-N,
- Add I2C[035] pin groups on R-Car H3 and M3-W,
- Add pinctrl and GPIO support for the new RZ/A2M (R7S9210) SoC,
- Small cleanups,
- Maintainership updates.
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Merge tag 'sh-pfc-for-v4.21-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
pinctrl: sh-pfc: Updates for v4.21
- Fix VIN (Video IN) versioned groups on R-Car V2H, H3, and M3-W,
- Add I2C[0-3], DU1, VIN, QSPI1, and SDHI pin groups on RZ/G1C,
- Add audio, SDHI, VIN, HSCIF, and CAN(FD) support on R-Car E3,
- Add QSPI pin groups on R-Car V3M and V3H,
- Add VIN and CAN(FD) pin groups on R-Car M3-N,
- Add I2C[035] pin groups on R-Car H3 and M3-W,
- Add pinctrl and GPIO support for the new RZ/A2M (R7S9210) SoC,
- Small cleanups,
- Maintainership updates.
MX8QXP contains a system controller that is responsible for controlling
the pad setting of the IPs that are present. Communication between the
host processor running an OS and the system controller happens through
a SCU protocol. This patch adds the SCU based MX8QXP pinctrl driver.
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Stefan Agner <stefan@agner.ch>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
There are close to 800 indivudal changesets in this branch again, which
feels like a lot. There are particularly many changes for the NVIDIA
Tegra platform this time, in fact more than it has seen in the two years
since the v4.9 merge window. Aside from this, it's been fairly normal,
with lots of changes going into Renesas R-CAR, NXP i.MX, Allwinner Sunxi,
Samsung Exynos, and TI OMAP.
Most of the changes are for adding new features into existing boards,
for brevity I'm only mentioning completely new machines and SoCs here.
For the first time I think we have (slightly) more new 64-bit hardware
than 32-bit:
Two boards get added for TI OMAP: Moxa UC-2101 is an industrial
computer, see https://www.moxa.com/product/UC-2100.htm; GTA04A5
is a minor variation of the motherboards of the GTA04 phone, see
https://shop.goldelico.com/wiki.php?page=GTA04A5
Clearfog is a nice little board for quad-core
Marvell Armada 8040 network processor, see
https://www.solid-run.com/marvell-armada-family/clearfog-gt-8k/
Two additional server boards come with the Aspeed baseboard management
controllers: Stardragon4800 is an arm64 reference platform made by HXT
(based on Qualcomm's server chips), and TiogaPass is an Open Compute
mainboard with x86 CPUs. Both use the ARM11 based AST2500 chips in
the BMC.
NXP i.MX usually sees a lot of new boards each release. This time there
we only add one minor variant: ConnectCore 6UL SBC Pro uses the same
SoM design as the ConnectCore 6UL SBC Express added later. However,
there is a new chip, the i.MX6ULZ, which is an even smaller variant
of the i.MX6ULL, with features removed. There is also support for the
reference board design, the i.MX6ULZ 14x14 EVK.
A new Raspberry Pi variant gets added, this one is the CM3 compute module
based on bcm2837, it was launched in early 2017 but only now added to
the kernel, both as 32-bit and as 64-bit files, as we tend to do for
Raspberry Pi.
On the Allwinner side, everything is again about cheap development
boards, usually of the "Fruit Pi" variety. The new ones this time
are:
Orange Pi Zero Plus2: http://www.orangepi.org/OrangePiZeroPlus2/
Orange Pi One Plus: http://www.orangepi.org/OrangePiOneplus/
Pine64 LTS: https://www.pine64.org/?product=pine-a64-lts
Banana Pi M2+ H5: http://www.banana-pi.org/m2plus.html
The last one of these is now a 64-bit version of the earlier Banana
Pi M2+ H3, with the same board layout.
Similarly, for Rockchips, get get another variant of the 32-bit
Asus Tinker board, the model 'S' based on rk3288, and three now
boards based on the popular RK3399 chip:
ROC-RK3399-PC: https://libre.computer/products/boards/roc-rk3399-pc/
Rock960: https://www.96boards.org/product/rock960/
RockPro64: https://www.pine64.org/?page_id=61454
These are all quite powerful boards with lots of RAM and I/O, and
the RK3399 is the same chip used in several Chromebooks. Finally,
we get support for the PX30 (aka rk3326) chip, which is based on the
low-end 64-bit Cortex-A35 CPU core. So far, only the evaluation board
is supported.
One more Banana Pi is added with a Mediatek chip: Banana Pi R64 is based
on the MT7622 WiFi router platform, and the first product I've seen with
a 64-bit Mediatek chip in that market: http://www.banana-pi.org/r64.html
For HiSilicon, we gain support for the Hi3670 SoC and HiKey 370
development board, which are similar to the Hi3660 and Hikey 360
respectively, but add support for an NPU.
Amlogic gets initial support for the Meson-G12A chip (S905D2),
another quad-core Cortex-A53 SoC, and its evaluation platform.
On the 32-bit side, we gain support for an actual end-user product,
the Endless Computers Endless Mini based on Meson8b (S805), see
https://endlessos.com/computers/
Qualcomm adds support for their MSM8998 SoC and evaluation platform. This
chip is commonly known as the Snapdragon 835, and is used in high-end
phones as well as low-end laptops.
For Renesas, a very bare support for the r8a774a1 (RZ/G2M) is added,
but no boards for this one. However, we do add boards for the previously
added r8a77965 (R-Car M3-N): the M3NULCB Kingfisher and the M3NULCB
Starter Kit Pro.
While we have lots of DT changes for NVIDIA to update the existing files,
the only board that gets added is the Toradex Colibri T20 on Colibri
Evaluation Board for the old Tegra2.
Synaptics add support for their AS370 SoC, which is part of the (formerly
Marvell) Berlin line of set-top-box chips used e.g. in the various Google
Chromecast. Only the .dtsi gets added at this point, no actual machines.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device tree updates from Arnd Bergmann:
"There are close to 800 indivudal changesets in this branch again,
which feels like a lot. There are particularly many changes for the
NVIDIA Tegra platform this time, in fact more than it has seen in the
two years since the v4.9 merge window. Aside from this, it's been
fairly normal, with lots of changes going into Renesas R-CAR, NXP
i.MX, Allwinner Sunxi, Samsung Exynos, and TI OMAP.
Most of the changes are for adding new features into existing boards,
for brevity I'm only mentioning completely new machines and SoCs here.
For the first time I think we have (slightly) more new 64-bit hardware
than 32-bit:
Two boards get added for TI OMAP: Moxa UC-2101 is an industrial
computer, see https://www.moxa.com/product/UC-2100.htm; GTA04A5 is a
minor variation of the motherboards of the GTA04 phone, see
https://shop.goldelico.com/wiki.php?page=GTA04A5
Clearfog is a nice little board for quad-core Marvell Armada 8040
network processor, see
https://www.solid-run.com/marvell-armada-family/clearfog-gt-8k/
Two additional server boards come with the Aspeed baseboard management
controllers: Stardragon4800 is an arm64 reference platform made by HXT
(based on Qualcomm's server chips), and TiogaPass is an Open Compute
mainboard with x86 CPUs. Both use the ARM11 based AST2500 chips in the
BMC.
NXP i.MX usually sees a lot of new boards each release. This time
there we only add one minor variant: ConnectCore 6UL SBC Pro uses the
same SoM design as the ConnectCore 6UL SBC Express added later.
However, there is a new chip, the i.MX6ULZ, which is an even smaller
variant of the i.MX6ULL, with features removed. There is also support
for the reference board design, the i.MX6ULZ 14x14 EVK.
A new Raspberry Pi variant gets added, this one is the CM3 compute
module based on bcm2837, it was launched in early 2017 but only now
added to the kernel, both as 32-bit and as 64-bit files, as we tend to
do for Raspberry Pi.
On the Allwinner side, everything is again about cheap development
boards, usually of the "Fruit Pi" variety. The new ones this time are:
- Orange Pi Zero Plus2: http://www.orangepi.org/OrangePiZeroPlus2/
- Orange Pi One Plus: http://www.orangepi.org/OrangePiOneplus/
- Pine64 LTS: https://www.pine64.org/?product=pine-a64-lts
- Banana Pi M2+ H5: http://www.banana-pi.org/m2plus.html
The last one of these is now a 64-bit version of the earlier Banana Pi
M2+ H3, with the same board layout.
Similarly, for Rockchips, get get another variant of the 32-bit Asus
Tinker board, the model 'S' based on rk3288, and three now boards
based on the popular RK3399 chip:
- ROC-RK3399-PC: https://libre.computer/products/boards/roc-rk3399-pc/
- Rock960: https://www.96boards.org/product/rock960/
- RockPro64: https://www.pine64.org/?page_id=61454
These are all quite powerful boards with lots of RAM and I/O, and the
RK3399 is the same chip used in several Chromebooks. Finally, we get
support for the PX30 (aka rk3326) chip, which is based on the low-end
64-bit Cortex-A35 CPU core. So far, only the evaluation board is
supported.
One more Banana Pi is added with a Mediatek chip: Banana Pi R64 is
based on the MT7622 WiFi router platform, and the first product I've
seen with a 64-bit Mediatek chip in that market:
http://www.banana-pi.org/r64.html
For HiSilicon, we gain support for the Hi3670 SoC and HiKey 370
development board, which are similar to the Hi3660 and Hikey 360
respectively, but add support for an NPU.
Amlogic gets initial support for the Meson-G12A chip (S905D2), another
quad-core Cortex-A53 SoC, and its evaluation platform. On the 32-bit
side, we gain support for an actual end-user product, the Endless
Computers Endless Mini based on Meson8b (S805), see
https://endlessos.com/computers/
Qualcomm adds support for their MSM8998 SoC and evaluation platform.
This chip is commonly known as the Snapdragon 835, and is used in
high-end phones as well as low-end laptops.
For Renesas, a very bare support for the r8a774a1 (RZ/G2M) is added,
but no boards for this one. However, we do add boards for the
previously added r8a77965 (R-Car M3-N): the M3NULCB Kingfisher and the
M3NULCB Starter Kit Pro.
While we have lots of DT changes for NVIDIA to update the existing
files, the only board that gets added is the Toradex Colibri T20 on
Colibri Evaluation Board for the old Tegra2.
Synaptics add support for their AS370 SoC, which is part of the
(formerly Marvell) Berlin line of set-top-box chips used e.g. in the
various Google Chromecast. Only the .dtsi gets added at this point, no
actual machines"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (721 commits)
ARM: dts: socfgpa: remove ethernet aliases from dtsi
arm64: dts: stratix10: add ethernet aliases
dt-bindings: mediatek: Add bindig for MT7623 IOMMU and SMI
dt-bindings: mediatek: Add JPEG Decoder binding for MT7623
dt-bindings: iommu: mediatek: Add binding for MT7623
dt-bindings: clock: mediatek: add support for MT7623
ARM: dts: mvebu: armada-385-db-88f6820-amc: auto-detect nand ECC properites
ARM: dts: da850-lego-ev3: slow down A/DC as much as possible
ARM: dts: da850-evm: Enable tca6416 on baseboard
arm64: dts: uniphier: Add USB2 PHY nodes
arm64: dts: uniphier: Add USB3 controller nodes
ARM: dts: uniphier: Add USB2 PHY nodes
ARM: dts: uniphier: Add USB3 controller nodes
arm64: dts: meson-axg: s400: disable emmc
arm64: dts: meson-axg: s400: add missing emmc pwrseq
arm64: dts: clearfog-gt-8k: add PCIe slot description
ARM: dts: at91: sama5d4_xplained: even nand memory partitions
ARM: dts: at91: sama5d3_xplained: even nand memory partitions
ARM: dts: at91: at91sam9x5cm: even nand memory partitions
ARM: dts: at91: sama5d2_ptc_ek: fix bootloader env offsets
...
The Renesas RZ/N1 device family PINCTRL node description.
Based on a patch originally written by Michel Pollet at Renesas.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Document the PMC pinctrl bindings for pad power state and signaling
voltage configuration. Both nvidia,tegra186-pmc.txt and
nvidia,tegra20-pmc.txt are modified as they both cover SoC generations
for which these bindings apply.
Add a header defining Tegra PMC pad voltage configurations.
Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
1. Add handling of external wakeup interrupts mask inside the pin
controller driver.
Existing solution is spread between the driver and machine code. The
machine code writes the mask but its value is taken from pin
controller driver.
This moves everything into pin controller driver allowing later to
remove the cross-subsystem interaction. Also this is a necessary
step for implementing later Suspend to RAM on ARMv8 Exynos5433.
2. Bring necessary suspend/resume callbacks for Exynos542x and
Exynos5260.
3. Document hidden requirement about one external wakeup interrupts
device node.
4. Minor documentation cleanups.
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Merge tag 'samsung-pinctrl-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel
Samsung pinctrl drivers changes for v4.19
1. Add handling of external wakeup interrupts mask inside the pin
controller driver.
Existing solution is spread between the driver and machine code. The
machine code writes the mask but its value is taken from pin
controller driver.
This moves everything into pin controller driver allowing later to
remove the cross-subsystem interaction. Also this is a necessary
step for implementing later Suspend to RAM on ARMv8 Exynos5433.
2. Bring necessary suspend/resume callbacks for Exynos542x and
Exynos5260.
3. Document hidden requirement about one external wakeup interrupts
device node.
4. Minor documentation cleanups.
Add support for the drive strength configuration. Usually, this value is
expressed in mA. Since the numeric value depends on VDDIOP voltage, a
value we can't retrieve at runtime, the controller uses low, medium and
high to define the drive strength.
The PIO controller accepts two values for the low drive configuration: 0
and 1. Most of the time, we don't care about the drive strength. So we
keep the default value which is 0. The drive strength is advertised
through the sysfs only when it has been explicitly set in the device
tree i.e. if its value is different from 0.
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Fulfill the pinmux macros for MT7623
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add missing pinctrl binding about I2C2 and SPI2 which would be used in
devicetree related files.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Core changes:
- After lengthy discussions and partly due to my ignorance, we have
merged a patch making pinctrl_force_default() and pinctrl_force_sleep()
reprogram the states into the hardware of any hogged pins, even
if they are already in the desired state. This only apply to hogged
pins since groups of pins owned by drivers need to be managed by
each driver, lest they could not do things like runtime PM and
put pins to sleeping state even if the system as a whole is not
in sleep.
New drivers:
- New driver for the Microsemi Ocelot SoC. This is used in ethernet
switches.
- The X-Powers AXP209 GPIO driver was extended to also deal with pin
control and moved over from the GPIO subsystem. This circuit is
a mixed-mode integrated circuit which is part of AllWinner designs.
- New subdriver for the Qualcomm MSM8998 SoC, core of a high end
mobile devices (phones) chipset.
- New subdriver for the ST Microelectronics STM32MP157 MPU and
STM32F769 MCU from the STM32 family.
- New subdriver for the MediaTek MT7622 SoC. This is used for routers,
repeater, gateways and such network infrastructure.
- New subdriver for the NXP (former Freescale) i.MX 6ULL. This SoC has
multimedia features and target "smart devices", I guess in-car
entertainment, in-flight entertainment, industrial control panels etc.
General improvements:
- Incremental improvements on the SH-PFC subdrivers for things like
the CAN bus.
- Enable the glitch filter on Baytrail GPIOs used for interrupts.
- Proper handling of pins to GPIO ranges on the Semtec SX150X
- An IRQ setup ordering fix on MCP23S08.
- A good set of janitorial coding style fixes.
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Merge tag 'pinctrl-v4.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is the bulk of pin control changes for the v4.16 kernel cycle.
Like with GPIO it is actually a bit calm this time.
Core changes:
- After lengthy discussions and partly due to my ignorance, we have
merged a patch making pinctrl_force_default() and
pinctrl_force_sleep() reprogram the states into the hardware of any
hogged pins, even if they are already in the desired state.
This only apply to hogged pins since groups of pins owned by
drivers need to be managed by each driver, lest they could not do
things like runtime PM and put pins to sleeping state even if the
system as a whole is not in sleep.
New drivers:
- New driver for the Microsemi Ocelot SoC. This is used in ethernet
switches.
- The X-Powers AXP209 GPIO driver was extended to also deal with pin
control and moved over from the GPIO subsystem. This circuit is a
mixed-mode integrated circuit which is part of AllWinner designs.
- New subdriver for the Qualcomm MSM8998 SoC, core of a high end
mobile devices (phones) chipset.
- New subdriver for the ST Microelectronics STM32MP157 MPU and
STM32F769 MCU from the STM32 family.
- New subdriver for the MediaTek MT7622 SoC. This is used for
routers, repeater, gateways and such network infrastructure.
- New subdriver for the NXP (former Freescale) i.MX 6ULL. This SoC
has multimedia features and target "smart devices", I guess in-car
entertainment, in-flight entertainment, industrial control panels
etc.
General improvements:
- Incremental improvements on the SH-PFC subdrivers for things like
the CAN bus.
- Enable the glitch filter on Baytrail GPIOs used for interrupts.
- Proper handling of pins to GPIO ranges on the Semtec SX150X
- An IRQ setup ordering fix on MCP23S08.
- A good set of janitorial coding style fixes"
* tag 'pinctrl-v4.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (102 commits)
pinctrl: mcp23s08: fix irq setup order
pinctrl: Forward declare struct device
pinctrl: sunxi: Use of_clk_get_parent_count() instead of open coding
pinctrl: stm32: add STM32F769 MCU support
pinctrl: sx150x: Add a static gpio/pinctrl pin range mapping
pinctrl: sx150x: Register pinctrl before adding the gpiochip
pinctrl: sx150x: Unregister the pinctrl on release
pinctrl: ingenic: Remove redundant dev_err call in ingenic_pinctrl_probe()
pinctrl: sprd: Use seq_putc() in sprd_pinconf_group_dbg_show()
pinctrl: pinmux: Use seq_putc() in pinmux_pins_show()
pinctrl: abx500: Use seq_putc() in abx500_gpio_dbg_show()
pinctrl: mediatek: mt7622: align error handling of mtk_hw_get_value call
pinctrl: mediatek: mt7622: fix potential uninitialized value being returned
pinctrl: uniphier: refactor drive strength get/set functions
pinctrl: imx7ulp: constify struct imx_cfg_params_decode
pinctrl: imx: constify struct imx_pinctrl_soc_info
pinctrl: imx7d: simplify imx7d_pinctrl_probe
pinctrl: imx: use struct imx_pinctrl_soc_info as a const
pinctrl: sunxi-pinctrl: fix pin funtion can not be match correctly.
pinctrl: qcom: Add msm8998 pinctrl driver
...
Due to a mistake in documentation the DS0_PULL_UP_DOWN_EN macro was
mistakenly defined as an active high bit, however setting the bit
actually disables the internal pull resistor on the pin, so correct this
macro and introduce a new DS0_PULL_UP_DOWN_DIS macro with the proper bit
value set now that the documentation has been updated.
Change based on AM437x Techninal Reference Manual SPRUHL7G Revised June
2017 Section 7.2.1.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We add device tree files for a couple of additional SoCs in various areas:
Allwinner R40/V40 for entertainment, Broadcom Hurricane 2 for networking,
Amlogic A113D for audio, and Renesas R-Car V3M for automotive.
As usual, lots of new boards get added based on those and other SoCs:
- Actions S500 based CubieBoard6 single-board computer
- Amlogic Meson-AXG A113D based development board
- Amlogic S912 based Khadas VIM2 single-board computer
- Amlogic S912 based Tronsmart Vega S96 set-top-box
- Allwinner H5 based NanoPi NEO Plus2 single-board computer
- Allwinner R40 based Banana Pi M2 Ultra and Berry single-board computers
- Allwinner A83T based TBS A711 Tablet
- Broadcom Hurricane 2 based Ubiquiti UniFi Switch 8
- Broadcom bcm47xx based Luxul XAP-1440/XAP-810/ABR-4500/XBR-4500
wireless access points and routers
- NXP i.MX51 based Zodiac Inflight Innovations RDU1 board
- NXP i.MX53 based GE Healthcare PPD biometric monitor
- NXP i.MX6 based Pistachio single-board computer
- NXP i.MX6 based Vining-2000 automotive diagnostic interface
- NXP i.MX6 based Ka-Ro TX6 Computer-on-Module in additional variants
- Qualcomm MSM8974 (Snapdragon 800) based Fairphone 2 phone
- Qualcomm MSM8974pro (Snapdragon 801) based Sony Xperia Z2 Tablet
- Realtek RTD1295 based set-top-boxes MeLE V9 and PROBOX2 AVA
- Renesas R-Car V3M (R8A77970) SoC and "Eagle" reference board
- Renesas H3ULCB and M3ULCB "Kingfisher" extension infotainment boards
- Renasas r8a7745 based iWave G22D-SODIMM SoM
- Rockchip rk3288 based Amarula Vyasa single-board computer
- Samsung Exynos5800 based Odroid HC1 single-board computer
For existing SoC support, there was a lot of ongoing work, as usual
most of that concentrated on the Renesas, Rockchip, OMAP, i.MX, Amlogic
and Allwinner platforms, but others were also active.
Rob Herring and many others worked on reducing the number of issues that
the latest version of 'dtc' now warns about. Unfortunately there is still
a lot left to do.
A rework of the ARM foundation model introduced several new files
for common variations of the model.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM device-tree updates from Arnd Bergmann:
"We add device tree files for a couple of additional SoCs in various
areas:
Allwinner R40/V40 for entertainment, Broadcom Hurricane 2 for
networking, Amlogic A113D for audio, and Renesas R-Car V3M for
automotive.
As usual, lots of new boards get added based on those and other SoCs:
- Actions S500 based CubieBoard6 single-board computer
- Amlogic Meson-AXG A113D based development board
- Amlogic S912 based Khadas VIM2 single-board computer
- Amlogic S912 based Tronsmart Vega S96 set-top-box
- Allwinner H5 based NanoPi NEO Plus2 single-board computer
- Allwinner R40 based Banana Pi M2 Ultra and Berry single-board computers
- Allwinner A83T based TBS A711 Tablet
- Broadcom Hurricane 2 based Ubiquiti UniFi Switch 8
- Broadcom bcm47xx based Luxul XAP-1440/XAP-810/ABR-4500/XBR-4500
wireless access points and routers
- NXP i.MX51 based Zodiac Inflight Innovations RDU1 board
- NXP i.MX53 based GE Healthcare PPD biometric monitor
- NXP i.MX6 based Pistachio single-board computer
- NXP i.MX6 based Vining-2000 automotive diagnostic interface
- NXP i.MX6 based Ka-Ro TX6 Computer-on-Module in additional variants
- Qualcomm MSM8974 (Snapdragon 800) based Fairphone 2 phone
- Qualcomm MSM8974pro (Snapdragon 801) based Sony Xperia Z2 Tablet
- Realtek RTD1295 based set-top-boxes MeLE V9 and PROBOX2 AVA
- Renesas R-Car V3M (R8A77970) SoC and "Eagle" reference board
- Renesas H3ULCB and M3ULCB "Kingfisher" extension infotainment boards
- Renasas r8a7745 based iWave G22D-SODIMM SoM
- Rockchip rk3288 based Amarula Vyasa single-board computer
- Samsung Exynos5800 based Odroid HC1 single-board computer
For existing SoC support, there was a lot of ongoing work, as usual
most of that concentrated on the Renesas, Rockchip, OMAP, i.MX,
Amlogic and Allwinner platforms, but others were also active.
Rob Herring and many others worked on reducing the number of issues
that the latest version of 'dtc' now warns about. Unfortunately there
is still a lot left to do.
A rework of the ARM foundation model introduced several new files for
common variations of the model"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (599 commits)
arm64: dts: uniphier: route on-board device IRQ to GPIO controller for PXs3
dt-bindings: bus: Add documentation for the Technologic Systems NBUS
arm64: dts: actions: s900-bubblegum-96: Add fake uart5 clock
ARM: dts: owl-s500: Add CubieBoard6
dt-bindings: arm: actions: Add CubieBoard6
ARM: dts: owl-s500-guitar-bb-rev-b: Add fake uart3 clock
ARM: dts: owl-s500: Set power domains for CPU2 and CPU3
arm: dts: mt7623: remove unused compatible string for pio node
arm: dts: mt7623: update usb related nodes
arm: dts: mt7623: update crypto node
ARM: dts: sun8i: a711: Enable USB OTG
ARM: dts: sun8i: a711: Add regulator support
ARM: dts: sun8i: a83t: bananapi-m3: Enable AP6212 WiFi on mmc1
ARM: dts: sun8i: a83t: cubietruck-plus: Enable AP6330 WiFi on mmc1
ARM: dts: sun8i: a83t: Move mmc1 pinctrl setting to dtsi file
ARM: dts: sun8i: a83t: allwinner-h8homlet-v2: Add AXP818 regulator nodes
ARM: dts: sun8i: a83t: bananapi-m3: Add AXP813 regulator nodes
ARM: dts: sun8i: a83t: cubietruck-plus: Add AXP818 regulator nodes
ARM: dts: sunxi: Add dtsi for AXP81x PMIC
arm64: dts: allwinner: H5: Restore EMAC changes
...
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
support for omap35xx-evm, am34xx-epos-evm and dra7:
- A series of changes to fix support for omap35xx-evm
- A series of changes to add earlycon support for n8x0, pandaboard
and omap5 boards
- A series of changes for am43xx-epos-evm pinctrl modes for default
and sleep states
- A series of changes to correct pbias regulator voltage for dra7
from 3V to 3.3V
- Use microchip compatible instead of deprecated mcp compatible for
mcp23017
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Merge tag 'omap-for-v4.15/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Pull "device tree changes for omaps for v4.15 merge window" from Tony Lindgren:
Device tree changes for omaps for v4.15 merge window to improve
support for omap35xx-evm, am34xx-epos-evm and dra7:
- A series of changes to fix support for omap35xx-evm
- A series of changes to add earlycon support for n8x0, pandaboard
and omap5 boards
- A series of changes for am43xx-epos-evm pinctrl modes for default
and sleep states
- A series of changes to correct pbias regulator voltage for dra7
from 3V to 3.3V
- Use microchip compatible instead of deprecated mcp compatible for
mcp23017
* tag 'omap-for-v4.15/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (22 commits)
ARM: dts: omap3: Replace deprecated mcp prefix
ARM: dts: dra7-evm: Move pcie RC node to common file
ARM: dts: omap5: Increase max-voltage of pbias regulator
ARM: dts: dra7: Increase max-voltage of pbias regulator
ARM: dts: am43xx-epos-evm: Add default pinmux for unused pins
ARM: dts: am43xx-epos-evm: Add default and sleep pinmux for usb2_phy1 and usb2_phy2
ARM: dts: am43xx-epos-evm: Add default and sleep pinmux for uart0
ARM: dts: am43xx-epos-evm: Add default and sleep pinmux for matrix_keypad0
ARM: dts: am43xx-epos-evm: Add sleep pinmux for mmc1
ARM: dts: am43xx-epos-evm: Add sleep pinmux for pixcir_ts
ARM: dts: am43xx-epos-evm: Add sleep pinmux for gpmc
ARM: dts: am43xx-epos-evm: Add sleep pinmux for ecap0
ARM: dts: am43xx-epos-evm: Add sleep pinmux for qspi1
ARM: dts: am43xx-epos-evm: Add sleep pinmux for spi0 and spi1
ARM: dts: am43xx: Introduce additional pinmux definitions for DS0
ARM: dts: Configure earlycon for omap5-common
ARM: dts: Configure earlycon for pandaboard
ARM: dts: Configure earlycon for n8x0
ARM: dts: omap3-evm: Add DSS {vdds_dsi,vdda_video}-supply references
ARM: dts: omap3: Add Sharp LS037V7DW01 'envdd' supply
...
