Commit graph

8 commits

Author SHA1 Message Date
Greg Ungerer
57b481436f m68knommu: external interrupt support to ColdFire intc-2 controller
The EDGE Port module of some ColdFire parts using the intc-2 interrupt
controller provides support for 7 external interrupts. These interrupts
go off-chip (that is they are not for internal peripherals). They need
some special handling and have some extra setup registers. Add code to
support them.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15 21:01:57 +10:00
Greg Ungerer
ce3de78a1c m68knommu: remove ColdFire CLOCK_DIV config option
The reality is that you do not need the abiltity to configure the
clock divider for ColdFire CPUs. It is a fixed ratio on any given
ColdFire family member. It is not the same for all ColdFire parts,
but it is always the same in a model range. So hard define the divider
for each supported ColdFire CPU type and remove the Kconfig option.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15 21:01:57 +10:00
Greg Ungerer
254eef7464 m68knommu: remove kludge seting of MCF_IPSBAR for ColdFire 54xx
The ColdFire 54xx family shares the same interrupt controller used
on the 523x, 527x and 528x ColdFire parts, but it isn't offset
relative to the IPSBAR register. The 54xx doesn't have an IPSBAR
register.

By including the base address of the peripheral registers in the register
definitions (MCFICM_INTC0 and MCFICM_INTC1 in this case) we can avoid
having to define a fake IPSBAR for the 54xx. And this makes the register
address definitions of these more consistent, the majority of the other
register address defines include the peripheral base address already.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-03-15 21:01:53 +10:00
Greg Ungerer
3d461401eb m68knommu: move inclusion of ColdFire v4 cache registers
Move the inclusion of the version 4 cache controller registers so that
it is with all the other register bit flag definitions. This makes it
consistent with the other version core inclusion points, and means we
don't need "#ifdef"ery in odd-ball places for these definitions.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05 15:19:18 +10:00
Greg Ungerer
57015421d3 m68knommu: move UART addressing to part specific includes
The ColdFire UART base addresses varies between the different ColdFire
family members. Instead of keeping the base addresses with the UART
definitions keep them with the other addresses definitions for each
ColdFire part.

The motivation for this move is so that when we add new ColdFire
part definitions, they are all in a single file (and we shouldn't
normally need to modify the UART definitions in mcfuart.h at all).

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05 15:19:17 +10:00
Greg Ungerer
733f31b764 m68knommu: fix clock rate value reported for ColdFire 54xx parts
The instruction timings of the ColdFire 54xx family parts are
different to other version 4 parts (or version 2 or 3 parts for
that matter too).

Move the instruction timing setting into the ColdFire part
specific headers, and set the 54xx value appropriately.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05 15:19:17 +10:00
Greg Ungerer
7fc82b655a m68knommu: move ColdFire CPU names into their headers
Move the ColdFire CPU names out of setup.c and into their repsective
headers. That way when we add new ones we won't need to modify
setup.c any more.

Add the missing 548x CPU name.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05 15:19:17 +10:00
Greg Ungerer
5b2e6555ac m68knommu: make Coldfire 548x support more generic
The ColdFire 547x family of processors is very similar to the ColdFire
548x series. Almost all of the support for them is the same. Make the
code supporting the 548x more gneric, so it will be capable of
supporting both families.

For the most part this is a renaming excerise to make the support
code more obviously apply to both families.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-01-05 15:19:17 +10:00
Renamed from arch/m68k/include/asm/m548xsim.h (Browse further)