Commit graph

52 commits

Author SHA1 Message Date
Rafał Bilski
275bc6b7f6 [CPUFREQ] Longhaul - Replace ACPI functions with direct I/O
Current version of "bm status" bit test works as long as
no USB device is in use. When USB device is plugged in ACPI
function in this context is always returning 1. Until reboot.
Direct I/O is working fine even when many USB devices are
connected.
Change bm_timeout value to less annoying. 1000 is still much
more then worst case observed and it is much better when status
bit gets stuck.

Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-06-06 17:22:17 -04:00
Rafał Bilski
73e107d4a1 [CPUFREQ] Longhaul - Embedded "conservative"
Longhaul with voltage scaling enabled works great on Ezra
CPU (Longhaul ver. 2). As long as "conservative" governor is
used. Both "ondemand" and "userspace" can change voltage
from min to max at once. Motherboard unfortunatly turns off
when vid difference is big. Longhaul was printing warning
message, but it is not enough. Now driver will have
"conservative" governor built in and will split bigger
changes to smaller ones.

Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-05-29 16:56:40 -04:00
Rafał Bilski
489dc5cb18 [CPUFREQ] Longhaul - Check ACPI "BM DMA in progress" bit
It is good idea to wait for PCI bus to become idle before
frequency change. Thanks to ACPI it is possible. It makes
sense only when northbridge support is in use because it is
only case in which we can disable arbiter after check if PCI
bus is busy.

Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-05-29 16:56:39 -04:00
Rafał Bilski
1b11d4ca6d [CPUFREQ] Longhaul - Move old_ratio to correct place
Move one line where it should be. After first transition
Longhaul will skip frequency transition if destination
frequency is already set.

Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-05-29 16:56:39 -04:00
Rafał Bilski
920dd0fbba [CPUFREQ] Longhaul - VT8237 support
Looks like VT8237 has the same bits which VT8235 has.
Poke registers if it is found.

Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-05-29 16:56:39 -04:00
Rafał Bilski
7d5edcc028 [CPUFREQ] Longhaul - Use all kinds of support
This patch is removing southbridge support as separate
kind of support. Instead it is used to make other kinds
of support more stable. Also northbridge and ACPI C3
support both will be used if both are available.

Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-05-29 16:56:39 -04:00
Rafal Bilski
07844252ff [CPUFREQ] Longhaul - Revert Longhaul ver. 2
There is something wrong with this code. It needs more
testing. It is better to disable it for now because support
for some machines will be broken.

Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-04-26 14:32:03 -04:00
Rafał Bilski
fb48e15645 [CPUFREQ] Longhaul - Correct PCI code
Replace obsolete pci_find_device with pci_get_device.

Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-04-26 14:32:02 -04:00
Dave Jones
7ab77e03c1 Longhaul - Revert ACPI C3 on Longhaul ver. 2
Support for Longhaul ver.  2 broke driver for VIA C3 Eden 600MHz with
Samuel 2 core.  Processor is not able to switch frequency anymore.  I
don't know much about this issue at the moment, but until (if ever) I
will know why, this part should be reversed.

Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-04-20 22:56:29 -07:00
Linus Torvalds
221dee285e Revert "[CPUFREQ] constify cpufreq_driver where possible."
This reverts commit aeeddc1435, which was
half-baked and broken.  It just resulted in compile errors, since
cpufreq_register_driver() still changes the 'driver_data' by setting
bits in the flags field.  So claiming it is 'const' _really_ doesn't
work.

Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-02-26 14:55:48 -08:00
Dave Jones
bd5ab26a7d [CPUFREQ] constify some data tables.
Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-22 19:11:16 -05:00
Dave Jones
aeeddc1435 [CPUFREQ] constify cpufreq_driver where possible.
Not all cases are possible due to ->flags being set at runtime
on some drivers.

Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-22 19:08:27 -05:00
Rafa Bilski
2b8c0e1302 [CPUFREQ] Longhaul - Redo Longhaul ver. 2
Start using v2 version of Longhaul when available. It provides
voltage scaling and can use ACPI C3 state. That's curious. CPU
will not change frequency on ACPI C3 when v1 is in use, but it will
when v2 is used. Driver will return max frequency all the time if
this isn't true for all processors. There is strange thing with
mobile voltage. Looks like only Nehemiah (C3-M) supports it.
Earlier processors have different mobile VRM (in docs), but I can't
find any which is using it. Looks like all are using VRM 8.5. So
fail for non Nehemiah with mobile VRM.

Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-14 17:32:06 -05:00
Dave Jones
bd0561c9d8 [CPUFREQ] Fix up merge conflicts with recent ACPI changes.
Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-10 20:36:29 -05:00
Rafa Bilski
348f31ed2b [CPUFREQ] Longhaul - Separate frequency and voltage transition
This change should make Longhaul more compatible with
both ver. 2 and Powersaver processors. Voltage transitions
will be done before or after frequency transition. That depends
on direction of change. I don't know how to force conservative
governor when voltage scaling is enabled, so there is only
a warning for user. Minimal voltage is calculated in different
way now because in this way more power is saved at lower
multipliers.

Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-10 20:05:50 -05:00
Rafa Bilski
e57501c15f [CPUFREQ] Longhaul - Models of Nehemiah
Borowed from VIA driver.

Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-10 20:05:04 -05:00
Rafa Bilski
9addf3b638 [CPUFREQ] Longhaul - Simplier minmult
Simple cleanup in code which is setting minmult.

Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-10 20:01:48 -05:00
Rafa Bilski
786f46b262 [CPUFREQ] Longhaul - Add VT8235 support
I don't know why it is working and how, but it is working. On my
Epia transition time is by default set to 100us. I'm changing it to
200us. After that I can change frequency from min (x4.0) to max (x7.5)
without lockup. Many times.
There is a paranoid check at a beginning of a patch. Probably dead
code, but I don't have better ideas for CL10000 case at the moment.
Only way to to detect broken chip seems to be looking in log for
spurious interrupts.

Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-04 18:09:19 -05:00
Rafa Bilski
46ef955f5c [CPUFREQ] Longhaul - Fix guess_fsb function
This is bug reported by John-Marc Chandonia:
> Detected 1002.292 MHz processor.
> longhaul: VIA C3 'Nehemiah B' [C5N] CPU detected.  Powersaver supported.
> longhaul: Using throttling support.
> longhaul: Invalid (reserved) FSB!
FSB is correcly guessed for 999.554 MHz CPU.
To fix this error:
- ROUNDING should be range, not mask - at it's current value it is +7 -8,
- more precise calculations inside guess_fsb - 7.5x133MHz is 1000MHz now.

Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-04 18:09:19 -05:00
Rafa Bilski
0d44b2ba28 [CPUFREQ] Longhaul - Remove duplicate tables
Now there is no need to depend on -1 in Nehemiah tables. After
previous change code is eliminating multipliers lower then 5.0
by minmult for Nehemiah A and B.

Signed-off-by: Rafa Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-03 17:25:19 -05:00
Rafa Bilski
980342a7eb [CPUFREQ] Longhaul - Introduce Nehemiah C
Looks like some time ago I introduced a bug to Longhaul.
I had report that 9x133Mhz CPU is seen as 5x133MHz. So I
changed multipliers table. That was a mistake. According to
documentation table was correct. So only way to avoid 5 or 9
dilema is not use MaxMHzBR for PowerSaver 1.0. One code that
works on all processors. To do it I need also separate flag for
Nehemiah C (min = x4.0) and Nehemiah (min = x5.0).

Signed-off-by: Rafa Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-03 17:25:19 -05:00
Rafa Bilski
1479672283 [CPUFREQ] Longhaul - Remove "ignore_latency" option
There is no need to have this option in Longhaul anymore.
It was for laptop with CLE266 chipset in times, when only
ACPI C3 was used to switch frequency. Now we have native
support not only for CLE266, but CN400 too. Would be good
to have support for PN266, but I can't find datasheet for it.
Looks like BIOS for CPU's faster then 1GHz don't support
ACPI C2 nor C3.

Signed-off-by: Rafa Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-03 17:24:08 -05:00
Alexey Starikovskiy
cee324b145 ACPICA: use new ACPI headers.
Signed-off-by: Len Brown <len.brown@intel.com>
2007-02-02 21:14:28 -05:00
Dave Jones
43c8f12f9f [CPUFREQ] longhaul: Kill off warnings introduced by recent changes.
Bunch of unused vars + one case where gcc isn't smart enough.

Signed-off-by: Dave Jones <davej@redhat.com>
2007-01-02 23:42:16 -05:00
Rafa Bilski
24ebead82b [CPUFREQ] Longhaul - Always guess FSB
This is patch that solves Ebox mini PC issue and make
FSB code more specification compilant. At start guess_fsb
function is guessing 200MHz FSB too. It is better to
make it in this way because, thanks to this function, driver
will fail for bogus FSB values caused by bogus multiplier
value. For PowerSaver processors we can't depend on Max /
MinMHzFSB because these values are only used for
PowerSaver 2.0 and 3.0. Most processors on which Longhaul
is used are PowerSaver 1.0 only. I'm changing code for older
CPU's too, but not so much as previously, and this code was
already used for Ezra. Using MinMHzBR for Ezra-T is outside
spec. It is for voltage scaling purpose and don't have to
be equal to minmult (but it is). Same for Nehemiah (it
isn't for sure). Added mult - current multiplier value.

Signed-off-by: Rafa Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-01-02 23:38:39 -05:00
Rafa Bilski
264166e604 [CPUFREQ] Longhaul - Fix up powersaver assumptions.
ACPI PM2 register was fallback for "Longhaul ver. 1" CPU's.
My assumption that this register isn't present at
"PowerSaver" motherboards is so far true, but current code
will not work correctly in other case. There are three possible
supports: ACPI C3, PM2 and northbridge. That was my assumption
that ACPI C3 and northbridge is for PS and northbridge and PM2
is for V1. In current code we can only check if it is ACPI
support or not by port22_en. So remove port22_en and add
longhaul_flags. If USE_ACPI_C3 and USE_NORTHBRIDGE are both
clear then it means ACPI PM2 support. Also change order of
support probe from ACPI C3, PM2, northbridge to ACPI C3,
northbridge, ACPI PM2. Paranoid protection against port 0x22
cast as ACPI PM2 register. Bit 1 clear in such case - lockup
on AGP DMA. And obvious (now) fixup for do_powersaver. Use
cx->address only for ACPI C3 ("PowerSaver" processor using
PM2 support).

Signed-off-by: Rafa Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-12-29 15:56:44 -05:00
Dave Jones
1cfe201426 [CPUFREQ] longhaul: Fix up unreachable code.
Signed-off-by: Rafał Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-12-28 22:30:16 -05:00
Dave Jones
928ee513c2 [CPUFREQ] longhaul compile fix.
Some gcc's are more anal than others about empty switch labels.
error: label at end of compound statement

Signed-off-by: Dave Jones <davej@redhat.com>
2006-12-17 19:09:59 -05:00
Dave Jones
8ec9822dd1 [CPUFREQ] Advise not to use longhaul on VIA C7.
C7's are centrino speedstep-alike.

Signed-off-by: Dave Jones <davej@redhat.com>
2006-12-17 19:07:35 -05:00
Rafa Bilski
db2fb9db57 [CPUFREQ] Longhaul - Add support for CN400
Support for CN400 northbridge when ACPI C3 isn't available.
Tested on Epia SP13000. Thanks to Robert for testing it.

Signed-off-by: Rafa Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-12-12 17:33:10 -05:00
Rafa Bilski
3f4a25f17e [CPUFREQ] Longhaul - fix 200MHz FSB
On board of Epia SP13000 is 10x133Mhz VIA Nehemiah. It is reported
as 10x200MHz. This patch is fixing this issue.

Signed-off-by: Rafa Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-12-12 17:33:10 -05:00
Rafa Bilski
eed7d41257 [CPUFREQ] longhaul: remove duplicated code.
removing duplicated code.

Signed-off-by: Rafa Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-09-27 17:03:36 -04:00
rafalbilski@interia.pl
7f1be89247 [CPUFREQ] Longhaul - Disable arbiter CLE266
Please ignore previous message.

This patch is adding support for CPU connected to CLE266
chipset. For older CPU this is only way. For "Powersaver"
processor this way will be used if ACPI C3 isn't supported.

I have tested it. It seems to work exacly like ACPI.
But it is less safe. On CLE266 chipset port 0x22 is
blocking processor access to PCI bus too.

Signed-off-by: Rafa³ Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-09-26 23:12:02 -04:00
Rafa Bilski
db44aaf3a2 [CPUFREQ] Longhaul - Add voltage scaling to driver
Rename option "dont_scale_voltage" to "scale_voltage" because
don't will be default.
Use "pos" for calculating voltage. In this way driver don't need
to know mV value or low level value. Simply min U is one pos and
max U is second pos. All pos between these two are used.
Assume that min U is for min f and max U for max f. For frequency
between min and max calculate pos based on difference between
current frequency and min f.
Values in mobile VRM table changed to values from
C3-M datasheet.

Signed-off-by: Rafa Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-09-05 17:28:42 -04:00
Rafa Bilski
6595413fc9 [CPUFREQ] Longhaul - Add ignore_latency option
Some laptops with VIA C3 processor, CLE266 chipset and
AMI BIOS have incorrect latency values in FADT table. These
laptops seems to be C3 capable, but latency values are to
big: 101 for C2 and 1017 for C3. This option will allow
user to skip C3 latency test but not C3 address test. AMI
BIOS is setting C3 address to correct value in DSDT table.

Signed-off-by: Rafa Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-08-14 01:18:53 -04:00
Rafa Bilski
179da8e6e8 [CPUFREQ] Longhaul - Disable arbiter
ACPI C3 works for "Powersaver" processors, so use it only for them.

Older CPU will change frequency on "halt" only. But we can protect transition
in two ways:
- by ACPI PM2 register, there is "bus master arbiter disable" bit.
  This isn't tested because VIA mainboards don't have PM2 register,
- by PLE133 PCI/AGP arbiter disable register.
  There are two bits in this register. First is "PCI arbiter disable",
  second "AGP arbiter disable". This is working on VIA Epia 800 mainboards.

Test on bm_control is more proper because this is true
when PM2 register exist.

Signed-off-by: Rafa Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-08-11 17:59:57 -04:00
Rafa Bilski
32deb2d5c4 [CPUFREQ] Longhaul - Rename & fix multipliers table
This table is only used by Ezra-T CPUs currently, and has values
for some other CPU. Fix them to match the values used by that CPU,
and for now make it clearer by renaming the variable.

Signed-off-by: Rafa Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-07-31 18:37:06 -04:00
Rafa Bilski
9fb31c3a1d [CPUFREQ] Longhaul - Fix power state test to do something more useful
This is changing "always true" test to something usefull.

Signed-off-by: Rafa Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-07-31 18:37:06 -04:00
Rafa Bilski
eb23c751d8 [CPUFREQ] Longhaul - Readd accidentally dropped line
I lost very important line in do_powersaver

Signed-off-by: Rafa Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-07-31 18:37:05 -04:00
Adrian Bunk
c4a96c1eba [CPUFREQ] Make longhaul_walk_callback() static
This patch makes the needlessly global longhaul_walk_callback() static.

Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-07-31 18:37:05 -04:00
Rafa Bilski
0d6daba5fa [CPUFREQ] Longhaul - Initialise later.
Without this longhaul will always fail when compiled into kernel,
as it needs to initialise after the ACPI processor module.

I lost this when I was splitting patches. Sorry.

Signed-off-by: Rafa Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-07-31 18:37:05 -04:00
Rafa Bilski
48b7bde0f6 [CPUFREQ] Longhaul - Workaround issues with APIC.
There is no need to worry about local APIC.
There is need to worry about I/O APIC, because I/O APIC
is replacing good old 8259. According to Nehemiah datasheet VIA is
using 3-wire bus to connect local APIC to I/O APIC.

"[...] When IA32_APIC_BASE[11] is set to 0, processor APICs based on the 3-wire APIC
 bus cannot be generally re-enabled until a system hardware reset. The 3-wire bus
 looses track of arbitration that would be necessary for complete re-enabling. Certain
 (local) APIC functionality can be enabled. [...]"

So we must set disable bit for each interrupt in I/O APIC registers.
Same situation as for PIC - we must poke registers direcly.
How to do this? I don't know. So at the moment it is better to fail.

Signed-off-by: Rafa Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-07-31 18:37:05 -04:00
Rafa Bilski
dadb49d874 [CPUFREQ] Longhaul - Hook into ACPI C states.
Minimal change necessary for hardware support.

Changes in longhaul.c:
- most important - now C3 state is causing transition,
- code responsible for clearing "bus master" bit removed,
- protect bcr2 transition in the same way as longhaul.

Signed-off-by: Rafa Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-07-31 18:37:05 -04:00
Dave Jones
8eebf1a4c3 [CPUFREQ] Remove redundant initialisation from longhaul.
Signed-off-by: Dave Jones <davej@redhat.com>
2006-05-30 17:40:16 -04:00
Dave Jones
e2aa8732ac [CPUFREQ] Clean up longhaul's speed pretty-printer
Getting ready to move to core cpufreq.
- Use snprintf
- Remove unnecessary nesting improving readability.

Signed-off-by: Dave Jones <davej@redhat.com>
2006-05-30 17:37:15 -04:00
Linus Torvalds
529980c8b0 Merge master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreq 2005-09-08 17:24:34 -07:00
Zachary Amsden
4bb0d3ec3e [PATCH] i386: inline asm cleanup
i386 Inline asm cleanup.  Use cr/dr accessor functions.

Also, a potential bugfix.  Also, some CR accessors really should be volatile.
Reads from CR0 (numeric state may change in an exception handler), writes to
CR4 (flipping CR4.TSD) and reads from CR2 (page fault) prevent instruction
re-ordering.  I did not add memory clobber to CR3 / CR4 / CR0 updates, as it
was not there to begin with, and in no case should kernel memory be clobbered,
except when doing a TLB flush, which already has memory clobber.

I noticed that page invalidation does not have a memory clobber.  I can't find
a bug as a result, but there is definitely a potential for a bug here:

#define __flush_tlb_single(addr) \
	__asm__ __volatile__("invlpg %0": :"m" (*(char *) addr))

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-05 00:06:11 -07:00
Dave Jones
52c18fd2dc [CPUFREQ] Remove trailing whitespace before \n's in printks.
From: Denis Vlasenko <vda@ilport.com.ua>
Signed-off-by: Dave Jones <davej@redhat.com>
2005-09-01 11:01:02 -07:00
Dave Jones
6778bae0f2 [CPUFREQ] longhaul - adjust transition latency.
From patch by: Ken Staton <ken_staton@agilent.com>
Signed-off-by: Dave Jones <davej@redhat.com>
2005-05-31 19:03:51 -07:00
Dave Jones
1174631418 [CPUFREQ] Longhaul: Magic timer frobbing.
As mandated by the spec, disable timer around transitions.

From code by : Ken Staton <ken_staton@agilent.com
Signed-off-by: Dave Jones <davej@redhat.com>
2005-05-31 19:03:51 -07:00