Commit graph

7 commits

Author SHA1 Message Date
Stephen Boyd
5a727ff630 clk: hisilicon: Remove usage of CLK_IS_BASIC
This flag doesn't look to be used by any code, just set in various clk
init structures and then never tested again. Remove it from these
drivers as it doesn't provide any benefit.

Cc: Jiancheng Xue <xuejiancheng@hisilicon.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Jianguo Sun <sunjianguo1@huawei.com>
Cc: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-12-10 14:43:21 -08:00
Stephen Boyd
ed9c62f75a Merge branch 'clk-const' into clk-next
* clk-const:
  clk: make clk_init_data const
  clk: imx: make clk_ops const
  clk: mmp: make clk_ops const
  clk: hisilicon: make clk_ops const
  clk: mxs: make clk_ops const
  clk: sirf: make clk_ops const
  clk: spear: make clk_ops const
  CLK: SPEAr: make aux_clk_masks structures const
  CLK: SPEAr: make structure field and function argument as const
2017-11-14 10:07:38 -08:00
Markus Elfring
90c42090c0 clk: hisilicon: Delete an error message for a failed memory allocation in hisi_register_clkgate_sep()
Omit an extra message for a memory allocation failure in this function.

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Reviewed-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-11-14 09:49:00 -08:00
Bhumika Goyal
9108620d2d clk: hisilicon: make clk_ops const
Make these const as they are only stored in the const field of a
clk_init_data structure.

Signed-off-by: Bhumika Goyal <bhumirks@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-11-01 23:25:45 -07:00
Leo Yan
55da97e38c clk: hisilicon: fix lock assignment
In clock driver initialize phase the spinlock is missed to assignment
to struct clkgate_separated, finally there have no locking to protect
exclusive accessing for clock registers.

This bug introduces the console has no output after enable coresight
driver on 96boards Hikey; this is because console using UART3, which
has shared the same register with coresight clock enabling bit. After
applied this patch it can assign lock properly to protect exclusive
accessing, and console can work well after enabled coresight modules.

Fixes: 0aa0c95f74 ("clk: hisilicon: add common clock support")
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-01-26 16:18:34 -08:00
Stephen Boyd
593438e44c clk: hisilicon: Remove clk.h include
Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver. Also drop the clkdev.h include in files that
aren't using it.

Cc: Bintian Wang <bintian.wang@huawei.com>
Cc: Zhangfei Gao <zhangfei.gao@linaro.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 10:53:06 -07:00
Haojian Zhuang
0aa0c95f74 clk: hisilicon: add common clock support
Enable common clock driver of Hi3620 SoC. clkgate-seperated driver is
used to support the clock gate that enable/disable/status registers
are seperated.

Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
2013-12-04 18:36:45 +08:00