The ->read_xxx() methods are all passed the page number the NAND controller
is supposed to read, but ->write_xxx() do not have such a parameter.
This is a problem if we want to properly implement data
scrambling/randomization in order to mitigate MLC sensibility to repeated
pattern: to prevent bitflips in adjacent pages in the same block we need
to avoid repeating the same pattern at the same offset in those pages,
hence the randomizer/scrambler engine need to be passed the page value
in order to adapt its seed accordingly.
Moreover, adding the page parameter to the ->write_xxx() methods add some
consistency to the current API.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
CC: Josh Wu <josh.wu@atmel.com>
CC: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
CC: Maxime Ripard <maxime.ripard@free-electrons.com>
CC: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
CC: Huang Shijie <shijie.huang@arm.com>
CC: Stefan Agner <stefan@agner.ch>
CC: devel@driverdev.osuosl.org
CC: linux-arm-kernel@lists.infradead.org
CC: linux-kernel@vger.kernel.org
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Owner is automatically set by mtdcore. Make use of that.
Signed-off-by: Frans Klaver <fransklaver@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Read Denali hardware revision number and use it to
calculate max_banks, The encoding of max_banks changed
in Denali revision 5.1.
Signed-off-by: Graham Moore <grmoore@opensource.altera.com>
[Brian: parentheses around macro arg]
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
A read id operation followed by 0x00 reads the device ID while
a read id operation followed by 0x20 reads the possible ONFI identifier.
As the READID function did not propagate the second id parameter but had
a hard-coded call for 0x90 0x00, reading the ONFI identifier was not
possible and thus chips werde not detected (tested with
MT29F8G08ABABAWP)
Signed-off-by: Enrico Jorns <ejo@pengutronix.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
The Denali Controller IP does not support sub-page writes.
Signed-off-by: Graham Moore <grmoore@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
This driver uses NAND_ECC_HW_SYNDROME mode. The nand_scan_tail()
function would not complain about missing ecc->calculate,
ecc->correct, ecc->hwctl handlers.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
commit 3157d1ed23 ("mtd: denali: remove unnecessary casts") introduced
an error by using a wrong bitmask.
A uint16_t cast was replaced with & 0xff, should be & 0xffff.
Signed-off-by: Graham Moore <grmoore@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
- Fix indents
- Do not break a line unless it is longer than 80 columns
- Do not insert a whitespace before ';'
- Use whitespaces around operators
- Use braces for a "else" block where the "if" block uses ones.
Besides, eliminate all the warnings reported by checkpatch.pl:
- WARNING: quoted string split across lines
- WARNING: else is not generally useful after a break or return
- WARNING: Missing a blank line after declarations
- WARNING: Avoid line continuations in quoted strings
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
We should use parentheses only when they are necessary
or they really improve the readability.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Josh Triplett <josh@joshtriplett.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
The variable "irq_status" in denali_read_page_raw() is set, but not used.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
The variable "retry" in wait_for_irq() is set, but not used.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Josh Triplett <josh@joshtriplett.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
We should rathar use "int" type for loop iterators.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Useless casts result in unreadable source code.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
All of these variables are initialized to zero and then
set to a different value below.
Zero-initializing is redundant.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
We should use
/*
* Blah Blah ...
* ...
*/
for multi-line comment blocks.
In addition, refactor some comments where it seems reasonable and
remove some comments where the code is clear enough such as:
/* clear interrupts */
clear_interrupts(denali);
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Josh Triplett <josh@joshtriplett.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
The condition "if (irq_status == 0)" already ensures that one half of
the ternary ?: is dead. I think this should probably actually be a FAIL,
not a PASS.
Caught by Coverity.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: Jamie Iles <jamie@jamieiles.com>
MAP10 command with '0x2000' data sets up a read-ahead/write access.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
The Denali NAND driver reads only 5 bytes of ID, but some Hynix and Samsung
have size parameters in the 6th byte. As a result, the page and oob size
for a Hynix H27UAG8T2B were calculated incorrectly and the driver failed to
load.
The solution is to read 8 bytes of ID, as expected by the NAND framework.
Signed-off-by: Graham Moore <grmoore@altera.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
The nand_chip::erase_cmd callback previously served a dual purpose; for
one, it allowed a per-flash-chip override, so that AG-AND devices could
use a different erase command than other NAND. These AND devices were
dropped in commit 14c6578683 (mtd: nand:
remove AG-AND support). On the other hand, some drivers (denali and
doc-g4) need to use this sort of callback to implement
controller-specific erase operations.
To make the latter operation easier for some drivers (e.g., ST's new BCH
NAND driver), it helps if the command dispatch and wait functions can be
lumped together, rather than called separately.
This patch does two things:
1. Pull the call to chip->waitfunc() into chip->erase_cmd(), and return
the status from this callback
2. Rename erase_cmd() to just erase(), since this callback does a
little more than just send a command
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Tested-by: Lee Jones <lee.jones@linaro.org>
This patch kills the NAND_MAX_PAGESIZE/NAND_MAX_OOBSIZE by the following
way:
1.) change the @buf field of nand_buf{} from an array to a pointer.
also remove the DENALI_BUF_SIZE macro.
2.) Before we call the nand_scan_ident, we allocate a temporary buffer
whose size is PAGE_SIZE.
3.) After we finish the nand_scan_ident, we have already getten the
page size and oob size. We will allocate the right buffer size
again.
Signed-off-by: Huang Shijie <shijie8@gmail.com>
Reviewed-by: Josh Triplett <josh@joshtriplett.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
This patch marks the function is_erased() as static in denali.c because
it is not used outside this file.
This patch elimiates the following warning in nand/denali.c:
drivers/mtd/nand/denali.c:900:6: warning: no previous prototype for ‘is_erased’ [-Wmissing-prototypes]
Signed-off-by: Rashika Kheria <rashika.kheria@gmail.com>
Reviewed-by: Josh Triplett <josh@joshtriplett.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Add a helper to check if a nand chip is SLC or MLC.
This helper makes the code more readable.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Use NAND_CI_CELLTYPE_MSK to extract the cell type from nand_chip.cellinfo
instead of hardcoded constant.
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Cc: Artem Bityutskiy <dedekind1@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
The Denali controller can also be found in SoC devices attached to a
simple bus. Move the PCI specific parts into denali_pci so that we can
add a denali_dt that uses the same driver but for a device tree driver
instead of a PCI based device.
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
There is an implemention of hardware ECC write page function which may return an
error indication.
For instance, using Atmel HW PMECC to write one page into a nand flash, the hardware
engine will compute the BCH ecc code for this page. so we need read a the
status register to theck whether the ecc code is generated.
But we cannot assume the status register always can be ready, for example,
incorrect hardware configuration or hardware issue, in such case we need
write_page() to return a error code.
Since the definition of 'write_page' function in struct nand_ecc_ctrl is 'void'.
So this patch will:
1. add return 'int' value for 'write_page' function.
2. to be consitent, add return 'int' value for 'write_page_raw' fuctions too.
3. add code to test the return value, and if negative, indicate an
error happend when write page with ECC.
4. fix the compile warning in all impacted nand flash driver.
Note: I couldn't compile-test all of these easily, as some had ARCH dependencies.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
As of [mtd: nand: remove autoincrement 'sndcmd' code], the
NAND_CMD_READ0 command is issued unconditionally.
Thus, read_oob/read_oob_raw's 'sndcmd' argument is no longer needed, as
well as their return code.
Remove the 'sndcmd' parameter, and set the return code to 0.
Signed-off-by: Shmulik Ladkani <shmulik.ladkani@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
New NAND controllers can perform read/write via HW engines which don't expose
OOB data in their DMA mode. To reflect this, we should rework the nand_chip /
nand_ecc_ctrl interfaces that assume that drivers will always read/write OOB
data in the nand_chip.oob_poi buffer. A better interface includes a boolean
argument that explicitly tells the callee when OOB data is requested by the
calling layer (for reading/writing to/from nand_chip.oob_poi).
This patch adds the 'oob_required' parameter to each relevant {read,write}_page
interface; all 'oob_required' parameters are left unused for now. The next
patch will set the parameter properly in the nand_base.c callers, and follow-up
patches will make use of 'oob_required' in some of the callee functions.
Note that currently, there is no harm in ignoring the 'oob_required' parameter
and *always* utilizing nand_chip.oob_poi, but there can be
performance/complexity/design benefits from avoiding filling oob_poi in the
common case. I will try to implement this for some drivers which can be ported
easily.
Note: I couldn't compile-test all of these easily, as some had ARCH
dependencies.
[dwmw2: Merge later 1/0 vs. true/false cleanup]
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Reviewed-by: Shmulik Ladkani <shmulik.ladkani@gmail.com>
Acked-by: Jiandong Zheng <jdzheng@broadcom.com>
Acked-by: Mike Dunn <mikedunn@newsguy.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
The ecc.read_page() method for nand drivers is changed to return the maximum
number of bitflips that were corrected on any one region covering an ecc step,
This patch doesn't change what the nand code returns to mtd.
This v2 includes the change to the fsl_ifc_nand driver requested by Scott¹.
¹ http://lists.infradead.org/pipermail/linux-mtd/2012-April/040883.html
Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Acked-by (freescale changes): Scott Wood <scottwood@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This patch converts the drivers in drivers/mtd/* to use module_pci_driver()
macro which makes the code smaller and a bit simpler.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Flash device drivers initialize 'ecc_strength' in struct mtd_info, which is the
maximum number of bit errors that can be corrected in one writesize region.
Drivers using the nand interface intitialize 'strength' in struct nand_ecc_ctrl,
which is the maximum number of bit errors that can be corrected in one ecc step.
Nand infrastructure code translates this to 'ecc_strength'.
Also for nand drivers, the nand infrastructure code sets ecc.strength for ecc
modes NAND_ECC_SOFT, NAND_ECC_SOFT_BCH, and NAND_ECC_NONE. It is set in the
driver for all other modes.
Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Commit c89eeda810 (mtd: denali: detect the
number of banks) introduced runtime detection of the number of banks.
However, denali_nand_reset() uses uses denanli_nand_info::max_banks so
we need to detect the maximum number of banks before doing the reset.
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
The implementation of nand_release() already call mtd_device_unregister(),
no need to call it again.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Recall the recently added prefix requirements:
* "NAND_" for flags in nand.h, used in nand_chip.options
* "NAND_BBT_" for flags in bbm.h, used in nand_chip.bbt_options
or in nand_bbt_descr.options
Thus, I am changing NAND_USE_FLASH_BBT to NAND_BBT_USE_FLASH.
Again, this flag is found in bbm.h and so should NOT be used in the
"nand_chip.options" field.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
This patch works with the following three flags from two headers (nand.h
and bbm.h):
(1) NAND_USE_FLASH_BBT (nand.h)
(2) NAND_USE_FLASH_BBT_NO_OOB (nand.h)
(3) NAND_BBT_NO_OOB (bbm.h)
These flags are all related and interdependent, yet they were in
different headers. Flag (2) is simply the combination of (1) and (3) and
can be eliminated.
This patch accomplishes the following:
* eliminate NAND_USE_FLASH_BBT_NO_OOB (i.e., flag (2))
* move NAND_USE_FLASH_BBT (i.e., flag (1)) to bbm.h
It's important to note that because (1) and (3) are now both found in
bbm.h, they should NOT be used in the "nand_chip.options" field.
I removed a small section from the mtdnand DocBook because it referes to
NAND_USE_FLASH_BBT in nand.h, which has been moved to bbm.h.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
The older add_mtd_device()/add_mtd_partitions() and their removal
counterparts will soon be gone. Replace uses with mtd_device_register()
and mtd_device_unregister().
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Not all configurations of the Denali controller support 4 banks. The
controller can support between 1 and 16 banks. Detect this from the
design features register.
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
The controller has interrupt enable/status register pairs for each bank
(along with ECC and status registers) that differ only in address offset.
Rather than providing definitions for each register, make the address a
macro so that it scales for devices with different numbers of banks.
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Rather than using the PCI specific DMA API, convert to the generic
DMA API so that we can use the Denali NAND controller on other bus
types.
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
The kernel already prints its build timestamp during boot, no need to
repeat it in random drivers and produce different object files each
time.
Signed-off-by: Michal Marek <mmarek@suse.cz>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
All hardware initialization will be done in denali_hw_init before
irq handler registered
Change mtd name from "DENALI NAND" to be "denali-nand" since whitespace in
name can cause problems if we use cmdlinepart
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
In mtd->write, Denali controller will use MODE_11 mode to read
NAND flash status, then return back to MODE_1O mode to do page
write.
Here comes a bug for this kind of using, sometimes controller will
not write data to NAND and just return a good interrupt to tell
driver writing work is done. The data in this page is all 0xff and
this page can not be written again. The reason is unknow.
So read Denali controller register WRITE_PROTECT to get NAND status
instead.
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
waring: no space for starting a line
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Once the last ECC error was handled, controller will triger an
interrupt. If this interrupt can not be clean on time, controller
may corrupt.
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
