Commit graph

4 commits

Author SHA1 Message Date
Srinidhi Kasagar
4e4eb42999 ARM: 5832/1: ARM: U8500 Makefile.boot
The Makefile.boot for the U8500 platform

Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-28 10:22:52 +00:00
Srinidhi Kasagar
aa44ef4d43 ARM: 5831/1: ARM: U8500 core machine support
Adds core support for the ST-Ericsson U8500
platform. It supports memory mappings, binds to
the existing modules like GIC, SCU, TWD and
local timers and sets up the infrastructure for
the secondary core.

Reviewed-by: Alessandro Rubini <rubini@unipv.it>
Reviewed-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-28 10:22:52 +00:00
Srinidhi Kasagar
c6b503caef ARM: 5830/1: ARM: U8500 clock framework
Adds basic clock framework to the U8500 platform.
Currently it just uses the clock lookup table
and add the each entry to the clkdevice. More
complex clock management to follow soon

Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-28 10:22:52 +00:00
Srinidhi Kasagar
ffae4e014a ARM: 5829/1: ARM: U8500 register definitions
Adds register definitions, shared peripheral interrupt
numbers (SHPI) and IO mappings for the U8500 core support.
SHPI are assigned to [160:32] where first 32 interrupts
are reserved.

Reviewed-by: Alessandro Rubin <rubini@unipv.it>
Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-28 10:22:51 +00:00