Commit graph

1042 commits

Author SHA1 Message Date
Ramneek Mehresh
621c4b999e powerpc/85xx: Add dr_mode property in USB nodes
Add usb2 controller node for P1020RDB, P2020RDB, P2020DS, P1021MDS

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-01-18 08:05:42 -06:00
Ramneek Mehresh
70a0ac6686 powerpc/85xx: Enable USB2 controller node for P1020RDB
Enable USB2 controller node for P1020RDB. USB2 controller is used only
when board boots from SPI or SD as it is muxed with eLBC

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-01-18 08:05:36 -06:00
Jerry Huang
f8b5a31877 powerpc/85xx: Fix cmd12 bug and add the chip compatible for eSDHC
According to latest kernel, the auto-cmd12 property should be
"sdhci,auto-cmd12", and according to the SDHC binding and the workaround for
the special chip, add the chip compatible for eSDHC: "fsl,p1022-esdhc",
"fsl,mpc8536-esdhc", "fsl,p1020-esdhc", "fsl,p2020-esdhc" and
"fsl,p1010-esdhc".

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-01-18 08:01:53 -06:00
Linus Torvalds
c63dbbd526 Merge branch 'kbuild' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild
* 'kbuild' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild:
  Kbuild: Use dtc's -d (dependency) option
  dtc: Implement -d option to write out a dependency file
  kbuild: Fix comment in Makefile.lib
  scripts/genksyms: clean lex/yacc generated files
  kbuild: Correctly deal with make options which contain an "s"
2012-01-16 14:34:54 -08:00
Stephen Warren
7c43185138 Kbuild: Use dtc's -d (dependency) option
This hooks dtc into Kbuild's dependency system.

Thus, for example, "make dtbs" will rebuild tegra-harmony.dtb if only
tegra20.dtsi has changed yet tegra-harmony.dts has not. The previous
lack of this feature recently caused me to have very confusing "git
bisect" results.

For ARM, it's obvious what to add to $(targets). I'm not familiar enough
with other architectures to know what to add there. Powerpc appears to
already add various .dtb files into $(targets), but the other archs may
need something added to $(targets) to work.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
[mmarek: Dropped arch/c6x part to avoid merging commits from the middle
of the merge window]
Signed-off-by: Michal Marek <mmarek@suse.cz>
2012-01-15 00:04:35 +01:00
Linus Torvalds
e4e88f31bc Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (185 commits)
  powerpc: fix compile error with 85xx/p1010rdb.c
  powerpc: fix compile error with 85xx/p1023_rds.c
  powerpc/fsl: add MSI support for the Freescale hypervisor
  arch/powerpc/sysdev/fsl_rmu.c: introduce missing kfree
  powerpc/fsl: Add support for Integrated Flash Controller
  powerpc/fsl: update compatiable on fsl 16550 uart nodes
  powerpc/85xx: fix PCI and localbus properties in p1022ds.dts
  powerpc/85xx: re-enable ePAPR byte channel driver in corenet32_smp_defconfig
  powerpc/fsl: Update defconfigs to enable some standard FSL HW features
  powerpc: Add TBI PHY node to first MDIO bus
  sbc834x: put full compat string in board match check
  powerpc/fsl-pci: Allow 64-bit PCIe devices to DMA to any memory address
  powerpc: Fix unpaired probe_hcall_entry and probe_hcall_exit
  offb: Fix setting of the pseudo-palette for >8bpp
  offb: Add palette hack for qemu "standard vga" framebuffer
  offb: Fix bug in calculating requested vram size
  powerpc/boot: Change the WARN to INFO for boot wrapper overlap message
  powerpc/44x: Fix build error on currituck platform
  powerpc/boot: Change the load address for the wrapper to fit the kernel
  powerpc/44x: Enable CRASH_DUMP for 440x
  ...

Fix up a trivial conflict in arch/powerpc/include/asm/cputime.h due to
the additional sparse-checking code for cputime_t.
2012-01-06 17:58:22 -08:00
Kumar Gala
f706bed114 powerpc/fsl: update compatiable on fsl 16550 uart nodes
The Freescale serial port's are pretty much a 16550, however there are
some FSL specific bugs and features.  Add a "fsl,ns16550" compatiable
string to allow code to handle those FSL specific issues.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-01-04 15:38:40 -06:00
Timur Tabi
0725696306 powerpc/85xx: fix PCI and localbus properties in p1022ds.dts
PCI ranges, localbus reg and localbus chip-select 2 range do not match
the memory map setup by bootloader.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-01-04 15:33:58 -06:00
Andy Fleming
220669495b powerpc: Add TBI PHY node to first MDIO bus
Systems which use the fsl_pq_mdio driver need to specify an
address for TBI PHY transactions such that the address does
not conflict with any PHYs on the bus (all transactions to
that address are directed to the onboard TBI PHY). The driver
used to scan for a free address if no address was specified,
however this ran into issues when the PHY Lib was fixed so
that all MDIO transactions were protected by a mutex. As it
is, the code was meant to serve as a transitional tool until
the device trees were all updated to specify the TBI address.

The best fix for the mutex issue was to remove the scanning code,
but it turns out some of the newer SoCs have started to omit
the tbi-phy node when SGMII is not being used. As such, these
devices will now fail unless we add a tbi-phy node to the first
mdio controller.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-01-04 15:33:51 -06:00
Suzuki Poulose
eba3d97db8 powerpc/boot: Change the WARN to INFO for boot wrapper overlap message
commit c55aef0e5b ("powerpc/boot: Change the load address
for the wrapper to fit the kernel") introduced a WARNING to
inform the user that the uncompressed kernel would overlap
the boot uncompressing wrapper code. Change it to an INFO.

I initially thought, this would be a 'WARNING' for the those
boards, where the link_address should be fixed, so that the
user can take actions accordingly.

Changing the same to INFO.

Signed-off-by: Suzuki K. Poulose <suzuki@in.ibm.com>
Signed-off-by: Josh Boyer <jwboyer@gmail.com>
2011-12-21 15:09:25 -05:00
Suzuki Poulose
c55aef0e5b powerpc/boot: Change the load address for the wrapper to fit the kernel
The wrapper code which uncompresses the kernel in case of a 'ppc' boot
is by default loaded at 0x00400000 and the kernel will be uncompressed
to fit the location 0-0x00400000. But with dynamic relocations, the size
of the kernel may exceed 0x00400000(4M). This would cause an overlap
of the uncompressed kernel and the boot wrapper, causing a failure in
boot.

The message looks like :

   zImage starting: loaded at 0x00400000 (sp: 0x0065ffb0)
   Allocating 0x5ce650 bytes for kernel ...
   Insufficient memory for kernel at address 0! (_start=00400000, uncompressed size=00591a20)

This patch shifts the load address of the boot wrapper code to the next
higher MB, according to the size of  the uncompressed vmlinux.

With the patch, we get the following message while building the image :

 WARN: Uncompressed kernel (size 0x5b0344) overlaps the address of the wrapper(0x400000)
 WARN: Fixing the link_address of wrapper to (0x600000)

Signed-off-by: Suzuki K. Poulose <suzuki@in.ibm.com>
Signed-off-by: Josh Boyer <jwboyer@gmail.com>
2011-12-20 10:22:56 -05:00
Benjamin Herrenschmidt
1e7342e778 Merge remote-tracking branch 'jwb/next' into next
Conflicts:
	arch/powerpc/platforms/40x/ppc40x_simple.c
2011-12-16 11:24:25 +11:00
Tony Breeds
228d550533 powerpc/47x: Add support for the new IBM currituck platform
Based on original work by David 'Shaggy' Kleikamp.

Signed-off-by: Tony Breeds <tony@bakeyournoodle.com>
Signed-off-by: Josh Boyer <jwboyer@gmail.com>
2011-12-09 07:51:40 -05:00
Tony Breeds
075bcf5879 powerpc/boot: Add mfdcrx
Needed for currituck support.

Signed-off-by: Tony Breeds <tony@bakeyournoodle.com>
Signed-off-by: Josh Boyer <jwboyer@gmail.com>
2011-12-09 07:49:50 -05:00
Tony Breeds
e32a03290c powerpc/boot: Add extended precision shifts to the boot wrapper.
The upcomming currituck patches will need to do 64-bit shifts which will
fail with undefined symbol without this patch.

I looked at linking against libgcc but we can't guarantee that libgcc
was compiled with soft-float.  Also Using ../lib/div64.S or
../kernel/misc_32.S, this will break the build as the .o's need to be
built with different flags for the bootwrapper vs the kernel.  So for
now the easyest option is to just copy code from
arch/powerpc/kernel/misc_32.S  I don't think this code changes too often ;P

Signed-off-by: Tony Breeds <tony@bakeyournoodle.com>
Signed-off-by: Josh Boyer <jwboyer@gmail.com>
2011-12-09 07:49:27 -05:00
Benjamin Herrenschmidt
11eab297f5 powerpc: Add support for OpenBlockS 600
So I've had one of these for a while and it looks like the vendor never
bothered submitting the support upstream.

This adds it using ppc40x_simple and provides a device-tree.

There are some changes to the boot wrapper because the way u-boot works
on this thing, it seems to expect a multipart image with the kernel,
initrd and dtb in it.

The USB support is missing as it needs the yet unmerged driver for
the DWC OTG part and the GPIOs may need further definition in the dts.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-12-08 14:22:52 +11:00
David S. Miller
b3613118eb Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net 2011-12-02 13:49:21 -05:00
Wolfgang Grandegger
fa17a019c8 powerpc: tqm8548/tqm8xx: add and update CAN device nodes
This patch enables or updates support for the CC770 and AN82527
CAN controller on the TQM8548 and TQM8xx boards.

CC: devicetree-discuss@lists.ozlabs.org
CC: linuxppc-dev@ozlabs.org
CC: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2011-12-01 13:09:32 -05:00
Tanmay Inamdar
d5b9ee7b51 powerpc/40x: Add APM8018X SOC support
The AppliedMicro APM8018X embedded processor targets embedded applications that
require low power and a small footprint. It features a PowerPC 405 processor
core built in a 65nm low-power CMOS process with a five-stage pipeline executing
up to one instruction per cycle. The family has 128-kbytes of on-chip memory,
a 128-bit local bus and on-chip DDR2 SDRAM controller with 16-bit interface.

Signed-off-by: Tanmay Inamdar <tinamdar@apm.com>
Signed-off-by: Josh Boyer <jwboyer@gmail.com>
2011-11-30 10:02:15 -05:00
Timur Tabi
c0019a4d67 powerpc/85xx: add pixis indirect mode device tree node
The Freescale P1022 has a unique pin muxing "feature" where the DIU video
controller's video signals are muxed with 24 of the local bus address signals.
When the DIU is enabled, the bulk of the local bus is disabled, preventing
access to memory-mapped devices like NOR flash and the pixis FPGA.

In this situation, the pixis supports "indirect mode", which allows access
to the pixis itself by reading/writing addresses on specific local bus
chip selects.  CS0 is used to select which pixis register to access, and
CS1 is used to read/write the value.

To support this, we introduce another board-control child node of the
localbus node that contains a 'reg' property for CS0 and CS1.  This will
produce the correct physical addresses for CS0 and CS1.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:40 -06:00
Kumar Gala
54986964c1 powerpc/85xx: Update SRIO device tree nodes
Update all dts files that support SRIO controllers to match the new
fsl,srio device tree binding.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:39 -06:00
Kumar Gala
03f4201bd4 powerpc/85xx: Rework P5020DS device tree
Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Adding of MPIC timer blocks
* Dropping "fsl,p5020-IP..." from compatibles for standard blocks
* Removed mpic interrupt-parent from dcsr-epu node, just use top level
* Removed mpic interrupt-parent from sec nodes, just use top level

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:39 -06:00
Kumar Gala
b9db022c62 powerpc/85xx: Rework P4080DS device trees
Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Adding of MPIC timer blocks
* Dropping "fsl,p4080-IP..." from compatibles for standard blocks
* Removed mpic interrupt-parent from dcsr-epu node, just use top level
* Removed mpic interrupt-parent from sec nodes, just use top level

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:39 -06:00
Kumar Gala
8389c823b5 powerpc/85xx: Rework P3060QDS device tree
Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Adding of MPIC timer blocks
* Dropping "fsl,p3060-IP..." from compatibles for standard blocks
* Removed mpic interrupt-parent from dcsr-epu node, just use top level
* Removed mpic interrupt-parent from sec nodes, just use top level
* Fixed l3-cache IRQs, we have 2 CPCs, so we should have IRQs for both

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:39 -06:00
Kumar Gala
b4c3804d18 powerpc/85xx: Rework P3041DS device tree
Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Adding of MPIC timer blocks
* Dropping "fsl,p3041-IP..." from compatibles for standard blocks
* Removed mpic interrupt-parent from dcsr-epu node, just use top level
* Fixed some dcsr compatiable typo's from 'p43041' to 'p3041'

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:39 -06:00
Kumar Gala
8b8673b850 powerpc/85xx: Rework P2041RDB device tree
Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Adding of MPIC timer blocks
* Dropping "fsl,p2041-IP..." from compatibles for standard blocks
* Removed mpic interrupt-parent from dcsr-epu node, just use top level

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:39 -06:00
Kumar Gala
941d71c736 powerpc/85xx: Rework P2020RDB device tree
Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:

* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Reworked PCIe nodes to allow supportin IRQs for controller (errors) and
  moved PCI device IRQs down to virtual bridge level
* Updated spi node to new espi binding specification
* Renamed 'sdhci' node to 'sdhc'
* Changed GPIO compatiable from 'fsl,mpc8572-gpio' to 'fsl,pq3-gpio' as the
 'mpc8572' compatiable is to deal with a 'mpc8572' specific to an erratum
* Fixed wrong reg offsets for mdio nodes associated with etsec2 &
* etsec3
* Dropping "fsl,p2020-IP..." from compatibles for standard blocks

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:38 -06:00
Kumar Gala
7f9ce7143e powerpc/85xx: Rework P2020DS device tree
Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:

* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Reworked PCIe nodes to allow supportin IRQs for controller (errors)
  and moved PCI device IRQs down to virtual bridge level
* Updated spi node to new espi binding specification
* Renamed 'sdhci' node to 'sdhc'
* Changed GPIO compatiable from 'fsl,mpc8572-gpio' to 'fsl,pq3-gpio' as the
 'mpc8572' compatiable is to deal with a 'mpc8572' specific to an erratum
* Fixed wrong reg offsets for mdio nodes associated with etsec2 & etsec3
* Dropping "fsl,p2020-IP..." from compatibles for standard blocks

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:38 -06:00
Kumar Gala
b0e2f248b4 powerpc/85xx: Rework P1023RDS device tree
Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Dropping "fsl,p1023-IP..." from compatibles for standard blocks
* Removed incorrect power/pmc node, there are no etsec on P1023

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:38 -06:00
Kumar Gala
ab827d97bd powerpc/85xx: Rework P1022DS device tree
Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:

* Reworked PCIe nodes to allow supportin IRQs for controller (errors)
  and moved PCI device IRQs down to virtual bridge level
* Changed GPIO compatiable from 'fsl,mpc8572-gpio' to 'fsl,pq3-gpio' as the
  'mpc8572' compatiable is to deal with a 'mpc8572' specific to an erratum
* Updated spi node to new espi binding specification
* Renamed SDHC node from 'sdhci' to 'sdhc'
* Added usb node for 2nd usb controller
* Dropping "fsl,p1022-IP..." from compatibles for standard blocks
* Fixed bug in local bus range node for CS2, was maping to
  0x0 0x0xffa00000 instead of 0xf 0xffa00000
* Fixed localbus reg property should have been 0xf 0xffe05000

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Tested-by: Timur Tabi <timur@freescale.com>
2011-11-24 02:01:38 -06:00
Kumar Gala
ffeb33d20c powerpc/85xx: Rework P1021MDS device tree
Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:

* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Reworked PCIe nodes to allow supportin IRQs for controller (errors) and
  moved PCI device IRQs down to virtual bridge level
* Renamed SDHC node from 'sdhci' to 'sdhc'
* Added usb node for 2nd usb controller
* Dropping "fsl,p1021-IP..." from compatibles for standard blocks

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:38 -06:00
Kumar Gala
3316a83c7c powerpc/85xx: Add P1020RDB 36-bit address map device tree
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:38 -06:00
Kumar Gala
4e36afa7c5 powerpc/85xx: Rework P1020RDB device tree
Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Dropping "fsl,p1020-IP..." from compatibles for standard blocks
* Fixed PCIe interrupt-maps to have proper number of cells
* Added mdio node for etsec@26000
* Added usb node for 2nd usb controller

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:37 -06:00
Kumar Gala
4de0e39cb8 powerpc/85xx: Add a P1010RDB 36-bit address map device tree
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:37 -06:00
Kumar Gala
396a5a5691 powerpc/85xx: Add crypto engine to P1010 SoC device tree
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:37 -06:00
Kumar Gala
ae744b4118 powerpc/85xx: Add RTC to P1010RDB device tree
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:37 -06:00
Kumar Gala
96488746bb powerpc/85xx: Rework P1010RDB and P1010 device tree
Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Dropping "fsl,p1010-IP..." from compatibles for standard blocks
* PCI interrupt map - wrong IRQs for PCI-0 controller
* SDHC interrupt sense was wrong

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:37 -06:00
Kumar Gala
532919592f powerpc/85xx: Rework MPC8572DS device tree
Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:

* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Removed CPU properties setup by u-boot to match other .dts
* Reworked PCIe nodes to allow supportin IRQs for controller (errors) and
  moved PCI device IRQs down to virtual bridge level
* Moved mdio nodes up one level instead of under tsec nodes
* Added GPIO controller node to MPC8572 SoC template
* Dropping "fsl,mpc8572-IP..." from compatibles for standard blocks

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:37 -06:00
Kumar Gala
e7a7b329f2 powerpc/85xx: Rework MPC8569MDS device tree
Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Moved to a standard 2 #address-cells & #size-cells at top-level
* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Removed CPU properties setup by u-boot to match other .dts
* Reworked PCIe nodes to allow supportin IRQs for controller (errors)
  and moved PCI device IRQs down to virtual bridge level
* Renamed SDHC node from 'sdhci' to 'sdhc'
* Dropping "fsl,mpc8569-IP..." from compatibles for standard blocks

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:36 -06:00
Kumar Gala
1a23b4a64a powerpc/85xx: Rework MPC8568MDS device tree
Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Moved to a standard 2 #address-cells & #size-cells at top-level
* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Removed CPU properties setup by u-boot to match other .dts
* Reworked PCIe nodes to allow supportin IRQs for controller (errors)
  and moved PCI device IRQs down to virtual bridge level
* Dropping "fsl,mpc8568-IP..." from compatibles for standard blocks

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:36 -06:00
Kumar Gala
53e23dcb18 powerpc/85xx: Rework MPC8548CDS device trees
Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Moved to a standard 2 #address-cells & #size-cells at top-level
* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Moved mdio nodes up one level instead of under tsec nodes
* Reworked PCIe nodes to allow supportin IRQs for controller (errors)
  and moved PCI device IRQs down to virtual bridge level
* Removed CPU properties setup by u-boot to match other .dts
* Added localbus node, but no chipselect details at this point
* Added MPIC / PCIe msi node
* Dropping "fsl,mpc8548-IP..." from compatibles for standard blocks

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:36 -06:00
Kumar Gala
b7f817547d powerpc/85xx: Rework MPC8544DS device tree
Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Moved to a standard 2 #address-cells & #size-cells at top-level
* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Removed CPU properties setup by u-boot to match other .dts
* Added localbus node, but no chipselect details at this point
* Reworked PCIe nodes to allow supportin IRQs for controller (errors)
  and moved PCI device IRQs down to virtual bridge level
* Moved mdio nodes up one level instead of under tsec nodes
* Updated ethernet 'model' to 'eTSEC' as that's what on MPC8544
* Dropping "fsl,mpc8544-IP..." from compatibles for standard blocks

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:36 -06:00
Kumar Gala
2e8685a491 powerpc/85xx: Rework MPC8536DS device trees
Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Added localbus node, but no chipselect details at this point
* Reworked PCIe nodes to allow supportin IRQs for controller (errors)
* and moved
  PCI device IRQs down to virtual bridge level
* Moved mdio nodes up one level instead of under tsec nodes
* Added GPIO controller node to MPC8536 SoC template
  [ marked as MPC8572 compatiable to get errata handling that applies ]
* Added missing cache-line-size & cache-size properties missing from
  L2-cache node
* Added IP level IEEE 1588 / ptp timer node

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:36 -06:00
Kumar Gala
5652520000 powerpc/85xx: create dts components to build up an SoC
Introduce some common components that we can utilize to build up the
various PQ3/85xx device trees.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:36 -06:00
Kumar Gala
ce63873113 powerpc/85xx: p1020si.dtsi update interrupt handling
* set interrupt-parent at root so its not duplicate in every node
* Add mpic timers
* Move to 4-prop cells for mpic timer

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:35 -06:00
Kumar Gala
a45edbf9dc powerpc/85xx: Add ethernet magic packet property to P1020 device tree
All eTSEC2 controllers support waking on magic packet so fixup device
tree to report that.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:35 -06:00
Kumar Gala
43cfddc3d9 powerpc/85xx: Update P1020 SEC3.3 node to match actual SoC HW
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:35 -06:00
Kumar Gala
38b8f1687f powerpc/85xx: Update SPI binding to match binding spec for P1020RDB
The SPI node is out of date with regards to the binding for fsl-espi and
driver support.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:35 -06:00
Kumar Gala
fc2478e728 powerpc/85xx: Rework PCI nodes on P1020RDB
* Move SoC specific details like irq mapping to SoC dtsi
* Update interrupt property to cover both error interrupt and PCIe
  runtime interrupts

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:35 -06:00
Kumar Gala
1e6a9d04c2 powerpc/85xx: Simplify P1020RDB CAMP dts using includes
If we include the p1020rdb.dts instead of p1020si.dts we greatly reduce
duplication and maintenance.  We can just list which devices are
disabled for the given core and mpic protected sources.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:35 -06:00