linux-stable/arch/x86/kernel/cpu
Andi Kleen 06c1de44d3 x86/mtrr: Check if fixed MTRRs exist before saving them
commit 919f18f961 upstream.

MTRRs have an obsolete fixed variant for fine grained caching control
of the 640K-1MB region that uses separate MSRs. This fixed variant has
a separate capability bit in the MTRR capability MSR.

So far all x86 CPUs which support MTRR have this separate bit set, so it
went unnoticed that mtrr_save_state() does not check the capability bit
before accessing the fixed MTRR MSRs.

Though on a CPU that does not support the fixed MTRR capability this
results in a #GP.  The #GP itself is harmless because the RDMSR fault is
handled gracefully, but results in a WARN_ON().

Add the missing capability check to prevent this.

Fixes: 2b1f6278d7 ("[PATCH] x86: Save the MTRRs of the BSP before booting an AP")
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/all/20240808000244.946864-1-ak@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-08-19 05:33:53 +02:00
..
mce x86/mce: Make sure to grab mce_sysfs_mutex in set_bank() 2024-04-13 12:51:36 +02:00
microcode x86/microcode/AMD: Load late on both threads too 2023-07-24 19:10:53 +02:00
mtrr x86/mtrr: Check if fixed MTRRs exist before saving them 2024-08-19 05:33:53 +02:00
resctrl x86/resctrl: Only show tasks' pid in current pid namespace 2023-07-27 08:37:04 +02:00
.gitignore
acrn.c
amd.c x86/CPU/AMD: Update the Zenbleed microcode revisions 2024-04-13 12:51:28 +02:00
aperfmperf.c
bugs.c x86/cpu: Enable STIBP on AMD if Automatic IBRS is enabled 2024-04-13 12:51:32 +02:00
cacheinfo.c
centaur.c
common.c x86/cpu: Support AMD Automatic IBRS 2024-04-13 12:51:21 +02:00
cpu.h x86/speculation: Add Gather Data Sampling mitigation 2023-08-08 19:56:35 +02:00
cpuid-deps.c x86/cpufeatures: Fix dependencies for GFNI, VAES, and VPCLMULQDQ 2024-05-02 16:18:31 +02:00
cyrix.c
hygon.c x86/cpu/hygon: Fix the CPU topology evaluation for real 2023-11-28 16:50:18 +00:00
hypervisor.c
intel.c x86/cpu/intel: Detect TME keyid bits before setting MTRR mask registers 2024-03-06 14:36:10 +00:00
intel_epb.c
intel_pconfig.c
Makefile
match.c x86/cpu: Add a steppings field to struct x86_cpu_id 2022-10-07 09:16:54 +02:00
mkcapflags.sh
mshyperv.c random: remove unused irq_flags argument from add_interrupt_randomness() 2022-06-22 14:11:06 +02:00
perfctr-watchdog.c
powerflags.c
proc.c
rdrand.c
scattered.c x86/cpufeatures: Assign dedicated feature word for CPUID_0x8000001F[EAX] 2023-08-08 19:56:36 +02:00
topology.c x86/topology: Fix erroneous smp_num_siblings on Intel Hybrid platforms 2023-05-30 12:44:09 +01:00
transmeta.c
tsx.c x86/tsx: Add a feature bit for TSX control MSR support 2022-12-08 11:23:05 +01:00
umc.c
umwait.c
vmware.c
zhaoxin.c