linux-stable/drivers/cxl
Robert Richter 0312171289 cxl/pci: Fix disabling memory if DVSEC CXL Range does not match a CFMWS window
commit 0cab687205 upstream.

The Linux CXL subsystem is built on the assumption that HPA == SPA.
That is, the host physical address (HPA) the HDM decoder registers are
programmed with are system physical addresses (SPA).

During HDM decoder setup, the DVSEC CXL range registers (cxl-3.1,
8.1.3.8) are checked if the memory is enabled and the CXL range is in
a HPA window that is described in a CFMWS structure of the CXL host
bridge (cxl-3.1, 9.18.1.3).

Now, if the HPA is not an SPA, the CXL range does not match a CFMWS
window and the CXL memory range will be disabled then. The HDM decoder
stops working which causes system memory being disabled and further a
system hang during HDM decoder initialization, typically when a CXL
enabled kernel boots.

Prevent a system hang and do not disable the HDM decoder if the
decoder's CXL range is not found in a CFMWS window.

Note the change only fixes a hardware hang, but does not implement
HPA/SPA translation. Support for this can be added in a follow on
patch series.

Signed-off-by: Robert Richter <rrichter@amd.com>
Fixes: 34e37b4c43 ("cxl/port: Enable HDM Capability after validating DVSEC Ranges")
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20240216160113.407141-1-rrichter@amd.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-03-01 13:26:31 +01:00
..
core cxl/pci: Fix disabling memory if DVSEC CXL Range does not match a CFMWS window 2024-03-01 13:26:31 +01:00
Kconfig
Makefile
acpi.c cxl: Unify debug messages when calling devm_cxl_add_port() 2023-11-28 17:07:17 +00:00
cxl.h tools/testing/cxl: Define a fixed volatile configuration to parse 2023-11-28 17:07:17 +00:00
cxlmem.h tools/testing/cxl: Define a fixed volatile configuration to parse 2023-11-28 17:07:17 +00:00
cxlpci.h cxl: Wait Memory_Info_Valid before access memory related info 2023-05-30 14:03:32 +01:00
mem.c cxl/mem: Move devm_cxl_add_endpoint() from cxl_core to cxl_mem 2023-11-28 17:07:17 +00:00
pci.c
pmem.c cxl/pmem: Fix nvdimm registration races 2023-03-10 09:34:20 +01:00
port.c