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For the individual CCU drivers to be built as modules, the ops structs, helper functions, and callback registration functions must be exported. These symbols are intended for use only by the adjacent CCU drivers, so export them into the SUNXI_CCU namespace. of_sunxi_ccu_probe is not exported because it is only used by built-in OF clock providers. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20211119033338.25486-2-samuel@sholland.org
115 lines
3 KiB
C
115 lines
3 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2016 Maxime Ripard
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*/
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#include <linux/clk-provider.h>
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#include <linux/io.h>
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#include <linux/spinlock.h>
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#include "ccu_frac.h"
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bool ccu_frac_helper_is_enabled(struct ccu_common *common,
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struct ccu_frac_internal *cf)
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{
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if (!(common->features & CCU_FEATURE_FRACTIONAL))
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return false;
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return !(readl(common->base + common->reg) & cf->enable);
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}
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EXPORT_SYMBOL_NS_GPL(ccu_frac_helper_is_enabled, SUNXI_CCU);
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void ccu_frac_helper_enable(struct ccu_common *common,
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struct ccu_frac_internal *cf)
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{
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unsigned long flags;
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u32 reg;
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if (!(common->features & CCU_FEATURE_FRACTIONAL))
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return;
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spin_lock_irqsave(common->lock, flags);
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reg = readl(common->base + common->reg);
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writel(reg & ~cf->enable, common->base + common->reg);
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spin_unlock_irqrestore(common->lock, flags);
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}
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EXPORT_SYMBOL_NS_GPL(ccu_frac_helper_enable, SUNXI_CCU);
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void ccu_frac_helper_disable(struct ccu_common *common,
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struct ccu_frac_internal *cf)
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{
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unsigned long flags;
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u32 reg;
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if (!(common->features & CCU_FEATURE_FRACTIONAL))
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return;
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spin_lock_irqsave(common->lock, flags);
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reg = readl(common->base + common->reg);
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writel(reg | cf->enable, common->base + common->reg);
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spin_unlock_irqrestore(common->lock, flags);
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}
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EXPORT_SYMBOL_NS_GPL(ccu_frac_helper_disable, SUNXI_CCU);
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bool ccu_frac_helper_has_rate(struct ccu_common *common,
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struct ccu_frac_internal *cf,
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unsigned long rate)
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{
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if (!(common->features & CCU_FEATURE_FRACTIONAL))
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return false;
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return (cf->rates[0] == rate) || (cf->rates[1] == rate);
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}
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EXPORT_SYMBOL_NS_GPL(ccu_frac_helper_has_rate, SUNXI_CCU);
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unsigned long ccu_frac_helper_read_rate(struct ccu_common *common,
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struct ccu_frac_internal *cf)
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{
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u32 reg;
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pr_debug("%s: Read fractional\n", clk_hw_get_name(&common->hw));
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if (!(common->features & CCU_FEATURE_FRACTIONAL))
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return 0;
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pr_debug("%s: clock is fractional (rates %lu and %lu)\n",
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clk_hw_get_name(&common->hw), cf->rates[0], cf->rates[1]);
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reg = readl(common->base + common->reg);
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pr_debug("%s: clock reg is 0x%x (select is 0x%x)\n",
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clk_hw_get_name(&common->hw), reg, cf->select);
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return (reg & cf->select) ? cf->rates[1] : cf->rates[0];
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}
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EXPORT_SYMBOL_NS_GPL(ccu_frac_helper_read_rate, SUNXI_CCU);
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int ccu_frac_helper_set_rate(struct ccu_common *common,
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struct ccu_frac_internal *cf,
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unsigned long rate, u32 lock)
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{
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unsigned long flags;
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u32 reg, sel;
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if (!(common->features & CCU_FEATURE_FRACTIONAL))
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return -EINVAL;
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if (cf->rates[0] == rate)
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sel = 0;
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else if (cf->rates[1] == rate)
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sel = cf->select;
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else
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return -EINVAL;
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spin_lock_irqsave(common->lock, flags);
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reg = readl(common->base + common->reg);
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reg &= ~cf->select;
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writel(reg | sel, common->base + common->reg);
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spin_unlock_irqrestore(common->lock, flags);
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ccu_helper_wait_for_lock(common, lock);
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return 0;
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}
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EXPORT_SYMBOL_NS_GPL(ccu_frac_helper_set_rate, SUNXI_CCU);
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