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access-controllers is an optional property that allows a peripheral to refer to one or more domain access controller(s). Description of this property is added to all peripheral binding files of the peripheral under the STM32 firewall controller. It allows an accurate representation of the hardware, where various peripherals are connected to a firewall bus. The firewall can then check the peripheral accesses before allowing its device to probe. Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
180 lines
3.8 KiB
YAML
180 lines
3.8 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: STMicroelectronics STM32 Timers
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description: |
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This hardware block provides 3 types of timer along with PWM functionality:
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- advanced-control timers consist of a 16-bit auto-reload counter driven
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by a programmable prescaler, break input feature, PWM outputs and
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complementary PWM outputs channels.
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- general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
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driven by a programmable prescaler and PWM outputs.
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- basic timers consist of a 16-bit auto-reload counter driven by a
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programmable prescaler.
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maintainers:
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- Fabrice Gasnier <fabrice.gasnier@foss.st.com>
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properties:
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compatible:
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const: st,stm32-timers
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-names:
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items:
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- const: int
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resets:
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maxItems: 1
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dmas:
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minItems: 1
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maxItems: 7
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dma-names:
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items:
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enum: [ ch1, ch2, ch3, ch4, up, trig, com ]
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minItems: 1
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maxItems: 7
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interrupts:
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oneOf:
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- maxItems: 1
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- maxItems: 4
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interrupt-names:
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oneOf:
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- items:
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- const: global
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- items:
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- const: brk
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- const: up
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- const: trg-com
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- const: cc
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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access-controllers:
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minItems: 1
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maxItems: 2
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pwm:
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type: object
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additionalProperties: false
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properties:
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compatible:
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const: st,stm32-pwm
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"#pwm-cells":
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const: 3
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st,breakinput:
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description:
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One or two <index level filter> to describe break input
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configurations.
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$ref: /schemas/types.yaml#/definitions/uint32-matrix
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items:
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items:
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- description: |
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"index" indicates on which break input (0 or 1) the
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configuration should be applied.
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enum: [0, 1]
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- description: |
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"level" gives the active level (0=low or 1=high) of the
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input signal for this configuration
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enum: [0, 1]
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- description: |
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"filter" gives the filtering value (up to 15) to be applied.
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maximum: 15
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minItems: 1
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maxItems: 2
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required:
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- "#pwm-cells"
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- compatible
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counter:
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type: object
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additionalProperties: false
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properties:
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compatible:
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const: st,stm32-timer-counter
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required:
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- compatible
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patternProperties:
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"^timer@[0-9]+$":
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type: object
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additionalProperties: false
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properties:
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compatible:
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enum:
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- st,stm32-timer-trigger
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- st,stm32h7-timer-trigger
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reg:
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description: Identify trigger hardware block.
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items:
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minimum: 0
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maximum: 16
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required:
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- compatible
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- reg
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/stm32mp1-clks.h>
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timers2: timer@40000000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "st,stm32-timers";
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reg = <0x40000000 0x400>;
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clocks = <&rcc TIM2_K>;
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clock-names = "int";
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dmas = <&dmamux1 18 0x400 0x1>,
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<&dmamux1 19 0x400 0x1>,
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<&dmamux1 20 0x400 0x1>,
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<&dmamux1 21 0x400 0x1>,
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<&dmamux1 22 0x400 0x1>;
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dma-names = "ch1", "ch2", "ch3", "ch4", "up";
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pwm {
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compatible = "st,stm32-pwm";
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#pwm-cells = <3>;
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st,breakinput = <0 1 5>;
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};
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timer@1 {
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compatible = "st,stm32-timer-trigger";
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reg = <1>;
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};
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counter {
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compatible = "st,stm32-timer-counter";
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};
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};
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...
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