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687e3d5550
As of_get_mac_address now supports NVMEM under the hood, we need to update the bindings documentation with the new nvmem-cell* properties, which would mean copy&pasting a lot of redundant information to every binding documentation currently referencing some of the MAC address properties. So I've just removed all the references to the optional MAC address properties and replaced them with the small note referencing net/ethernet.txt file. Signed-off-by: Petr Štetiar <ynezz@true.cz> Signed-off-by: David S. Miller <davem@davemloft.net>
56 lines
2.3 KiB
Text
56 lines
2.3 KiB
Text
* Microchip ENC28J60
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This is a standalone 10 MBit ethernet controller with SPI interface.
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For each device connected to a SPI bus, define a child node within
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the SPI master node.
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Required properties:
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- compatible: Should be "microchip,enc28j60"
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- reg: Specify the SPI chip select the ENC28J60 is wired to
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- interrupts: Specify the interrupt index within the interrupt controller (referred
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to above in interrupt-parent) and interrupt type. The ENC28J60 natively
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generates falling edge interrupts, however, additional board logic
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might invert the signal.
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- pinctrl-names: List of assigned state names, see pinctrl binding documentation.
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- pinctrl-0: List of phandles to configure the GPIO pin used as interrupt line,
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see also generic and your platform specific pinctrl binding
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documentation.
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Optional properties:
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- spi-max-frequency: Maximum frequency of the SPI bus when accessing the ENC28J60.
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According to the ENC28J80 datasheet, the chip allows a maximum of 20 MHz, however,
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board designs may need to limit this value.
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The MAC address will be determined using the optional properties
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defined in ethernet.txt.
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Example (for NXP i.MX28 with pin control stuff for GPIO irq):
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ssp2: ssp@80014000 {
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compatible = "fsl,imx28-spi";
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pinctrl-names = "default";
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pinctrl-0 = <&spi2_pins_b &spi2_sck_cfg>;
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enc28j60: ethernet@0 {
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compatible = "microchip,enc28j60";
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pinctrl-names = "default";
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pinctrl-0 = <&enc28j60_pins>;
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reg = <0>;
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interrupt-parent = <&gpio3>;
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interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
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spi-max-frequency = <12000000>;
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};
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};
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pinctrl@80018000 {
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enc28j60_pins: enc28j60_pins@0 {
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reg = <0>;
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fsl,pinmux-ids = <
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MX28_PAD_AUART0_RTS__GPIO_3_3 /* Interrupt */
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>;
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fsl,drive-strength = <MXS_DRIVE_4mA>;
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fsl,voltage = <MXS_VOLTAGE_HIGH>;
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fsl,pull-up = <MXS_PULL_DISABLE>;
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};
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};
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