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18c3933c19
Shorten macro names for improved readability. Suggested-by: Borislav Petkov <bp@suse.de> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Venu Busireddy <venu.busireddy@oracle.com> Link: https://lkml.kernel.org/r/20211110220731.2396491-5-brijesh.singh@amd.com
540 lines
12 KiB
C
540 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* AMD Encrypted Register State Support
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*
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* Author: Joerg Roedel <jroedel@suse.de>
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*
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* This file is not compiled stand-alone. It contains code shared
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* between the pre-decompression boot code and the running Linux kernel
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* and is included directly into both code-bases.
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*/
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#ifndef __BOOT_COMPRESSED
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#define error(v) pr_err(v)
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#define has_cpuflag(f) boot_cpu_has(f)
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#endif
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static bool __init sev_es_check_cpu_features(void)
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{
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if (!has_cpuflag(X86_FEATURE_RDRAND)) {
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error("RDRAND instruction not supported - no trusted source of randomness available\n");
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return false;
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}
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return true;
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}
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static void __noreturn sev_es_terminate(unsigned int reason)
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{
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u64 val = GHCB_MSR_TERM_REQ;
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/*
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* Tell the hypervisor what went wrong - only reason-set 0 is
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* currently supported.
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*/
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val |= GHCB_SEV_TERM_REASON(0, reason);
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/* Request Guest Termination from Hypvervisor */
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sev_es_wr_ghcb_msr(val);
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VMGEXIT();
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while (true)
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asm volatile("hlt\n" : : : "memory");
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}
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static bool sev_es_negotiate_protocol(void)
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{
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u64 val;
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/* Do the GHCB protocol version negotiation */
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sev_es_wr_ghcb_msr(GHCB_MSR_SEV_INFO_REQ);
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VMGEXIT();
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val = sev_es_rd_ghcb_msr();
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if (GHCB_MSR_INFO(val) != GHCB_MSR_SEV_INFO_RESP)
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return false;
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if (GHCB_MSR_PROTO_MAX(val) < GHCB_PROTO_OUR ||
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GHCB_MSR_PROTO_MIN(val) > GHCB_PROTO_OUR)
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return false;
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return true;
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}
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static __always_inline void vc_ghcb_invalidate(struct ghcb *ghcb)
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{
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ghcb->save.sw_exit_code = 0;
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__builtin_memset(ghcb->save.valid_bitmap, 0, sizeof(ghcb->save.valid_bitmap));
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}
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static bool vc_decoding_needed(unsigned long exit_code)
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{
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/* Exceptions don't require to decode the instruction */
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return !(exit_code >= SVM_EXIT_EXCP_BASE &&
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exit_code <= SVM_EXIT_LAST_EXCP);
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}
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static enum es_result vc_init_em_ctxt(struct es_em_ctxt *ctxt,
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struct pt_regs *regs,
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unsigned long exit_code)
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{
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enum es_result ret = ES_OK;
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memset(ctxt, 0, sizeof(*ctxt));
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ctxt->regs = regs;
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if (vc_decoding_needed(exit_code))
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ret = vc_decode_insn(ctxt);
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return ret;
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}
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static void vc_finish_insn(struct es_em_ctxt *ctxt)
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{
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ctxt->regs->ip += ctxt->insn.length;
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}
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static enum es_result verify_exception_info(struct ghcb *ghcb, struct es_em_ctxt *ctxt)
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{
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u32 ret;
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ret = ghcb->save.sw_exit_info_1 & GENMASK_ULL(31, 0);
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if (!ret)
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return ES_OK;
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if (ret == 1) {
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u64 info = ghcb->save.sw_exit_info_2;
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unsigned long v;
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info = ghcb->save.sw_exit_info_2;
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v = info & SVM_EVTINJ_VEC_MASK;
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/* Check if exception information from hypervisor is sane. */
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if ((info & SVM_EVTINJ_VALID) &&
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((v == X86_TRAP_GP) || (v == X86_TRAP_UD)) &&
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((info & SVM_EVTINJ_TYPE_MASK) == SVM_EVTINJ_TYPE_EXEPT)) {
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ctxt->fi.vector = v;
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if (info & SVM_EVTINJ_VALID_ERR)
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ctxt->fi.error_code = info >> 32;
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return ES_EXCEPTION;
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}
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}
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return ES_VMM_ERROR;
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}
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enum es_result sev_es_ghcb_hv_call(struct ghcb *ghcb, bool set_ghcb_msr,
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struct es_em_ctxt *ctxt, u64 exit_code,
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u64 exit_info_1, u64 exit_info_2)
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{
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/* Fill in protocol and format specifiers */
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ghcb->protocol_version = GHCB_PROTOCOL_MAX;
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ghcb->ghcb_usage = GHCB_DEFAULT_USAGE;
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ghcb_set_sw_exit_code(ghcb, exit_code);
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ghcb_set_sw_exit_info_1(ghcb, exit_info_1);
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ghcb_set_sw_exit_info_2(ghcb, exit_info_2);
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/*
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* Hyper-V unenlightened guests use a paravisor for communicating and
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* GHCB pages are being allocated and set up by that paravisor. Linux
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* should not change the GHCB page's physical address.
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*/
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if (set_ghcb_msr)
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sev_es_wr_ghcb_msr(__pa(ghcb));
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VMGEXIT();
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return verify_exception_info(ghcb, ctxt);
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}
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/*
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* Boot VC Handler - This is the first VC handler during boot, there is no GHCB
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* page yet, so it only supports the MSR based communication with the
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* hypervisor and only the CPUID exit-code.
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*/
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void __init do_vc_no_ghcb(struct pt_regs *regs, unsigned long exit_code)
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{
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unsigned int fn = lower_bits(regs->ax, 32);
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unsigned long val;
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/* Only CPUID is supported via MSR protocol */
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if (exit_code != SVM_EXIT_CPUID)
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goto fail;
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sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(fn, GHCB_CPUID_REQ_EAX));
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VMGEXIT();
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val = sev_es_rd_ghcb_msr();
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if (GHCB_RESP_CODE(val) != GHCB_MSR_CPUID_RESP)
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goto fail;
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regs->ax = val >> 32;
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sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(fn, GHCB_CPUID_REQ_EBX));
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VMGEXIT();
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val = sev_es_rd_ghcb_msr();
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if (GHCB_RESP_CODE(val) != GHCB_MSR_CPUID_RESP)
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goto fail;
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regs->bx = val >> 32;
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sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(fn, GHCB_CPUID_REQ_ECX));
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VMGEXIT();
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val = sev_es_rd_ghcb_msr();
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if (GHCB_RESP_CODE(val) != GHCB_MSR_CPUID_RESP)
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goto fail;
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regs->cx = val >> 32;
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sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(fn, GHCB_CPUID_REQ_EDX));
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VMGEXIT();
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val = sev_es_rd_ghcb_msr();
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if (GHCB_RESP_CODE(val) != GHCB_MSR_CPUID_RESP)
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goto fail;
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regs->dx = val >> 32;
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/*
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* This is a VC handler and the #VC is only raised when SEV-ES is
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* active, which means SEV must be active too. Do sanity checks on the
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* CPUID results to make sure the hypervisor does not trick the kernel
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* into the no-sev path. This could map sensitive data unencrypted and
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* make it accessible to the hypervisor.
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*
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* In particular, check for:
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* - Availability of CPUID leaf 0x8000001f
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* - SEV CPUID bit.
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*
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* The hypervisor might still report the wrong C-bit position, but this
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* can't be checked here.
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*/
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if (fn == 0x80000000 && (regs->ax < 0x8000001f))
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/* SEV leaf check */
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goto fail;
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else if ((fn == 0x8000001f && !(regs->ax & BIT(1))))
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/* SEV bit */
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goto fail;
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/* Skip over the CPUID two-byte opcode */
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regs->ip += 2;
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return;
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fail:
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/* Terminate the guest */
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sev_es_terminate(GHCB_SEV_ES_GEN_REQ);
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}
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static enum es_result vc_insn_string_read(struct es_em_ctxt *ctxt,
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void *src, char *buf,
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unsigned int data_size,
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unsigned int count,
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bool backwards)
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{
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int i, b = backwards ? -1 : 1;
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enum es_result ret = ES_OK;
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for (i = 0; i < count; i++) {
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void *s = src + (i * data_size * b);
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char *d = buf + (i * data_size);
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ret = vc_read_mem(ctxt, s, d, data_size);
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if (ret != ES_OK)
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break;
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}
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return ret;
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}
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static enum es_result vc_insn_string_write(struct es_em_ctxt *ctxt,
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void *dst, char *buf,
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unsigned int data_size,
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unsigned int count,
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bool backwards)
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{
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int i, s = backwards ? -1 : 1;
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enum es_result ret = ES_OK;
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for (i = 0; i < count; i++) {
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void *d = dst + (i * data_size * s);
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char *b = buf + (i * data_size);
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ret = vc_write_mem(ctxt, d, b, data_size);
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if (ret != ES_OK)
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break;
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}
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return ret;
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}
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#define IOIO_TYPE_STR BIT(2)
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#define IOIO_TYPE_IN 1
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#define IOIO_TYPE_INS (IOIO_TYPE_IN | IOIO_TYPE_STR)
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#define IOIO_TYPE_OUT 0
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#define IOIO_TYPE_OUTS (IOIO_TYPE_OUT | IOIO_TYPE_STR)
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#define IOIO_REP BIT(3)
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#define IOIO_ADDR_64 BIT(9)
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#define IOIO_ADDR_32 BIT(8)
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#define IOIO_ADDR_16 BIT(7)
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#define IOIO_DATA_32 BIT(6)
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#define IOIO_DATA_16 BIT(5)
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#define IOIO_DATA_8 BIT(4)
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#define IOIO_SEG_ES (0 << 10)
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#define IOIO_SEG_DS (3 << 10)
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static enum es_result vc_ioio_exitinfo(struct es_em_ctxt *ctxt, u64 *exitinfo)
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{
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struct insn *insn = &ctxt->insn;
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*exitinfo = 0;
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switch (insn->opcode.bytes[0]) {
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/* INS opcodes */
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case 0x6c:
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case 0x6d:
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*exitinfo |= IOIO_TYPE_INS;
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*exitinfo |= IOIO_SEG_ES;
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*exitinfo |= (ctxt->regs->dx & 0xffff) << 16;
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break;
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/* OUTS opcodes */
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case 0x6e:
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case 0x6f:
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*exitinfo |= IOIO_TYPE_OUTS;
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*exitinfo |= IOIO_SEG_DS;
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*exitinfo |= (ctxt->regs->dx & 0xffff) << 16;
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break;
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/* IN immediate opcodes */
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case 0xe4:
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case 0xe5:
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*exitinfo |= IOIO_TYPE_IN;
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*exitinfo |= (u8)insn->immediate.value << 16;
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break;
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/* OUT immediate opcodes */
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case 0xe6:
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case 0xe7:
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*exitinfo |= IOIO_TYPE_OUT;
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*exitinfo |= (u8)insn->immediate.value << 16;
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break;
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/* IN register opcodes */
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case 0xec:
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case 0xed:
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*exitinfo |= IOIO_TYPE_IN;
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*exitinfo |= (ctxt->regs->dx & 0xffff) << 16;
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break;
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/* OUT register opcodes */
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case 0xee:
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case 0xef:
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*exitinfo |= IOIO_TYPE_OUT;
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*exitinfo |= (ctxt->regs->dx & 0xffff) << 16;
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break;
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default:
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return ES_DECODE_FAILED;
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}
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switch (insn->opcode.bytes[0]) {
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case 0x6c:
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case 0x6e:
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case 0xe4:
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case 0xe6:
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case 0xec:
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case 0xee:
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/* Single byte opcodes */
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*exitinfo |= IOIO_DATA_8;
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break;
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default:
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/* Length determined by instruction parsing */
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*exitinfo |= (insn->opnd_bytes == 2) ? IOIO_DATA_16
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: IOIO_DATA_32;
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}
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switch (insn->addr_bytes) {
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case 2:
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*exitinfo |= IOIO_ADDR_16;
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break;
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case 4:
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*exitinfo |= IOIO_ADDR_32;
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break;
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case 8:
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*exitinfo |= IOIO_ADDR_64;
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break;
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}
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if (insn_has_rep_prefix(insn))
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*exitinfo |= IOIO_REP;
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return ES_OK;
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}
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static enum es_result vc_handle_ioio(struct ghcb *ghcb, struct es_em_ctxt *ctxt)
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{
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struct pt_regs *regs = ctxt->regs;
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u64 exit_info_1, exit_info_2;
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enum es_result ret;
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ret = vc_ioio_exitinfo(ctxt, &exit_info_1);
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if (ret != ES_OK)
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return ret;
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if (exit_info_1 & IOIO_TYPE_STR) {
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/* (REP) INS/OUTS */
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bool df = ((regs->flags & X86_EFLAGS_DF) == X86_EFLAGS_DF);
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unsigned int io_bytes, exit_bytes;
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unsigned int ghcb_count, op_count;
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unsigned long es_base;
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u64 sw_scratch;
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/*
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* For the string variants with rep prefix the amount of in/out
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* operations per #VC exception is limited so that the kernel
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* has a chance to take interrupts and re-schedule while the
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* instruction is emulated.
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*/
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io_bytes = (exit_info_1 >> 4) & 0x7;
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ghcb_count = sizeof(ghcb->shared_buffer) / io_bytes;
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op_count = (exit_info_1 & IOIO_REP) ? regs->cx : 1;
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exit_info_2 = min(op_count, ghcb_count);
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exit_bytes = exit_info_2 * io_bytes;
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es_base = insn_get_seg_base(ctxt->regs, INAT_SEG_REG_ES);
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/* Read bytes of OUTS into the shared buffer */
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if (!(exit_info_1 & IOIO_TYPE_IN)) {
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ret = vc_insn_string_read(ctxt,
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(void *)(es_base + regs->si),
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ghcb->shared_buffer, io_bytes,
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exit_info_2, df);
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if (ret)
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return ret;
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}
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/*
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* Issue an VMGEXIT to the HV to consume the bytes from the
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* shared buffer or to have it write them into the shared buffer
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* depending on the instruction: OUTS or INS.
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*/
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sw_scratch = __pa(ghcb) + offsetof(struct ghcb, shared_buffer);
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ghcb_set_sw_scratch(ghcb, sw_scratch);
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ret = sev_es_ghcb_hv_call(ghcb, true, ctxt, SVM_EXIT_IOIO,
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exit_info_1, exit_info_2);
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if (ret != ES_OK)
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return ret;
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/* Read bytes from shared buffer into the guest's destination. */
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if (exit_info_1 & IOIO_TYPE_IN) {
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ret = vc_insn_string_write(ctxt,
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(void *)(es_base + regs->di),
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ghcb->shared_buffer, io_bytes,
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exit_info_2, df);
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if (ret)
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return ret;
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if (df)
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regs->di -= exit_bytes;
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else
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regs->di += exit_bytes;
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} else {
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if (df)
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regs->si -= exit_bytes;
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else
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regs->si += exit_bytes;
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}
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if (exit_info_1 & IOIO_REP)
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regs->cx -= exit_info_2;
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ret = regs->cx ? ES_RETRY : ES_OK;
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} else {
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/* IN/OUT into/from rAX */
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int bits = (exit_info_1 & 0x70) >> 1;
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u64 rax = 0;
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if (!(exit_info_1 & IOIO_TYPE_IN))
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rax = lower_bits(regs->ax, bits);
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ghcb_set_rax(ghcb, rax);
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ret = sev_es_ghcb_hv_call(ghcb, true, ctxt,
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SVM_EXIT_IOIO, exit_info_1, 0);
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if (ret != ES_OK)
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return ret;
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if (exit_info_1 & IOIO_TYPE_IN) {
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if (!ghcb_rax_is_valid(ghcb))
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return ES_VMM_ERROR;
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regs->ax = lower_bits(ghcb->save.rax, bits);
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}
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}
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return ret;
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}
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static enum es_result vc_handle_cpuid(struct ghcb *ghcb,
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struct es_em_ctxt *ctxt)
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{
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struct pt_regs *regs = ctxt->regs;
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u32 cr4 = native_read_cr4();
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enum es_result ret;
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ghcb_set_rax(ghcb, regs->ax);
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ghcb_set_rcx(ghcb, regs->cx);
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if (cr4 & X86_CR4_OSXSAVE)
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/* Safe to read xcr0 */
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ghcb_set_xcr0(ghcb, xgetbv(XCR_XFEATURE_ENABLED_MASK));
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else
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/* xgetbv will cause #GP - use reset value for xcr0 */
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ghcb_set_xcr0(ghcb, 1);
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ret = sev_es_ghcb_hv_call(ghcb, true, ctxt, SVM_EXIT_CPUID, 0, 0);
|
|
if (ret != ES_OK)
|
|
return ret;
|
|
|
|
if (!(ghcb_rax_is_valid(ghcb) &&
|
|
ghcb_rbx_is_valid(ghcb) &&
|
|
ghcb_rcx_is_valid(ghcb) &&
|
|
ghcb_rdx_is_valid(ghcb)))
|
|
return ES_VMM_ERROR;
|
|
|
|
regs->ax = ghcb->save.rax;
|
|
regs->bx = ghcb->save.rbx;
|
|
regs->cx = ghcb->save.rcx;
|
|
regs->dx = ghcb->save.rdx;
|
|
|
|
return ES_OK;
|
|
}
|
|
|
|
static enum es_result vc_handle_rdtsc(struct ghcb *ghcb,
|
|
struct es_em_ctxt *ctxt,
|
|
unsigned long exit_code)
|
|
{
|
|
bool rdtscp = (exit_code == SVM_EXIT_RDTSCP);
|
|
enum es_result ret;
|
|
|
|
ret = sev_es_ghcb_hv_call(ghcb, true, ctxt, exit_code, 0, 0);
|
|
if (ret != ES_OK)
|
|
return ret;
|
|
|
|
if (!(ghcb_rax_is_valid(ghcb) && ghcb_rdx_is_valid(ghcb) &&
|
|
(!rdtscp || ghcb_rcx_is_valid(ghcb))))
|
|
return ES_VMM_ERROR;
|
|
|
|
ctxt->regs->ax = ghcb->save.rax;
|
|
ctxt->regs->dx = ghcb->save.rdx;
|
|
if (rdtscp)
|
|
ctxt->regs->cx = ghcb->save.rcx;
|
|
|
|
return ES_OK;
|
|
}
|