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b3a04ed507
New algorithm that takes advantage of the M7/M8 block init store ASI, ie, overlapping pipelines and miss buffer filling. Full details in code comments. Signed-off-by: Babu Moger <babu.moger@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
352 lines
9.9 KiB
ArmAsm
352 lines
9.9 KiB
ArmAsm
/*
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* M7memset.S: SPARC M7 optimized memset.
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*
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* Copyright (c) 2016, Oracle and/or its affiliates. All rights reserved.
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*/
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/*
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* M7memset.S: M7 optimized memset.
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*
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* char *memset(sp, c, n)
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*
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* Set an array of n chars starting at sp to the character c.
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* Return sp.
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*
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* Fast assembler language version of the following C-program for memset
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* which represents the `standard' for the C-library.
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*
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* void *
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* memset(void *sp1, int c, size_t n)
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* {
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* if (n != 0) {
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* char *sp = sp1;
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* do {
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* *sp++ = (char)c;
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* } while (--n != 0);
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* }
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* return (sp1);
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* }
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*
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* The algorithm is as follows :
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*
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* For small 6 or fewer bytes stores, bytes will be stored.
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*
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* For less than 32 bytes stores, align the address on 4 byte boundary.
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* Then store as many 4-byte chunks, followed by trailing bytes.
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*
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* For sizes greater than 32 bytes, align the address on 8 byte boundary.
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* if (count >= 64) {
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* store 8-bytes chunks to align the address on 64 byte boundary
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* if (value to be set is zero && count >= MIN_ZERO) {
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* Using BIS stores, set the first long word of each
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* 64-byte cache line to zero which will also clear the
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* other seven long words of the cache line.
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* }
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* else if (count >= MIN_LOOP) {
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* Using BIS stores, set the first long word of each of
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* ST_CHUNK cache lines (64 bytes each) before the main
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* loop is entered.
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* In the main loop, continue pre-setting the first long
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* word of each cache line ST_CHUNK lines in advance while
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* setting the other seven long words (56 bytes) of each
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* cache line until fewer than ST_CHUNK*64 bytes remain.
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* Then set the remaining seven long words of each cache
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* line that has already had its first long word set.
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* }
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* store remaining data in 64-byte chunks until less than
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* 64 bytes remain.
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* }
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* Store as many 8-byte chunks, followed by trailing bytes.
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*
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* BIS = Block Init Store
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* Doing the advance store of the first element of the cache line
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* initiates the displacement of a cache line while only using a single
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* instruction in the pipeline. That avoids various pipeline delays,
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* such as filling the miss buffer. The performance effect is
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* similar to prefetching for normal stores.
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* The special case for zero fills runs faster and uses fewer instruction
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* cycles than the normal memset loop.
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*
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* We only use BIS for memset of greater than MIN_LOOP bytes because a sequence
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* BIS stores must be followed by a membar #StoreStore. The benefit of
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* the BIS store must be balanced against the cost of the membar operation.
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*/
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/*
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* ASI_STBI_P marks the cache line as "least recently used"
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* which means if many threads are active, it has a high chance
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* of being pushed out of the cache between the first initializing
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* store and the final stores.
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* Thus, we use ASI_STBIMRU_P which marks the cache line as
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* "most recently used" for all but the last store to the cache line.
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*/
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#include <asm/asi.h>
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#include <asm/page.h>
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#define ASI_STBI_P ASI_BLK_INIT_QUAD_LDD_P
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#define ASI_STBIMRU_P ASI_ST_BLKINIT_MRU_P
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#define ST_CHUNK 24 /* multiple of 4 due to loop unrolling */
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#define MIN_LOOP 16320
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#define MIN_ZERO 512
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.section ".text"
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.align 32
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/*
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* Define clear_page(dest) as memset(dest, 0, PAGE_SIZE)
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* (can create a more optimized version later.)
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*/
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.globl M7clear_page
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.globl M7clear_user_page
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M7clear_page: /* clear_page(dest) */
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M7clear_user_page:
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set PAGE_SIZE, %o1
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/* fall through into bzero code */
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.size M7clear_page,.-M7clear_page
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.size M7clear_user_page,.-M7clear_user_page
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/*
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* Define bzero(dest, n) as memset(dest, 0, n)
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* (can create a more optimized version later.)
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*/
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.globl M7bzero
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M7bzero: /* bzero(dest, size) */
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mov %o1, %o2
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mov 0, %o1
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/* fall through into memset code */
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.size M7bzero,.-M7bzero
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.global M7memset
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.type M7memset, #function
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.register %g3, #scratch
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M7memset:
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mov %o0, %o5 ! copy sp1 before using it
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cmp %o2, 7 ! if small counts, just write bytes
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bleu,pn %xcc, .wrchar
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and %o1, 0xff, %o1 ! o1 is (char)c
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sll %o1, 8, %o3
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or %o1, %o3, %o1 ! now o1 has 2 bytes of c
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sll %o1, 16, %o3
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cmp %o2, 32
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blu,pn %xcc, .wdalign
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or %o1, %o3, %o1 ! now o1 has 4 bytes of c
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sllx %o1, 32, %o3
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or %o1, %o3, %o1 ! now o1 has 8 bytes of c
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.dbalign:
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andcc %o5, 7, %o3 ! is sp1 aligned on a 8 byte bound?
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bz,pt %xcc, .blkalign ! already long word aligned
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sub %o3, 8, %o3 ! -(bytes till long word aligned)
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add %o2, %o3, %o2 ! update o2 with new count
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! Set -(%o3) bytes till sp1 long word aligned
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1: stb %o1, [%o5] ! there is at least 1 byte to set
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inccc %o3 ! byte clearing loop
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bl,pt %xcc, 1b
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inc %o5
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! Now sp1 is long word aligned (sp1 is found in %o5)
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.blkalign:
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cmp %o2, 64 ! check if there are 64 bytes to set
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blu,pn %xcc, .wrshort
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mov %o2, %o3
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andcc %o5, 63, %o3 ! is sp1 block aligned?
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bz,pt %xcc, .blkwr ! now block aligned
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sub %o3, 64, %o3 ! o3 is -(bytes till block aligned)
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add %o2, %o3, %o2 ! o2 is the remainder
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! Store -(%o3) bytes till dst is block (64 byte) aligned.
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! Use long word stores.
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! Recall that dst is already long word aligned
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1:
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addcc %o3, 8, %o3
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stx %o1, [%o5]
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bl,pt %xcc, 1b
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add %o5, 8, %o5
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! Now sp1 is block aligned
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.blkwr:
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andn %o2, 63, %o4 ! calculate size of blocks in bytes
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brz,pn %o1, .wrzero ! special case if c == 0
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and %o2, 63, %o3 ! %o3 = bytes left after blk stores.
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set MIN_LOOP, %g1
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cmp %o4, %g1 ! check there are enough bytes to set
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blu,pn %xcc, .short_set ! to justify cost of membar
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! must be > pre-cleared lines
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nop
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! initial cache-clearing stores
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! get store pipeline moving
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rd %asi, %g3 ! save %asi to be restored later
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wr %g0, ASI_STBIMRU_P, %asi
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! Primary memset loop for large memsets
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.wr_loop:
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sub %o5, 8, %o5 ! adjust %o5 for ASI store alignment
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mov ST_CHUNK, %g1
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.wr_loop_start:
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stxa %o1, [%o5+8]%asi
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subcc %g1, 4, %g1
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stxa %o1, [%o5+8+64]%asi
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add %o5, 256, %o5
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stxa %o1, [%o5+8-128]%asi
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bgu %xcc, .wr_loop_start
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stxa %o1, [%o5+8-64]%asi
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sub %o5, ST_CHUNK*64, %o5 ! reset %o5
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mov ST_CHUNK, %g1
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.wr_loop_rest:
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stxa %o1, [%o5+8+8]%asi
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sub %o4, 64, %o4
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stxa %o1, [%o5+16+8]%asi
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subcc %g1, 1, %g1
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stxa %o1, [%o5+24+8]%asi
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stxa %o1, [%o5+32+8]%asi
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stxa %o1, [%o5+40+8]%asi
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add %o5, 64, %o5
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stxa %o1, [%o5-8]%asi
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bgu %xcc, .wr_loop_rest
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stxa %o1, [%o5]ASI_STBI_P
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! If more than ST_CHUNK*64 bytes remain to set, continue
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! setting the first long word of each cache line in advance
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! to keep the store pipeline moving.
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cmp %o4, ST_CHUNK*64
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bge,pt %xcc, .wr_loop_start
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mov ST_CHUNK, %g1
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brz,a,pn %o4, .asi_done
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add %o5, 8, %o5 ! restore %o5 offset
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.wr_loop_small:
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stxa %o1, [%o5+8]%asi
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stxa %o1, [%o5+8+8]%asi
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stxa %o1, [%o5+16+8]%asi
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stxa %o1, [%o5+24+8]%asi
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stxa %o1, [%o5+32+8]%asi
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subcc %o4, 64, %o4
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stxa %o1, [%o5+40+8]%asi
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add %o5, 64, %o5
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stxa %o1, [%o5-8]%asi
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bgu,pt %xcc, .wr_loop_small
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stxa %o1, [%o5]ASI_STBI_P
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ba .asi_done
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add %o5, 8, %o5 ! restore %o5 offset
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! Special case loop for zero fill memsets
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! For each 64 byte cache line, single STBI to first element
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! clears line
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.wrzero:
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cmp %o4, MIN_ZERO ! check if enough bytes to set
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! to pay %asi + membar cost
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blu %xcc, .short_set
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nop
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sub %o4, 256, %o4
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.wrzero_loop:
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mov 64, %g3
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stxa %o1, [%o5]ASI_STBI_P
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subcc %o4, 256, %o4
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stxa %o1, [%o5+%g3]ASI_STBI_P
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add %o5, 256, %o5
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sub %g3, 192, %g3
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stxa %o1, [%o5+%g3]ASI_STBI_P
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add %g3, 64, %g3
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bge,pt %xcc, .wrzero_loop
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stxa %o1, [%o5+%g3]ASI_STBI_P
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add %o4, 256, %o4
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brz,pn %o4, .bsi_done
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nop
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.wrzero_small:
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stxa %o1, [%o5]ASI_STBI_P
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subcc %o4, 64, %o4
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bgu,pt %xcc, .wrzero_small
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add %o5, 64, %o5
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ba,a .bsi_done
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.asi_done:
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wr %g3, 0x0, %asi ! restored saved %asi
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.bsi_done:
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membar #StoreStore ! required by use of Block Store Init
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.short_set:
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cmp %o4, 64 ! check if 64 bytes to set
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blu %xcc, 5f
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nop
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4: ! set final blocks of 64 bytes
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stx %o1, [%o5]
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stx %o1, [%o5+8]
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stx %o1, [%o5+16]
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stx %o1, [%o5+24]
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subcc %o4, 64, %o4
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stx %o1, [%o5+32]
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stx %o1, [%o5+40]
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add %o5, 64, %o5
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stx %o1, [%o5-16]
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bgu,pt %xcc, 4b
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stx %o1, [%o5-8]
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5:
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! Set the remaining long words
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.wrshort:
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subcc %o3, 8, %o3 ! Can we store any long words?
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blu,pn %xcc, .wrchars
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and %o2, 7, %o2 ! calc bytes left after long words
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6:
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subcc %o3, 8, %o3
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stx %o1, [%o5] ! store the long words
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bgeu,pt %xcc, 6b
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add %o5, 8, %o5
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.wrchars: ! check for extra chars
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brnz %o2, .wrfin
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nop
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retl
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nop
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.wdalign:
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andcc %o5, 3, %o3 ! is sp1 aligned on a word boundary
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bz,pn %xcc, .wrword
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andn %o2, 3, %o3 ! create word sized count in %o3
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dec %o2 ! decrement count
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stb %o1, [%o5] ! clear a byte
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b .wdalign
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inc %o5 ! next byte
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.wrword:
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subcc %o3, 4, %o3
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st %o1, [%o5] ! 4-byte writing loop
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bnz,pt %xcc, .wrword
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add %o5, 4, %o5
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and %o2, 3, %o2 ! leftover count, if any
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.wrchar:
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! Set the remaining bytes, if any
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brz %o2, .exit
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nop
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.wrfin:
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deccc %o2
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stb %o1, [%o5]
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bgu,pt %xcc, .wrfin
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inc %o5
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.exit:
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retl ! %o0 was preserved
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nop
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.size M7memset,.-M7memset
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