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![Dale Farnsworth](/assets/img/avatar_default.png)
Replace several device node absolute path lookups in the mv64x60 bootwrapper code with lookups by compatible or device_type properties. Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Acked-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
204 lines
5.6 KiB
C
204 lines
5.6 KiB
C
/*
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* Bootloader version of the i2c driver for the MV64x60.
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*
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* Author: Dale Farnsworth <dfarnsworth@mvista.com>
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* Maintained by: Mark A. Greer <mgreer@mvista.com>
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*
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* 2003, 2007 (c) MontaVista, Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program is
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* licensed "as is" without any warranty of any kind, whether express or
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* implied.
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*/
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#include <stdarg.h>
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#include <stddef.h>
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#include "types.h"
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#include "elf.h"
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#include "page.h"
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#include "string.h"
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#include "stdio.h"
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#include "io.h"
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#include "ops.h"
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#include "mv64x60.h"
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/* Register defines */
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#define MV64x60_I2C_REG_SLAVE_ADDR 0x00
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#define MV64x60_I2C_REG_DATA 0x04
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#define MV64x60_I2C_REG_CONTROL 0x08
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#define MV64x60_I2C_REG_STATUS 0x0c
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#define MV64x60_I2C_REG_BAUD 0x0c
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#define MV64x60_I2C_REG_EXT_SLAVE_ADDR 0x10
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#define MV64x60_I2C_REG_SOFT_RESET 0x1c
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#define MV64x60_I2C_CONTROL_ACK 0x04
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#define MV64x60_I2C_CONTROL_IFLG 0x08
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#define MV64x60_I2C_CONTROL_STOP 0x10
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#define MV64x60_I2C_CONTROL_START 0x20
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#define MV64x60_I2C_CONTROL_TWSIEN 0x40
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#define MV64x60_I2C_CONTROL_INTEN 0x80
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#define MV64x60_I2C_STATUS_BUS_ERR 0x00
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#define MV64x60_I2C_STATUS_MAST_START 0x08
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#define MV64x60_I2C_STATUS_MAST_REPEAT_START 0x10
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#define MV64x60_I2C_STATUS_MAST_WR_ADDR_ACK 0x18
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#define MV64x60_I2C_STATUS_MAST_WR_ADDR_NO_ACK 0x20
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#define MV64x60_I2C_STATUS_MAST_WR_ACK 0x28
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#define MV64x60_I2C_STATUS_MAST_WR_NO_ACK 0x30
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#define MV64x60_I2C_STATUS_MAST_LOST_ARB 0x38
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#define MV64x60_I2C_STATUS_MAST_RD_ADDR_ACK 0x40
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#define MV64x60_I2C_STATUS_MAST_RD_ADDR_NO_ACK 0x48
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#define MV64x60_I2C_STATUS_MAST_RD_DATA_ACK 0x50
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#define MV64x60_I2C_STATUS_MAST_RD_DATA_NO_ACK 0x58
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#define MV64x60_I2C_STATUS_MAST_WR_ADDR_2_ACK 0xd0
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#define MV64x60_I2C_STATUS_MAST_WR_ADDR_2_NO_ACK 0xd8
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#define MV64x60_I2C_STATUS_MAST_RD_ADDR_2_ACK 0xe0
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#define MV64x60_I2C_STATUS_MAST_RD_ADDR_2_NO_ACK 0xe8
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#define MV64x60_I2C_STATUS_NO_STATUS 0xf8
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static u8 *ctlr_base;
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static int mv64x60_i2c_wait_for_status(int wanted)
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{
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int i;
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int status;
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for (i=0; i<1000; i++) {
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udelay(10);
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status = in_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_STATUS))
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& 0xff;
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if (status == wanted)
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return status;
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}
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return -status;
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}
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static int mv64x60_i2c_control(int control, int status)
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{
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out_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_CONTROL), control & 0xff);
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return mv64x60_i2c_wait_for_status(status);
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}
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static int mv64x60_i2c_read_byte(int control, int status)
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{
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out_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_CONTROL), control & 0xff);
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if (mv64x60_i2c_wait_for_status(status) < 0)
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return -1;
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return in_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_DATA)) & 0xff;
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}
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static int mv64x60_i2c_write_byte(int data, int control, int status)
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{
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out_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_DATA), data & 0xff);
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out_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_CONTROL), control & 0xff);
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return mv64x60_i2c_wait_for_status(status);
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}
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int mv64x60_i2c_read(u32 devaddr, u8 *buf, u32 offset, u32 offset_size,
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u32 count)
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{
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int i;
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int data;
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int control;
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int status;
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if (ctlr_base == NULL)
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return -1;
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/* send reset */
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out_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_SOFT_RESET), 0);
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out_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_SLAVE_ADDR), 0);
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out_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_EXT_SLAVE_ADDR), 0);
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out_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_BAUD), (4 << 3) | 0x4);
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if (mv64x60_i2c_control(MV64x60_I2C_CONTROL_TWSIEN,
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MV64x60_I2C_STATUS_NO_STATUS) < 0)
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return -1;
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/* send start */
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control = MV64x60_I2C_CONTROL_START | MV64x60_I2C_CONTROL_TWSIEN;
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status = MV64x60_I2C_STATUS_MAST_START;
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if (mv64x60_i2c_control(control, status) < 0)
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return -1;
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/* select device for writing */
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data = devaddr & ~0x1;
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control = MV64x60_I2C_CONTROL_TWSIEN;
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status = MV64x60_I2C_STATUS_MAST_WR_ADDR_ACK;
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if (mv64x60_i2c_write_byte(data, control, status) < 0)
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return -1;
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/* send offset of data */
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control = MV64x60_I2C_CONTROL_TWSIEN;
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status = MV64x60_I2C_STATUS_MAST_WR_ACK;
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if (offset_size > 1) {
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if (mv64x60_i2c_write_byte(offset >> 8, control, status) < 0)
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return -1;
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}
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if (mv64x60_i2c_write_byte(offset, control, status) < 0)
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return -1;
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/* resend start */
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control = MV64x60_I2C_CONTROL_START | MV64x60_I2C_CONTROL_TWSIEN;
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status = MV64x60_I2C_STATUS_MAST_REPEAT_START;
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if (mv64x60_i2c_control(control, status) < 0)
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return -1;
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/* select device for reading */
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data = devaddr | 0x1;
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control = MV64x60_I2C_CONTROL_TWSIEN;
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status = MV64x60_I2C_STATUS_MAST_RD_ADDR_ACK;
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if (mv64x60_i2c_write_byte(data, control, status) < 0)
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return -1;
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/* read all but last byte of data */
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control = MV64x60_I2C_CONTROL_ACK | MV64x60_I2C_CONTROL_TWSIEN;
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status = MV64x60_I2C_STATUS_MAST_RD_DATA_ACK;
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for (i=1; i<count; i++) {
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data = mv64x60_i2c_read_byte(control, status);
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if (data < 0) {
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printf("errors on iteration %d\n", i);
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return -1;
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}
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*buf++ = data;
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}
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/* read last byte of data */
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control = MV64x60_I2C_CONTROL_TWSIEN;
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status = MV64x60_I2C_STATUS_MAST_RD_DATA_NO_ACK;
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data = mv64x60_i2c_read_byte(control, status);
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if (data < 0)
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return -1;
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*buf++ = data;
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/* send stop */
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control = MV64x60_I2C_CONTROL_STOP | MV64x60_I2C_CONTROL_TWSIEN;
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status = MV64x60_I2C_STATUS_NO_STATUS;
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if (mv64x60_i2c_control(control, status) < 0)
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return -1;
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return count;
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}
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int mv64x60_i2c_open(void)
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{
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u32 v;
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void *devp;
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devp = find_node_by_compatible(NULL, "marvell,mv64360-i2c");
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if (devp == NULL)
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goto err_out;
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if (getprop(devp, "virtual-reg", &v, sizeof(v)) != sizeof(v))
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goto err_out;
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ctlr_base = (u8 *)v;
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return 0;
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err_out:
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return -1;
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}
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void mv64x60_i2c_close(void)
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{
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ctlr_base = NULL;
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}
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