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![Harninder Rai](/assets/img/avatar_default.png)
It adds cache-sram support in P1/P2 QorIQ platforms as under: * A small abstraction over powerpc's remote heap allocator * Exports mpc85xx_cache_sram_alloc()/free() APIs * Supports only one contiguous SRAM window * Drivers can do the following in Kconfig to use these APIs "select FSL_85XX_CACHE_SRAM if MPC85xx" * Required SRAM size and the offset where SRAM should be mapped must be provided at kernel command line as : cache-sram-size=<value> cache-sram-offset=<offset> Signed-off-by: Harninder Rai <harninder.rai@freescale.com> Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
48 lines
1.4 KiB
C
48 lines
1.4 KiB
C
/*
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* Copyright 2009 Freescale Semiconductor, Inc.
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*
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* Cache SRAM handling for QorIQ platform
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*
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* Author: Vivek Mahajan <vivek.mahajan@freescale.com>
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* This file is derived from the original work done
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* by Sylvain Munaut for the Bestcomm SRAM allocator.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef __ASM_POWERPC_FSL_85XX_CACHE_SRAM_H__
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#define __ASM_POWERPC_FSL_85XX_CACHE_SRAM_H__
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#include <asm/rheap.h>
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#include <linux/spinlock.h>
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/*
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* Cache-SRAM
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*/
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struct mpc85xx_cache_sram {
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phys_addr_t base_phys;
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void *base_virt;
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unsigned int size;
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rh_info_t *rh;
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spinlock_t lock;
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};
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extern void mpc85xx_cache_sram_free(void *ptr);
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extern void *mpc85xx_cache_sram_alloc(unsigned int size,
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phys_addr_t *phys, unsigned int align);
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#endif /* __AMS_POWERPC_FSL_85XX_CACHE_SRAM_H__ */
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