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![Paul Mackerras](/assets/img/avatar_default.png)
This adds support for KVM running on 64-bit Book 3S processors, specifically POWER7, in hypervisor mode. Using hypervisor mode means that the guest can use the processor's supervisor mode. That means that the guest can execute privileged instructions and access privileged registers itself without trapping to the host. This gives excellent performance, but does mean that KVM cannot emulate a processor architecture other than the one that the hardware implements. This code assumes that the guest is running paravirtualized using the PAPR (Power Architecture Platform Requirements) interface, which is the interface that IBM's PowerVM hypervisor uses. That means that existing Linux distributions that run on IBM pSeries machines will also run under KVM without modification. In order to communicate the PAPR hypercalls to qemu, this adds a new KVM_EXIT_PAPR_HCALL exit code to include/linux/kvm.h. Currently the choice between book3s_hv support and book3s_pr support (i.e. the existing code, which runs the guest in user mode) has to be made at kernel configuration time, so a given kernel binary can only do one or the other. This new book3s_hv code doesn't support MMIO emulation at present. Since we are running paravirtualized guests, this isn't a serious restriction. With the guest running in supervisor mode, most exceptions go straight to the guest. We will never get data or instruction storage or segment interrupts, alignment interrupts, decrementer interrupts, program interrupts, single-step interrupts, etc., coming to the hypervisor from the guest. Therefore this introduces a new KVMTEST_NONHV macro for the exception entry path so that we don't have to do the KVM test on entry to those exception handlers. We do however get hypervisor decrementer, hypervisor data storage, hypervisor instruction storage, and hypervisor emulation assist interrupts, so we have to handle those. In hypervisor mode, real-mode accesses can access all of RAM, not just a limited amount. Therefore we put all the guest state in the vcpu.arch and use the shadow_vcpu in the PACA only for temporary scratch space. We allocate the vcpu with kzalloc rather than vzalloc, and we don't use anything in the kvmppc_vcpu_book3s struct, so we don't allocate it. We don't have a shared page with the guest, but we still need a kvm_vcpu_arch_shared struct to store the values of various registers, so we include one in the vcpu_arch struct. The POWER7 processor has a restriction that all threads in a core have to be in the same partition. MMU-on kernel code counts as a partition (partition 0), so we have to do a partition switch on every entry to and exit from the guest. At present we require the host and guest to run in single-thread mode because of this hardware restriction. This code allocates a hashed page table for the guest and initializes it with HPTEs for the guest's Virtual Real Memory Area (VRMA). We require that the guest memory is allocated using 16MB huge pages, in order to simplify the low-level memory management. This also means that we can get away without tracking paging activity in the host for now, since huge pages can't be paged or swapped. This also adds a few new exports needed by the book3s_hv code. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Alexander Graf <agraf@suse.de>
115 lines
3.9 KiB
C
115 lines
3.9 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* Copyright IBM Corp. 2008
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*
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* Authors: Hollis Blanchard <hollisb@us.ibm.com>
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*/
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#ifndef __POWERPC_KVM_ASM_H__
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#define __POWERPC_KVM_ASM_H__
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/* IVPR must be 64KiB-aligned. */
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#define VCPU_SIZE_ORDER 4
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#define VCPU_SIZE_LOG (VCPU_SIZE_ORDER + 12)
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#define VCPU_TLB_PGSZ PPC44x_TLB_64K
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#define VCPU_SIZE_BYTES (1<<VCPU_SIZE_LOG)
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#define BOOKE_INTERRUPT_CRITICAL 0
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#define BOOKE_INTERRUPT_MACHINE_CHECK 1
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#define BOOKE_INTERRUPT_DATA_STORAGE 2
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#define BOOKE_INTERRUPT_INST_STORAGE 3
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#define BOOKE_INTERRUPT_EXTERNAL 4
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#define BOOKE_INTERRUPT_ALIGNMENT 5
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#define BOOKE_INTERRUPT_PROGRAM 6
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#define BOOKE_INTERRUPT_FP_UNAVAIL 7
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#define BOOKE_INTERRUPT_SYSCALL 8
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#define BOOKE_INTERRUPT_AP_UNAVAIL 9
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#define BOOKE_INTERRUPT_DECREMENTER 10
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#define BOOKE_INTERRUPT_FIT 11
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#define BOOKE_INTERRUPT_WATCHDOG 12
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#define BOOKE_INTERRUPT_DTLB_MISS 13
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#define BOOKE_INTERRUPT_ITLB_MISS 14
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#define BOOKE_INTERRUPT_DEBUG 15
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/* E500 */
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#define BOOKE_INTERRUPT_SPE_UNAVAIL 32
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#define BOOKE_INTERRUPT_SPE_FP_DATA 33
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#define BOOKE_INTERRUPT_SPE_FP_ROUND 34
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#define BOOKE_INTERRUPT_PERFORMANCE_MONITOR 35
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/* book3s */
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#define BOOK3S_INTERRUPT_SYSTEM_RESET 0x100
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#define BOOK3S_INTERRUPT_MACHINE_CHECK 0x200
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#define BOOK3S_INTERRUPT_DATA_STORAGE 0x300
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#define BOOK3S_INTERRUPT_DATA_SEGMENT 0x380
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#define BOOK3S_INTERRUPT_INST_STORAGE 0x400
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#define BOOK3S_INTERRUPT_INST_SEGMENT 0x480
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#define BOOK3S_INTERRUPT_EXTERNAL 0x500
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#define BOOK3S_INTERRUPT_EXTERNAL_LEVEL 0x501
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#define BOOK3S_INTERRUPT_EXTERNAL_HV 0x502
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#define BOOK3S_INTERRUPT_ALIGNMENT 0x600
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#define BOOK3S_INTERRUPT_PROGRAM 0x700
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#define BOOK3S_INTERRUPT_FP_UNAVAIL 0x800
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#define BOOK3S_INTERRUPT_DECREMENTER 0x900
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#define BOOK3S_INTERRUPT_HV_DECREMENTER 0x980
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#define BOOK3S_INTERRUPT_SYSCALL 0xc00
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#define BOOK3S_INTERRUPT_TRACE 0xd00
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#define BOOK3S_INTERRUPT_H_DATA_STORAGE 0xe00
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#define BOOK3S_INTERRUPT_H_INST_STORAGE 0xe20
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#define BOOK3S_INTERRUPT_H_EMUL_ASSIST 0xe40
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#define BOOK3S_INTERRUPT_PERFMON 0xf00
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#define BOOK3S_INTERRUPT_ALTIVEC 0xf20
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#define BOOK3S_INTERRUPT_VSX 0xf40
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#define BOOK3S_IRQPRIO_SYSTEM_RESET 0
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#define BOOK3S_IRQPRIO_DATA_SEGMENT 1
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#define BOOK3S_IRQPRIO_INST_SEGMENT 2
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#define BOOK3S_IRQPRIO_DATA_STORAGE 3
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#define BOOK3S_IRQPRIO_INST_STORAGE 4
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#define BOOK3S_IRQPRIO_ALIGNMENT 5
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#define BOOK3S_IRQPRIO_PROGRAM 6
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#define BOOK3S_IRQPRIO_FP_UNAVAIL 7
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#define BOOK3S_IRQPRIO_ALTIVEC 8
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#define BOOK3S_IRQPRIO_VSX 9
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#define BOOK3S_IRQPRIO_SYSCALL 10
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#define BOOK3S_IRQPRIO_MACHINE_CHECK 11
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#define BOOK3S_IRQPRIO_DEBUG 12
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#define BOOK3S_IRQPRIO_EXTERNAL 13
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#define BOOK3S_IRQPRIO_DECREMENTER 14
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#define BOOK3S_IRQPRIO_PERFORMANCE_MONITOR 15
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#define BOOK3S_IRQPRIO_EXTERNAL_LEVEL 16
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#define BOOK3S_IRQPRIO_MAX 17
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#define BOOK3S_HFLAG_DCBZ32 0x1
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#define BOOK3S_HFLAG_SLB 0x2
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#define BOOK3S_HFLAG_PAIRED_SINGLE 0x4
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#define BOOK3S_HFLAG_NATIVE_PS 0x8
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#define RESUME_FLAG_NV (1<<0) /* Reload guest nonvolatile state? */
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#define RESUME_FLAG_HOST (1<<1) /* Resume host? */
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#define RESUME_GUEST 0
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#define RESUME_GUEST_NV RESUME_FLAG_NV
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#define RESUME_HOST RESUME_FLAG_HOST
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#define RESUME_HOST_NV (RESUME_FLAG_HOST|RESUME_FLAG_NV)
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#define KVM_GUEST_MODE_NONE 0
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#define KVM_GUEST_MODE_GUEST 1
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#define KVM_GUEST_MODE_SKIP 2
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#define KVM_INST_FETCH_FAILED -1
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#endif /* __POWERPC_KVM_ASM_H__ */
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