Manu Gautam 4724b50f9e phy: qcom-qusb2: Fix HSTX_TRIM tuning with fused value for SDM845 ... [ Upstream commit c88520db18 ] Tune1 register on sdm845 is used to update HSTX_TRIM with fused setting. Enable same by specifying update_tune1_with_efuse flag for sdm845, otherwise driver ends up programming tune2 register. Fixes: ef17f6e212 ("phy: qcom-qusb2: Add QUSB2 PHYs support for sdm845") Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Acked-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Sasha Levin <sashal@kernel.org>		2018-12-17 09:24:34 +01:00
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Kconfig	phy: Add a driver for the ATH79 USB phy	2018-04-25 10:53:00 +05:30
Makefile	phy: Add a driver for the ATH79 USB phy	2018-04-25 10:53:00 +05:30
phy-ath79-usb.c	phy: Add a driver for the ATH79 USB phy	2018-04-25 10:53:00 +05:30
phy-qcom-apq8064-sata.c
phy-qcom-ipq806x-sata.c
phy-qcom-qmp.c	phy: qcom-qmp: Add QMP V3 USB3 UNI PHY support for sdm845	2018-05-20 21:51:30 +05:30
phy-qcom-qmp.h	phy: qcom-qmp: Add QMP V3 USB3 UNI PHY support for sdm845	2018-05-20 21:51:30 +05:30
phy-qcom-qusb2.c	phy: qcom-qusb2: Fix HSTX_TRIM tuning with fused value for SDM845	2018-12-17 09:24:34 +01:00
phy-qcom-ufs-i.h	ufs/phy: qcom: Refactor to use phy_init call	2017-10-23 11:19:27 +05:30
phy-qcom-ufs-qmp-14nm.c	ufs/phy: qcom: Refactor to use phy_init call	2017-10-23 11:19:27 +05:30
phy-qcom-ufs-qmp-14nm.h
phy-qcom-ufs-qmp-20nm.c	ufs/phy: qcom: Refactor to use phy_init call	2017-10-23 11:19:27 +05:30
phy-qcom-ufs-qmp-20nm.h
phy-qcom-ufs.c	phy: qcom-ufs: add MODULE_LICENSE tag	2018-03-12 15:11:59 +05:30
phy-qcom-usb-hs.c	phy: qcom-usb-hs: Mark expected switch fall-through	2018-07-10 13:45:11 +05:30
phy-qcom-usb-hsic.c