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6fdd68b14a
On hives with xgmi enabled, the fb_location aperture is a size which defines the total framebuffer size of all nodes in the hive. Each GPU in the hive has the same view via the fb_location aperture. GPU0 starts at offset (0 * segment size), GPU1 starts at offset (1 * segment size), etc. For access to local vram on each GPU, we need to take this offset into account. This including on setting up GPUVM page table and GART table v2: squash in "drm/amdgpu: Init correct fb region for none XGMI configuration" Acked-by: Huang Rui <ray.huang@amd.com> Acked-by: Slava Abramov <slava.abramov@amd.com> Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Huang Rui <ray.huang@amd.com>
53 lines
2 KiB
C
53 lines
2 KiB
C
/*
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* Copyright 2018 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "amdgpu.h"
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#include "gfxhub_v1_1.h"
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#include "gc/gc_9_2_1_offset.h"
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#include "gc/gc_9_2_1_sh_mask.h"
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#include "soc15_common.h"
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int gfxhub_v1_1_get_xgmi_info(struct amdgpu_device *adev)
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{
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u32 xgmi_lfb_cntl = RREG32_SOC15(GC, 0, mmMC_VM_XGMI_LFB_CNTL);
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u32 max_region =
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REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL, PF_MAX_REGION);
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/* PF_MAX_REGION=0 means xgmi is disabled */
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if (max_region) {
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adev->gmc.xgmi.num_physical_nodes = max_region + 1;
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if (adev->gmc.xgmi.num_physical_nodes > 4)
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return -EINVAL;
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adev->gmc.xgmi.physical_node_id =
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REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL, PF_LFB_REGION);
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if (adev->gmc.xgmi.physical_node_id > 3)
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return -EINVAL;
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adev->gmc.xgmi.node_segment_size = REG_GET_FIELD(
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RREG32_SOC15(GC, 0, mmMC_VM_XGMI_LFB_SIZE),
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MC_VM_XGMI_LFB_SIZE, PF_LFB_SIZE) << 24;
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}
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return 0;
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}
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