linux-stable/drivers/pinctrl/sh-pfc
Geert Uytterhoeven 02aeb2f215 pinctrl: sh-pfc: sh7269: Fix CAN function GPIOs
pinmux_func_gpios[] contains a hole due to the missing function GPIO
definition for the "CTX0&CTX1" signal, which is the logical "AND" of the
first two CAN outputs.

A closer look reveals other issues:
  - Some functionality is available on alternative pins, but the
    PINMUX_DATA() entries is using the wrong marks,
  - Several configurations are missing.

Fix this by:
  - Renaming CTX0CTX1CTX2_MARK, CRX0CRX1_PJ22_MARK, and
    CRX0CRX1CRX2_PJ20_MARK to CTX0_CTX1_CTX2_MARK, CRX0_CRX1_PJ22_MARK,
    resp. CRX0_CRX1_CRX2_PJ20_MARK for consistency with the
    corresponding enum IDs,
  - Adding all missing enum IDs and marks,
  - Use the right (*_PJ2x) variants for alternative pins,
  - Adding all missing configurations to pinmux_data[],
  - Adding all missing function GPIO definitions to pinmux_func_gpios[].

See SH7268 Group, SH7269 Group User’s Manual: Hardware, Rev. 2.00:
  [1] Table 1.4 List of Pins
  [2] Figure 23.29 Connection Example when Using Channels 0 and 1 as One
      Channel (64 Mailboxes × 1 Channel) and Channel 2 as One Channel
      (32 Mailboxes × 1 Channel),
  [3] Figure 23.30 Connection Example when Using Channels 0, 1, and 2 as
      One Channel (96 Mailboxes × 1 Channel),
  [4] Table 48.3 Multiplexed Pins (Port B),
  [5] Table 48.4 Multiplexed Pins (Port C),
  [6] Table 48.10 Multiplexed Pins (Port J),
  [7] Section 48.2.4 Port B Control Registers 0 to 5 (PBCR0 to PBCR5).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191218194812.12741-5-geert+renesas@glider.be
2019-12-31 09:57:40 +01:00
..
core.c pinctrl: sh-pfc: r8a7796: Add R8A77961 PFC support 2019-11-01 13:42:52 +01:00
core.h pinctrl: sh-pfc: Convert to SPDX identifiers 2018-09-11 12:25:32 +02:00
gpio.c pinctrl: sh-pfc: Make legacy function GPIO handling less fragile 2019-12-09 09:43:02 +01:00
Kconfig pinctrl: sh-pfc: Remove use of ARCH_R8A7796 2019-12-13 14:33:20 +01:00
Makefile pinctrl: sh-pfc: r8a7796: Add R8A77961 PFC support 2019-11-01 13:42:52 +01:00
pfc-emev2.c pinctrl: sh-pfc: emev2: Use new macros for non-GPIO pins 2019-06-04 11:19:04 +02:00
pfc-r8a73a4.c pinctrl: sh-pfc: Add SH_PFC_PIN_CFG_PULL_UP_DOWN shorthand 2019-05-21 11:07:29 +02:00
pfc-r8a7740.c pinctrl: sh-pfc: Add SH_PFC_PIN_CFG_PULL_UP_DOWN shorthand 2019-05-21 11:07:29 +02:00
pfc-r8a7778.c pinctrl: sh-pfc: r8a7778: Fix duplicate SDSELF_B and SD1_CLK_B 2019-12-31 09:57:40 +01:00
pfc-r8a7779.c pinctrl: sh-pfc: Rename 2-parameter CPU_ALL_PORT() variant 2019-05-21 11:07:29 +02:00
pfc-r8a7790.c pinctrl: sh-pfc: r8a7790: Use new macros for non-GPIO pins 2019-06-04 11:19:08 +02:00
pfc-r8a7791.c pinctrl: sh-pfc: Rename 2-parameter CPU_ALL_PORT() variant 2019-05-21 11:07:29 +02:00
pfc-r8a7792.c pinctrl: sh-pfc: Rename 2-parameter CPU_ALL_PORT() variant 2019-05-21 11:07:29 +02:00
pfc-r8a7794.c pinctrl: sh-pfc: Rename 2-parameter CPU_ALL_PORT() variant 2019-05-21 11:07:29 +02:00
pfc-r8a7795-es1.c pinctrl: sh-pfc: pfc-r8a7795-es1: Fix typo in pinmux macro for SCL3 2019-10-14 12:11:12 +02:00
pfc-r8a7795.c pinctrl: sh-pfc: pfc-r8a7795: Fix typo in pinmux macro for SCL3 2019-10-14 12:11:12 +02:00
pfc-r8a7796.c pinctrl: sh-pfc: r8a7796: Add R8A77961 PFC support 2019-11-01 13:42:52 +01:00
pfc-r8a77470.c pinctrl: sh-pfc: Rename 2-parameter CPU_ALL_PORT() variant 2019-05-21 11:07:29 +02:00
pfc-r8a77965.c pinctrl: sh-pfc: r8a77965: Fix DU_DOTCLKIN3 drive/bias control 2019-12-20 15:47:38 +01:00
pfc-r8a77970.c pinctrl: sh-pfc: r8a77970: Remove MMC_{CD,WP} 2019-05-21 11:07:29 +02:00
pfc-r8a77980.c This is the bulk of pin control changes for the v5.3 kernel 2019-07-13 15:02:27 -07:00
pfc-r8a77990.c Revert "pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit31 when using SIM0_D" 2019-10-01 09:52:52 +02:00
pfc-r8a77995.c pinctrl: sh-pfc: Rename 2-parameter CPU_ALL_PORT() variant 2019-05-21 11:07:29 +02:00
pfc-sh73a0.c pinctrl: sh-pfc: sh73a0: Use new macros for non-GPIO pins 2019-06-04 11:19:22 +02:00
pfc-sh7203.c pinctrl: sh-pfc: Absorb enum IDs in PINMUX_DATA_REG() macro 2019-04-02 09:58:01 +02:00
pfc-sh7264.c pinctrl: sh-pfc: sh7264: Fix CAN function GPIOs 2019-12-31 09:57:40 +01:00
pfc-sh7269.c pinctrl: sh-pfc: sh7269: Fix CAN function GPIOs 2019-12-31 09:57:40 +01:00
pfc-sh7720.c pinctrl: sh-pfc: Absorb enum IDs in PINMUX_DATA_REG() macro 2019-04-02 09:58:01 +02:00
pfc-sh7722.c pinctrl: sh-pfc: Absorb enum IDs in PINMUX_DATA_REG() macro 2019-04-02 09:58:01 +02:00
pfc-sh7723.c pinctrl: sh-pfc: Absorb enum IDs in PINMUX_DATA_REG() macro 2019-04-02 09:58:01 +02:00
pfc-sh7724.c pinctrl: sh-pfc: Absorb enum IDs in PINMUX_DATA_REG() macro 2019-04-02 09:58:01 +02:00
pfc-sh7734.c pinctrl: sh-pfc: sh7734: Fix duplicate TCLK1_B 2019-11-01 13:42:52 +01:00
pfc-sh7757.c pinctrl: sh-pfc: Absorb enum IDs in PINMUX_DATA_REG() macro 2019-04-02 09:58:01 +02:00
pfc-sh7785.c pinctrl: sh-pfc: Absorb enum IDs in PINMUX_DATA_REG() macro 2019-04-02 09:58:01 +02:00
pfc-sh7786.c pinctrl: sh-pfc: Absorb enum IDs in PINMUX_DATA_REG() macro 2019-04-02 09:58:01 +02:00
pfc-shx3.c pinctrl: sh-pfc: Absorb enum IDs in PINMUX_DATA_REG() macro 2019-04-02 09:58:01 +02:00
pinctrl.c pinctrl: sh-pfc: Unlock on error in sh_pfc_func_set_mux() 2019-09-12 12:59:43 +01:00
sh_pfc.h pinctrl: sh-pfc: r8a7796: Add R8A77961 PFC support 2019-11-01 13:42:52 +01:00