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88197e6ab3
pic_in_kernel(), ioapic_in_kernel() and irqchip_kernel() have the same implementation. Signed-off-by: Peng Hao <richard.peng@oppo.com> Message-Id: <HKAPR02MB4291D5926EA10B8BFE9EA0D3E0B70@HKAPR02MB4291.apcprd02.prod.outlook.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
128 lines
3 KiB
C
128 lines
3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __KVM_IO_APIC_H
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#define __KVM_IO_APIC_H
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#include <linux/kvm_host.h>
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#include <kvm/iodev.h>
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#include "irq.h"
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struct kvm;
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struct kvm_vcpu;
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#define IOAPIC_NUM_PINS KVM_IOAPIC_NUM_PINS
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#define MAX_NR_RESERVED_IOAPIC_PINS KVM_MAX_IRQ_ROUTES
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#define IOAPIC_VERSION_ID 0x11 /* IOAPIC version */
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#define IOAPIC_EDGE_TRIG 0
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#define IOAPIC_LEVEL_TRIG 1
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#define IOAPIC_DEFAULT_BASE_ADDRESS 0xfec00000
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#define IOAPIC_MEM_LENGTH 0x100
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/* Direct registers. */
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#define IOAPIC_REG_SELECT 0x00
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#define IOAPIC_REG_WINDOW 0x10
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/* Indirect registers. */
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#define IOAPIC_REG_APIC_ID 0x00 /* x86 IOAPIC only */
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#define IOAPIC_REG_VERSION 0x01
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#define IOAPIC_REG_ARB_ID 0x02 /* x86 IOAPIC only */
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/*ioapic delivery mode*/
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#define IOAPIC_FIXED 0x0
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#define IOAPIC_LOWEST_PRIORITY 0x1
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#define IOAPIC_PMI 0x2
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#define IOAPIC_NMI 0x4
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#define IOAPIC_INIT 0x5
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#define IOAPIC_EXTINT 0x7
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#ifdef CONFIG_X86
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#define RTC_GSI 8
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#else
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#define RTC_GSI -1U
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#endif
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struct dest_map {
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/* vcpu bitmap where IRQ has been sent */
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DECLARE_BITMAP(map, KVM_MAX_VCPU_ID);
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/*
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* Vector sent to a given vcpu, only valid when
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* the vcpu's bit in map is set
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*/
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u8 vectors[KVM_MAX_VCPU_ID];
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};
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struct rtc_status {
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int pending_eoi;
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struct dest_map dest_map;
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};
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union kvm_ioapic_redirect_entry {
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u64 bits;
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struct {
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u8 vector;
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u8 delivery_mode:3;
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u8 dest_mode:1;
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u8 delivery_status:1;
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u8 polarity:1;
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u8 remote_irr:1;
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u8 trig_mode:1;
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u8 mask:1;
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u8 reserve:7;
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u8 reserved[4];
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u8 dest_id;
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} fields;
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};
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struct kvm_ioapic {
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u64 base_address;
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u32 ioregsel;
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u32 id;
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u32 irr;
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u32 pad;
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union kvm_ioapic_redirect_entry redirtbl[IOAPIC_NUM_PINS];
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unsigned long irq_states[IOAPIC_NUM_PINS];
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struct kvm_io_device dev;
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struct kvm *kvm;
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void (*ack_notifier)(void *opaque, int irq);
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spinlock_t lock;
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struct rtc_status rtc_status;
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struct delayed_work eoi_inject;
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u32 irq_eoi[IOAPIC_NUM_PINS];
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u32 irr_delivered;
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};
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#ifdef DEBUG
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#define ASSERT(x) \
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do { \
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if (!(x)) { \
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printk(KERN_EMERG "assertion failed %s: %d: %s\n", \
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__FILE__, __LINE__, #x); \
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BUG(); \
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} \
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} while (0)
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#else
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#define ASSERT(x) do { } while (0)
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#endif
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static inline int ioapic_in_kernel(struct kvm *kvm)
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{
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return irqchip_kernel(kvm);
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}
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void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu);
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void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector,
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int trigger_mode);
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int kvm_ioapic_init(struct kvm *kvm);
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void kvm_ioapic_destroy(struct kvm *kvm);
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int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
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int level, bool line_status);
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void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id);
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void kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state);
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void kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state);
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void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu,
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ulong *ioapic_handled_vectors);
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void kvm_scan_ioapic_routes(struct kvm_vcpu *vcpu,
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ulong *ioapic_handled_vectors);
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#endif
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