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0b42434068
The regmap API supports IO port accessors so we can take advantage of regmap abstractions rather than handling access to the device registers directly in the driver. The 104-dio-48e module is migrated to the new i8255 library interface leveraging the gpio-regmap API. Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: William Breathitt Gray <william.gray@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
238 lines
7.6 KiB
C
238 lines
7.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* GPIO driver for the ACCES 104-DIO-48E series
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* Copyright (C) 2016 William Breathitt Gray
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*
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* This driver supports the following ACCES devices: 104-DIO-48E and
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* 104-DIO-24E.
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*/
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#include <linux/bits.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/ioport.h>
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#include <linux/irq.h>
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#include <linux/isa.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/regmap.h>
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#include <linux/types.h>
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#include "gpio-i8255.h"
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MODULE_IMPORT_NS(I8255);
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#define DIO48E_EXTENT 16
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#define MAX_NUM_DIO48E max_num_isa_dev(DIO48E_EXTENT)
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static unsigned int base[MAX_NUM_DIO48E];
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static unsigned int num_dio48e;
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module_param_hw_array(base, uint, ioport, &num_dio48e, 0);
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MODULE_PARM_DESC(base, "ACCES 104-DIO-48E base addresses");
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static unsigned int irq[MAX_NUM_DIO48E];
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static unsigned int num_irq;
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module_param_hw_array(irq, uint, irq, &num_irq, 0);
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MODULE_PARM_DESC(irq, "ACCES 104-DIO-48E interrupt line numbers");
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#define DIO48E_ENABLE_INTERRUPT 0xB
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#define DIO48E_DISABLE_INTERRUPT DIO48E_ENABLE_INTERRUPT
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#define DIO48E_CLEAR_INTERRUPT 0xF
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#define DIO48E_NUM_PPI 2
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static const struct regmap_range dio48e_wr_ranges[] = {
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regmap_reg_range(0x0, 0x9), regmap_reg_range(0xB, 0xB),
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regmap_reg_range(0xD, 0xD), regmap_reg_range(0xF, 0xF),
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};
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static const struct regmap_range dio48e_rd_ranges[] = {
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regmap_reg_range(0x0, 0x2), regmap_reg_range(0x4, 0x6),
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regmap_reg_range(0xB, 0xB), regmap_reg_range(0xD, 0xD),
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regmap_reg_range(0xF, 0xF),
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};
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static const struct regmap_range dio48e_volatile_ranges[] = {
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i8255_volatile_regmap_range(0x0), i8255_volatile_regmap_range(0x4),
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regmap_reg_range(0xB, 0xB), regmap_reg_range(0xD, 0xD),
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regmap_reg_range(0xF, 0xF),
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};
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static const struct regmap_range dio48e_precious_ranges[] = {
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regmap_reg_range(0xB, 0xB), regmap_reg_range(0xD, 0xD),
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regmap_reg_range(0xF, 0xF),
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};
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static const struct regmap_access_table dio48e_wr_table = {
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.yes_ranges = dio48e_wr_ranges,
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.n_yes_ranges = ARRAY_SIZE(dio48e_wr_ranges),
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};
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static const struct regmap_access_table dio48e_rd_table = {
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.yes_ranges = dio48e_rd_ranges,
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.n_yes_ranges = ARRAY_SIZE(dio48e_rd_ranges),
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};
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static const struct regmap_access_table dio48e_volatile_table = {
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.yes_ranges = dio48e_volatile_ranges,
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.n_yes_ranges = ARRAY_SIZE(dio48e_volatile_ranges),
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};
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static const struct regmap_access_table dio48e_precious_table = {
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.yes_ranges = dio48e_precious_ranges,
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.n_yes_ranges = ARRAY_SIZE(dio48e_precious_ranges),
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};
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static const struct regmap_config dio48e_regmap_config = {
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.reg_bits = 8,
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.reg_stride = 1,
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.val_bits = 8,
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.io_port = true,
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.max_register = 0xF,
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.wr_table = &dio48e_wr_table,
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.rd_table = &dio48e_rd_table,
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.volatile_table = &dio48e_volatile_table,
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.precious_table = &dio48e_precious_table,
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.cache_type = REGCACHE_FLAT,
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};
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/* only bit 3 on each respective Port C supports interrupts */
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#define DIO48E_REGMAP_IRQ(_ppi) \
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[19 + (_ppi) * 24] = { \
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.mask = BIT(_ppi), \
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.type = { .types_supported = IRQ_TYPE_EDGE_RISING }, \
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}
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static const struct regmap_irq dio48e_regmap_irqs[] = {
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DIO48E_REGMAP_IRQ(0), DIO48E_REGMAP_IRQ(1),
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};
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static int dio48e_handle_mask_sync(struct regmap *const map, const int index,
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const unsigned int mask_buf_def,
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const unsigned int mask_buf,
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void *const irq_drv_data)
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{
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unsigned int *const irq_mask = irq_drv_data;
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const unsigned int prev_mask = *irq_mask;
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const unsigned int all_masked = GENMASK(1, 0);
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int err;
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unsigned int val;
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/* exit early if no change since the previous mask */
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if (mask_buf == prev_mask)
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return 0;
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/* remember the current mask for the next mask sync */
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*irq_mask = mask_buf;
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/* if all previously masked, enable interrupts when unmasking */
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if (prev_mask == all_masked) {
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err = regmap_write(map, DIO48E_CLEAR_INTERRUPT, 0x00);
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if (err)
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return err;
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return regmap_write(map, DIO48E_ENABLE_INTERRUPT, 0x00);
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}
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/* if all are currently masked, disable interrupts */
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if (mask_buf == all_masked)
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return regmap_read(map, DIO48E_DISABLE_INTERRUPT, &val);
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return 0;
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}
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#define DIO48E_NGPIO 48
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static const char *dio48e_names[DIO48E_NGPIO] = {
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"PPI Group 0 Port A 0", "PPI Group 0 Port A 1", "PPI Group 0 Port A 2",
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"PPI Group 0 Port A 3", "PPI Group 0 Port A 4", "PPI Group 0 Port A 5",
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"PPI Group 0 Port A 6", "PPI Group 0 Port A 7", "PPI Group 0 Port B 0",
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"PPI Group 0 Port B 1", "PPI Group 0 Port B 2", "PPI Group 0 Port B 3",
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"PPI Group 0 Port B 4", "PPI Group 0 Port B 5", "PPI Group 0 Port B 6",
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"PPI Group 0 Port B 7", "PPI Group 0 Port C 0", "PPI Group 0 Port C 1",
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"PPI Group 0 Port C 2", "PPI Group 0 Port C 3", "PPI Group 0 Port C 4",
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"PPI Group 0 Port C 5", "PPI Group 0 Port C 6", "PPI Group 0 Port C 7",
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"PPI Group 1 Port A 0", "PPI Group 1 Port A 1", "PPI Group 1 Port A 2",
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"PPI Group 1 Port A 3", "PPI Group 1 Port A 4", "PPI Group 1 Port A 5",
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"PPI Group 1 Port A 6", "PPI Group 1 Port A 7", "PPI Group 1 Port B 0",
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"PPI Group 1 Port B 1", "PPI Group 1 Port B 2", "PPI Group 1 Port B 3",
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"PPI Group 1 Port B 4", "PPI Group 1 Port B 5", "PPI Group 1 Port B 6",
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"PPI Group 1 Port B 7", "PPI Group 1 Port C 0", "PPI Group 1 Port C 1",
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"PPI Group 1 Port C 2", "PPI Group 1 Port C 3", "PPI Group 1 Port C 4",
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"PPI Group 1 Port C 5", "PPI Group 1 Port C 6", "PPI Group 1 Port C 7"
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};
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static int dio48e_irq_init_hw(struct regmap *const map)
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{
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unsigned int val;
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/* Disable IRQ by default */
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return regmap_read(map, DIO48E_DISABLE_INTERRUPT, &val);
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}
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static int dio48e_probe(struct device *dev, unsigned int id)
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{
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const char *const name = dev_name(dev);
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struct i8255_regmap_config config = {};
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void __iomem *regs;
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struct regmap *map;
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int err;
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struct regmap_irq_chip *chip;
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unsigned int irq_mask;
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struct regmap_irq_chip_data *chip_data;
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if (!devm_request_region(dev, base[id], DIO48E_EXTENT, name)) {
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dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",
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base[id], base[id] + DIO48E_EXTENT);
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return -EBUSY;
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}
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regs = devm_ioport_map(dev, base[id], DIO48E_EXTENT);
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if (!regs)
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return -ENOMEM;
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map = devm_regmap_init_mmio(dev, regs, &dio48e_regmap_config);
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if (IS_ERR(map))
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return dev_err_probe(dev, PTR_ERR(map),
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"Unable to initialize register map\n");
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chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
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if (!chip)
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return -ENOMEM;
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chip->irq_drv_data = devm_kzalloc(dev, sizeof(irq_mask), GFP_KERNEL);
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if (!chip->irq_drv_data)
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return -ENOMEM;
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chip->name = name;
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/* No IRQ status register so use CLEAR_INTERRUPT register instead */
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chip->status_base = DIO48E_CLEAR_INTERRUPT;
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chip->mask_base = DIO48E_ENABLE_INTERRUPT;
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chip->ack_base = DIO48E_CLEAR_INTERRUPT;
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/* CLEAR_INTERRUPT doubles as status register so we need it cleared */
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chip->clear_ack = true;
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chip->status_invert = true;
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chip->num_regs = 1;
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chip->irqs = dio48e_regmap_irqs;
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chip->num_irqs = ARRAY_SIZE(dio48e_regmap_irqs);
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chip->handle_mask_sync = dio48e_handle_mask_sync;
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/* Initialize to prevent spurious interrupts before we're ready */
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err = dio48e_irq_init_hw(map);
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if (err)
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return err;
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err = devm_regmap_add_irq_chip(dev, map, irq[id], 0, 0, chip, &chip_data);
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if (err)
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return dev_err_probe(dev, err, "IRQ registration failed\n");
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config.parent = dev;
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config.map = map;
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config.num_ppi = DIO48E_NUM_PPI;
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config.names = dio48e_names;
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config.domain = regmap_irq_get_domain(chip_data);
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return devm_i8255_regmap_register(dev, &config);
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}
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static struct isa_driver dio48e_driver = {
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.probe = dio48e_probe,
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.driver = {
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.name = "104-dio-48e"
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},
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};
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module_isa_driver_with_irq(dio48e_driver, num_dio48e, num_irq);
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MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
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MODULE_DESCRIPTION("ACCES 104-DIO-48E GPIO driver");
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MODULE_LICENSE("GPL v2");
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