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![MyungJoo Ham](/assets/img/avatar_default.png)
Exynos4-bus device devfreq driver add DVFS capability for Exynos4210/4212/4412-Bus (memory). The driver monitors PPMU counters of memory controllers and adjusts operating frequencies and voltages with OPP. For Exynos4210, vdd_int is controlled. For exynos4412/4212, vdd_mif and vdd_int are controlled. Dependency (CONFIG_EXYNOS_ASV): Exynos4 ASV driver has been posted in the mailing list; however, it si not yet upstreamed. Although the current revision of Exynos4 ASV patch does not contain "CONFIG_EXYNOS_ASV", we have added the symbol to hide the dependent from compilers for now. As soon as Exynos4 ASV drivers are merged, the #ifdef statement will be removed or the name will be changed. However, enabling ASV is essential in most Exynos4 chips to reduce the power consumption of Exynos4210 because without ASV, this Devfreq driver assumes the worst case scenario, which consumes more power. Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> --- Changes from v1 - Support 4212 and 4412 as well as 4210.
81 lines
3.1 KiB
Text
81 lines
3.1 KiB
Text
menuconfig PM_DEVFREQ
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bool "Generic Dynamic Voltage and Frequency Scaling (DVFS) support"
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help
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A device may have a list of frequencies and voltages available.
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devfreq, a generic DVFS framework can be registered for a device
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in order to let the governor provided to devfreq choose an
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operating frequency based on the device driver's policy.
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Each device may have its own governor and policy. Devfreq can
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reevaluate the device state periodically and/or based on the
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notification to "nb", a notifier block, of devfreq.
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Like some CPUs with CPUfreq, a device may have multiple clocks.
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However, because the clock frequencies of a single device are
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determined by the single device's state, an instance of devfreq
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is attached to a single device and returns a "representative"
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clock frequency of the device, which is also attached
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to a device by 1-to-1. The device registering devfreq takes the
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responsiblity to "interpret" the representative frequency and
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to set its every clock accordingly with the "target" callback
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given to devfreq.
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When OPP is used with the devfreq device, it is recommended to
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register devfreq's nb to the OPP's notifier head. If OPP is
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used with the devfreq device, you may use OPP helper
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functions defined in devfreq.h.
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if PM_DEVFREQ
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comment "DEVFREQ Governors"
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config DEVFREQ_GOV_SIMPLE_ONDEMAND
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bool "Simple Ondemand"
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help
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Chooses frequency based on the recent load on the device. Works
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similar as ONDEMAND governor of CPUFREQ does. A device with
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Simple-Ondemand should be able to provide busy/total counter
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values that imply the usage rate. A device may provide tuned
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values to the governor with data field at devfreq_add_device().
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config DEVFREQ_GOV_PERFORMANCE
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bool "Performance"
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help
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Sets the frequency at the maximum available frequency.
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This governor always returns UINT_MAX as frequency so that
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the DEVFREQ framework returns the highest frequency available
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at any time.
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config DEVFREQ_GOV_POWERSAVE
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bool "Powersave"
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help
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Sets the frequency at the minimum available frequency.
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This governor always returns 0 as frequency so that
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the DEVFREQ framework returns the lowest frequency available
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at any time.
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config DEVFREQ_GOV_USERSPACE
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bool "Userspace"
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help
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Sets the frequency at the user specified one.
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This governor returns the user configured frequency if there
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has been an input to /sys/devices/.../power/devfreq_set_freq.
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Otherwise, the governor does not change the frequnecy
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given at the initialization.
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comment "DEVFREQ Drivers"
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config ARM_EXYNOS4_BUS_DEVFREQ
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bool "ARM Exynos4210/4212/4412 Memory Bus DEVFREQ Driver"
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depends on CPU_EXYNOS4210 || CPU_EXYNOS4212 || CPU_EXYNOS4412
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select ARCH_HAS_OPP
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select DEVFREQ_GOV_SIMPLE_ONDEMAND
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help
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This adds the DEVFREQ driver for Exynos4210 memory bus (vdd_int)
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and Exynos4212/4412 memory interface and bus (vdd_mif + vdd_int).
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It reads PPMU counters of memory controllers and adjusts
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the operating frequencies and voltages with OPP support.
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To operate with optimal voltages, ASV support is required
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(CONFIG_EXYNOS_ASV).
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endif # PM_DEVFREQ
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