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![Paul Gortmaker](/assets/img/avatar_default.png)
They were getting this implicitly by an include of module.h from device.h -- but we are going to clean that up and break that include chain, so include export.h explicitly now. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
553 lines
13 KiB
C
553 lines
13 KiB
C
/*
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* IDE DMA support (including IDE PCI BM-DMA).
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*
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* Copyright (C) 1995-1998 Mark Lord
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* Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
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* Copyright (C) 2004, 2007 Bartlomiej Zolnierkiewicz
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*
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* May be copied or modified under the terms of the GNU General Public License
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*
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* DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
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*/
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/*
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* Special Thanks to Mark for his Six years of work.
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*/
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/*
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* Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
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* fixing the problem with the BIOS on some Acer motherboards.
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*
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* Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
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* "TX" chipset compatibility and for providing patches for the "TX" chipset.
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*
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* Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
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* at generic DMA -- his patches were referred to when preparing this code.
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*
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* Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
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* for supplying a Promise UDMA board & WD UDMA drive for this work!
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*/
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#include <linux/types.h>
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#include <linux/gfp.h>
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#include <linux/kernel.h>
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#include <linux/export.h>
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#include <linux/ide.h>
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#include <linux/scatterlist.h>
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#include <linux/dma-mapping.h>
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static const struct drive_list_entry drive_whitelist[] = {
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{ "Micropolis 2112A" , NULL },
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{ "CONNER CTMA 4000" , NULL },
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{ "CONNER CTT8000-A" , NULL },
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{ "ST34342A" , NULL },
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{ NULL , NULL }
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};
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static const struct drive_list_entry drive_blacklist[] = {
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{ "WDC AC11000H" , NULL },
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{ "WDC AC22100H" , NULL },
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{ "WDC AC32500H" , NULL },
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{ "WDC AC33100H" , NULL },
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{ "WDC AC31600H" , NULL },
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{ "WDC AC32100H" , "24.09P07" },
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{ "WDC AC23200L" , "21.10N21" },
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{ "Compaq CRD-8241B" , NULL },
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{ "CRD-8400B" , NULL },
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{ "CRD-8480B", NULL },
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{ "CRD-8482B", NULL },
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{ "CRD-84" , NULL },
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{ "SanDisk SDP3B" , NULL },
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{ "SanDisk SDP3B-64" , NULL },
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{ "SANYO CD-ROM CRD" , NULL },
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{ "HITACHI CDR-8" , NULL },
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{ "HITACHI CDR-8335" , NULL },
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{ "HITACHI CDR-8435" , NULL },
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{ "Toshiba CD-ROM XM-6202B" , NULL },
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{ "TOSHIBA CD-ROM XM-1702BC", NULL },
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{ "CD-532E-A" , NULL },
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{ "E-IDE CD-ROM CR-840", NULL },
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{ "CD-ROM Drive/F5A", NULL },
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{ "WPI CDD-820", NULL },
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{ "SAMSUNG CD-ROM SC-148C", NULL },
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{ "SAMSUNG CD-ROM SC", NULL },
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{ "ATAPI CD-ROM DRIVE 40X MAXIMUM", NULL },
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{ "_NEC DV5800A", NULL },
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{ "SAMSUNG CD-ROM SN-124", "N001" },
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{ "Seagate STT20000A", NULL },
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{ "CD-ROM CDR_U200", "1.09" },
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{ NULL , NULL }
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};
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/**
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* ide_dma_intr - IDE DMA interrupt handler
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* @drive: the drive the interrupt is for
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*
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* Handle an interrupt completing a read/write DMA transfer on an
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* IDE device
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*/
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ide_startstop_t ide_dma_intr(ide_drive_t *drive)
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{
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ide_hwif_t *hwif = drive->hwif;
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struct ide_cmd *cmd = &hwif->cmd;
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u8 stat = 0, dma_stat = 0;
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drive->waiting_for_dma = 0;
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dma_stat = hwif->dma_ops->dma_end(drive);
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ide_dma_unmap_sg(drive, cmd);
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stat = hwif->tp_ops->read_status(hwif);
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if (OK_STAT(stat, DRIVE_READY, drive->bad_wstat | ATA_DRQ)) {
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if (!dma_stat) {
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if ((cmd->tf_flags & IDE_TFLAG_FS) == 0)
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ide_finish_cmd(drive, cmd, stat);
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else
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ide_complete_rq(drive, 0,
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blk_rq_sectors(cmd->rq) << 9);
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return ide_stopped;
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}
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printk(KERN_ERR "%s: %s: bad DMA status (0x%02x)\n",
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drive->name, __func__, dma_stat);
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}
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return ide_error(drive, "dma_intr", stat);
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}
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int ide_dma_good_drive(ide_drive_t *drive)
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{
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return ide_in_drive_list(drive->id, drive_whitelist);
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}
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/**
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* ide_dma_map_sg - map IDE scatter gather for DMA I/O
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* @drive: the drive to map the DMA table for
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* @cmd: command
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*
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* Perform the DMA mapping magic necessary to access the source or
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* target buffers of a request via DMA. The lower layers of the
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* kernel provide the necessary cache management so that we can
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* operate in a portable fashion.
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*/
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static int ide_dma_map_sg(ide_drive_t *drive, struct ide_cmd *cmd)
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{
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ide_hwif_t *hwif = drive->hwif;
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struct scatterlist *sg = hwif->sg_table;
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int i;
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if (cmd->tf_flags & IDE_TFLAG_WRITE)
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cmd->sg_dma_direction = DMA_TO_DEVICE;
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else
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cmd->sg_dma_direction = DMA_FROM_DEVICE;
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i = dma_map_sg(hwif->dev, sg, cmd->sg_nents, cmd->sg_dma_direction);
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if (i) {
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cmd->orig_sg_nents = cmd->sg_nents;
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cmd->sg_nents = i;
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}
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return i;
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}
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/**
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* ide_dma_unmap_sg - clean up DMA mapping
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* @drive: The drive to unmap
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*
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* Teardown mappings after DMA has completed. This must be called
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* after the completion of each use of ide_build_dmatable and before
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* the next use of ide_build_dmatable. Failure to do so will cause
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* an oops as only one mapping can be live for each target at a given
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* time.
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*/
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void ide_dma_unmap_sg(ide_drive_t *drive, struct ide_cmd *cmd)
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{
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ide_hwif_t *hwif = drive->hwif;
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dma_unmap_sg(hwif->dev, hwif->sg_table, cmd->orig_sg_nents,
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cmd->sg_dma_direction);
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}
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EXPORT_SYMBOL_GPL(ide_dma_unmap_sg);
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/**
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* ide_dma_off_quietly - Generic DMA kill
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* @drive: drive to control
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*
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* Turn off the current DMA on this IDE controller.
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*/
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void ide_dma_off_quietly(ide_drive_t *drive)
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{
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drive->dev_flags &= ~IDE_DFLAG_USING_DMA;
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ide_toggle_bounce(drive, 0);
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drive->hwif->dma_ops->dma_host_set(drive, 0);
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}
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EXPORT_SYMBOL(ide_dma_off_quietly);
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/**
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* ide_dma_off - disable DMA on a device
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* @drive: drive to disable DMA on
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*
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* Disable IDE DMA for a device on this IDE controller.
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* Inform the user that DMA has been disabled.
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*/
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void ide_dma_off(ide_drive_t *drive)
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{
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printk(KERN_INFO "%s: DMA disabled\n", drive->name);
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ide_dma_off_quietly(drive);
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}
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EXPORT_SYMBOL(ide_dma_off);
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/**
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* ide_dma_on - Enable DMA on a device
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* @drive: drive to enable DMA on
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*
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* Enable IDE DMA for a device on this IDE controller.
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*/
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void ide_dma_on(ide_drive_t *drive)
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{
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drive->dev_flags |= IDE_DFLAG_USING_DMA;
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ide_toggle_bounce(drive, 1);
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drive->hwif->dma_ops->dma_host_set(drive, 1);
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}
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int __ide_dma_bad_drive(ide_drive_t *drive)
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{
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u16 *id = drive->id;
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int blacklist = ide_in_drive_list(id, drive_blacklist);
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if (blacklist) {
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printk(KERN_WARNING "%s: Disabling (U)DMA for %s (blacklisted)\n",
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drive->name, (char *)&id[ATA_ID_PROD]);
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return blacklist;
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}
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return 0;
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}
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EXPORT_SYMBOL(__ide_dma_bad_drive);
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static const u8 xfer_mode_bases[] = {
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XFER_UDMA_0,
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XFER_MW_DMA_0,
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XFER_SW_DMA_0,
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};
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static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base, u8 req_mode)
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{
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u16 *id = drive->id;
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ide_hwif_t *hwif = drive->hwif;
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const struct ide_port_ops *port_ops = hwif->port_ops;
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unsigned int mask = 0;
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switch (base) {
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case XFER_UDMA_0:
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if ((id[ATA_ID_FIELD_VALID] & 4) == 0)
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break;
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mask = id[ATA_ID_UDMA_MODES];
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if (port_ops && port_ops->udma_filter)
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mask &= port_ops->udma_filter(drive);
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else
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mask &= hwif->ultra_mask;
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/*
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* avoid false cable warning from eighty_ninty_three()
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*/
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if (req_mode > XFER_UDMA_2) {
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if ((mask & 0x78) && (eighty_ninty_three(drive) == 0))
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mask &= 0x07;
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}
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break;
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case XFER_MW_DMA_0:
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mask = id[ATA_ID_MWDMA_MODES];
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/* Also look for the CF specific MWDMA modes... */
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if (ata_id_is_cfa(id) && (id[ATA_ID_CFA_MODES] & 0x38)) {
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u8 mode = ((id[ATA_ID_CFA_MODES] & 0x38) >> 3) - 1;
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mask |= ((2 << mode) - 1) << 3;
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}
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if (port_ops && port_ops->mdma_filter)
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mask &= port_ops->mdma_filter(drive);
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else
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mask &= hwif->mwdma_mask;
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break;
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case XFER_SW_DMA_0:
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mask = id[ATA_ID_SWDMA_MODES];
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if (!(mask & ATA_SWDMA2) && (id[ATA_ID_OLD_DMA_MODES] >> 8)) {
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u8 mode = id[ATA_ID_OLD_DMA_MODES] >> 8;
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/*
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* if the mode is valid convert it to the mask
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* (the maximum allowed mode is XFER_SW_DMA_2)
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*/
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if (mode <= 2)
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mask = (2 << mode) - 1;
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}
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mask &= hwif->swdma_mask;
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break;
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default:
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BUG();
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break;
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}
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return mask;
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}
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/**
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* ide_find_dma_mode - compute DMA speed
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* @drive: IDE device
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* @req_mode: requested mode
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*
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* Checks the drive/host capabilities and finds the speed to use for
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* the DMA transfer. The speed is then limited by the requested mode.
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*
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* Returns 0 if the drive/host combination is incapable of DMA transfers
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* or if the requested mode is not a DMA mode.
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*/
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u8 ide_find_dma_mode(ide_drive_t *drive, u8 req_mode)
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{
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ide_hwif_t *hwif = drive->hwif;
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unsigned int mask;
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int x, i;
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u8 mode = 0;
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if (drive->media != ide_disk) {
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if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)
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return 0;
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}
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for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) {
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if (req_mode < xfer_mode_bases[i])
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continue;
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mask = ide_get_mode_mask(drive, xfer_mode_bases[i], req_mode);
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x = fls(mask) - 1;
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if (x >= 0) {
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mode = xfer_mode_bases[i] + x;
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break;
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}
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}
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if (hwif->chipset == ide_acorn && mode == 0) {
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/*
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* is this correct?
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*/
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if (ide_dma_good_drive(drive) &&
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drive->id[ATA_ID_EIDE_DMA_TIME] < 150)
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mode = XFER_MW_DMA_1;
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}
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mode = min(mode, req_mode);
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printk(KERN_INFO "%s: %s mode selected\n", drive->name,
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mode ? ide_xfer_verbose(mode) : "no DMA");
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return mode;
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}
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static int ide_tune_dma(ide_drive_t *drive)
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{
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ide_hwif_t *hwif = drive->hwif;
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u8 speed;
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if (ata_id_has_dma(drive->id) == 0 ||
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(drive->dev_flags & IDE_DFLAG_NODMA))
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return 0;
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/* consult the list of known "bad" drives */
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if (__ide_dma_bad_drive(drive))
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return 0;
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if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
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return config_drive_for_dma(drive);
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speed = ide_max_dma_mode(drive);
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if (!speed)
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return 0;
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if (ide_set_dma_mode(drive, speed))
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return 0;
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return 1;
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}
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static int ide_dma_check(ide_drive_t *drive)
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{
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ide_hwif_t *hwif = drive->hwif;
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if (ide_tune_dma(drive))
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return 0;
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/* TODO: always do PIO fallback */
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if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
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return -1;
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ide_set_max_pio(drive);
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return -1;
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}
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int ide_set_dma(ide_drive_t *drive)
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{
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int rc;
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/*
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* Force DMAing for the beginning of the check.
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* Some chipsets appear to do interesting
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* things, if not checked and cleared.
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* PARANOIA!!!
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*/
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ide_dma_off_quietly(drive);
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rc = ide_dma_check(drive);
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if (rc)
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return rc;
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ide_dma_on(drive);
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return 0;
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}
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void ide_check_dma_crc(ide_drive_t *drive)
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{
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u8 mode;
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ide_dma_off_quietly(drive);
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drive->crc_count = 0;
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mode = drive->current_speed;
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/*
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* Don't try non Ultra-DMA modes without iCRC's. Force the
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* device to PIO and make the user enable SWDMA/MWDMA modes.
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*/
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if (mode > XFER_UDMA_0 && mode <= XFER_UDMA_7)
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mode--;
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else
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mode = XFER_PIO_4;
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ide_set_xfer_rate(drive, mode);
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if (drive->current_speed >= XFER_SW_DMA_0)
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ide_dma_on(drive);
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}
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void ide_dma_lost_irq(ide_drive_t *drive)
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{
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printk(KERN_ERR "%s: DMA interrupt recovery\n", drive->name);
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}
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EXPORT_SYMBOL_GPL(ide_dma_lost_irq);
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/*
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* un-busy the port etc, and clear any pending DMA status. we want to
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* retry the current request in pio mode instead of risking tossing it
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* all away
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*/
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ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error)
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{
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ide_hwif_t *hwif = drive->hwif;
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const struct ide_dma_ops *dma_ops = hwif->dma_ops;
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struct ide_cmd *cmd = &hwif->cmd;
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ide_startstop_t ret = ide_stopped;
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/*
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* end current dma transaction
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*/
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if (error < 0) {
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printk(KERN_WARNING "%s: DMA timeout error\n", drive->name);
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drive->waiting_for_dma = 0;
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(void)dma_ops->dma_end(drive);
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ide_dma_unmap_sg(drive, cmd);
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ret = ide_error(drive, "dma timeout error",
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hwif->tp_ops->read_status(hwif));
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} else {
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printk(KERN_WARNING "%s: DMA timeout retry\n", drive->name);
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if (dma_ops->dma_clear)
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dma_ops->dma_clear(drive);
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printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name);
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if (dma_ops->dma_test_irq(drive) == 0) {
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ide_dump_status(drive, "DMA timeout",
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hwif->tp_ops->read_status(hwif));
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drive->waiting_for_dma = 0;
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(void)dma_ops->dma_end(drive);
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ide_dma_unmap_sg(drive, cmd);
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}
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}
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/*
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* disable dma for now, but remember that we did so because of
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* a timeout -- we'll reenable after we finish this next request
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* (or rather the first chunk of it) in pio.
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*/
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drive->dev_flags |= IDE_DFLAG_DMA_PIO_RETRY;
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drive->retry_pio++;
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ide_dma_off_quietly(drive);
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/*
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* make sure request is sane
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*/
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if (hwif->rq)
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hwif->rq->errors = 0;
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return ret;
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}
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void ide_release_dma_engine(ide_hwif_t *hwif)
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{
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if (hwif->dmatable_cpu) {
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int prd_size = hwif->prd_max_nents * hwif->prd_ent_size;
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dma_free_coherent(hwif->dev, prd_size,
|
|
hwif->dmatable_cpu, hwif->dmatable_dma);
|
|
hwif->dmatable_cpu = NULL;
|
|
}
|
|
}
|
|
EXPORT_SYMBOL_GPL(ide_release_dma_engine);
|
|
|
|
int ide_allocate_dma_engine(ide_hwif_t *hwif)
|
|
{
|
|
int prd_size;
|
|
|
|
if (hwif->prd_max_nents == 0)
|
|
hwif->prd_max_nents = PRD_ENTRIES;
|
|
if (hwif->prd_ent_size == 0)
|
|
hwif->prd_ent_size = PRD_BYTES;
|
|
|
|
prd_size = hwif->prd_max_nents * hwif->prd_ent_size;
|
|
|
|
hwif->dmatable_cpu = dma_alloc_coherent(hwif->dev, prd_size,
|
|
&hwif->dmatable_dma,
|
|
GFP_ATOMIC);
|
|
if (hwif->dmatable_cpu == NULL) {
|
|
printk(KERN_ERR "%s: unable to allocate PRD table\n",
|
|
hwif->name);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(ide_allocate_dma_engine);
|
|
|
|
int ide_dma_prepare(ide_drive_t *drive, struct ide_cmd *cmd)
|
|
{
|
|
const struct ide_dma_ops *dma_ops = drive->hwif->dma_ops;
|
|
|
|
if ((drive->dev_flags & IDE_DFLAG_USING_DMA) == 0 ||
|
|
(dma_ops->dma_check && dma_ops->dma_check(drive, cmd)))
|
|
goto out;
|
|
ide_map_sg(drive, cmd);
|
|
if (ide_dma_map_sg(drive, cmd) == 0)
|
|
goto out_map;
|
|
if (dma_ops->dma_setup(drive, cmd))
|
|
goto out_dma_unmap;
|
|
drive->waiting_for_dma = 1;
|
|
return 0;
|
|
out_dma_unmap:
|
|
ide_dma_unmap_sg(drive, cmd);
|
|
out_map:
|
|
ide_map_sg(drive, cmd);
|
|
out:
|
|
return 1;
|
|
}
|