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![Bjorn Helgaas](/assets/img/avatar_default.png)
Some PCI host bridges apply an address offset, so bus addresses on PCI are different from CPU addresses. This patch adds a way for architectures to tell the PCI core about this offset. For example: LIST_HEAD(resources); pci_add_resource_offset(&resources, host->io_space, host->io_offset); pci_add_resource_offset(&resources, host->mem_space, host->mem_offset); pci_scan_root_bus(parent, bus, ops, sysdata, &resources); Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
331 lines
7.9 KiB
C
331 lines
7.9 KiB
C
/*
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* drivers/pci/bus.c
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*
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* From setup-res.c, by:
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* Dave Rusling (david.rusling@reo.mts.dec.com)
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* David Mosberger (davidm@cs.arizona.edu)
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* David Miller (davem@redhat.com)
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* Ivan Kokshaysky (ink@jurassic.park.msu.ru)
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/errno.h>
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#include <linux/ioport.h>
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#include <linux/proc_fs.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include "pci.h"
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void pci_add_resource_offset(struct list_head *resources, struct resource *res,
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resource_size_t offset)
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{
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struct pci_host_bridge_window *window;
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window = kzalloc(sizeof(struct pci_host_bridge_window), GFP_KERNEL);
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if (!window) {
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printk(KERN_ERR "PCI: can't add host bridge window %pR\n", res);
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return;
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}
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window->res = res;
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window->offset = offset;
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list_add_tail(&window->list, resources);
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}
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EXPORT_SYMBOL(pci_add_resource_offset);
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void pci_add_resource(struct list_head *resources, struct resource *res)
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{
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pci_add_resource_offset(resources, res, 0);
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}
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EXPORT_SYMBOL(pci_add_resource);
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void pci_free_resource_list(struct list_head *resources)
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{
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struct pci_host_bridge_window *window, *tmp;
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list_for_each_entry_safe(window, tmp, resources, list) {
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list_del(&window->list);
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kfree(window);
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}
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}
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EXPORT_SYMBOL(pci_free_resource_list);
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void pci_bus_add_resource(struct pci_bus *bus, struct resource *res,
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unsigned int flags)
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{
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struct pci_bus_resource *bus_res;
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bus_res = kzalloc(sizeof(struct pci_bus_resource), GFP_KERNEL);
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if (!bus_res) {
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dev_err(&bus->dev, "can't add %pR resource\n", res);
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return;
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}
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bus_res->res = res;
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bus_res->flags = flags;
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list_add_tail(&bus_res->list, &bus->resources);
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}
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struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n)
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{
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struct pci_bus_resource *bus_res;
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if (n < PCI_BRIDGE_RESOURCE_NUM)
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return bus->resource[n];
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n -= PCI_BRIDGE_RESOURCE_NUM;
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list_for_each_entry(bus_res, &bus->resources, list) {
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if (n-- == 0)
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return bus_res->res;
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}
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return NULL;
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}
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EXPORT_SYMBOL_GPL(pci_bus_resource_n);
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void pci_bus_remove_resources(struct pci_bus *bus)
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{
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int i;
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for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++)
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bus->resource[i] = NULL;
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pci_free_resource_list(&bus->resources);
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}
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/**
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* pci_bus_alloc_resource - allocate a resource from a parent bus
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* @bus: PCI bus
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* @res: resource to allocate
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* @size: size of resource to allocate
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* @align: alignment of resource to allocate
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* @min: minimum /proc/iomem address to allocate
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* @type_mask: IORESOURCE_* type flags
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* @alignf: resource alignment function
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* @alignf_data: data argument for resource alignment function
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*
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* Given the PCI bus a device resides on, the size, minimum address,
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* alignment and type, try to find an acceptable resource allocation
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* for a specific device resource.
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*/
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int
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pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
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resource_size_t size, resource_size_t align,
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resource_size_t min, unsigned int type_mask,
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resource_size_t (*alignf)(void *,
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const struct resource *,
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resource_size_t,
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resource_size_t),
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void *alignf_data)
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{
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int i, ret = -ENOMEM;
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struct resource *r;
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resource_size_t max = -1;
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type_mask |= IORESOURCE_IO | IORESOURCE_MEM;
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/* don't allocate too high if the pref mem doesn't support 64bit*/
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if (!(res->flags & IORESOURCE_MEM_64))
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max = PCIBIOS_MAX_MEM_32;
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pci_bus_for_each_resource(bus, r, i) {
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if (!r)
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continue;
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/* type_mask must match */
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if ((res->flags ^ r->flags) & type_mask)
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continue;
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/* We cannot allocate a non-prefetching resource
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from a pre-fetching area */
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if ((r->flags & IORESOURCE_PREFETCH) &&
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!(res->flags & IORESOURCE_PREFETCH))
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continue;
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/* Ok, try it out.. */
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ret = allocate_resource(r, res, size,
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r->start ? : min,
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max, align,
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alignf, alignf_data);
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if (ret == 0)
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break;
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}
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return ret;
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}
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/**
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* pci_bus_add_device - add a single device
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* @dev: device to add
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*
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* This adds a single pci device to the global
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* device list and adds sysfs and procfs entries
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*/
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int pci_bus_add_device(struct pci_dev *dev)
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{
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int retval;
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retval = device_add(&dev->dev);
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if (retval)
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return retval;
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dev->is_added = 1;
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pci_proc_attach_device(dev);
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pci_create_sysfs_dev_files(dev);
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return 0;
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}
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/**
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* pci_bus_add_child - add a child bus
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* @bus: bus to add
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*
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* This adds sysfs entries for a single bus
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*/
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int pci_bus_add_child(struct pci_bus *bus)
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{
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int retval;
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if (bus->bridge)
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bus->dev.parent = bus->bridge;
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retval = device_register(&bus->dev);
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if (retval)
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return retval;
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bus->is_added = 1;
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/* Create legacy_io and legacy_mem files for this bus */
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pci_create_legacy_files(bus);
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return retval;
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}
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/**
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* pci_bus_add_devices - insert newly discovered PCI devices
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* @bus: bus to check for new devices
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*
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* Add newly discovered PCI devices (which are on the bus->devices
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* list) to the global PCI device list, add the sysfs and procfs
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* entries. Where a bridge is found, add the discovered bus to
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* the parents list of child buses, and recurse (breadth-first
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* to be compatible with 2.4)
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*
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* Call hotplug for each new devices.
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*/
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void pci_bus_add_devices(const struct pci_bus *bus)
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{
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struct pci_dev *dev;
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struct pci_bus *child;
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int retval;
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list_for_each_entry(dev, &bus->devices, bus_list) {
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/* Skip already-added devices */
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if (dev->is_added)
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continue;
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retval = pci_bus_add_device(dev);
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if (retval)
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dev_err(&dev->dev, "Error adding device, continuing\n");
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}
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list_for_each_entry(dev, &bus->devices, bus_list) {
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BUG_ON(!dev->is_added);
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child = dev->subordinate;
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/*
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* If there is an unattached subordinate bus, attach
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* it and then scan for unattached PCI devices.
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*/
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if (!child)
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continue;
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if (list_empty(&child->node)) {
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down_write(&pci_bus_sem);
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list_add_tail(&child->node, &dev->bus->children);
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up_write(&pci_bus_sem);
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}
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pci_bus_add_devices(child);
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/*
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* register the bus with sysfs as the parent is now
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* properly registered.
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*/
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if (child->is_added)
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continue;
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retval = pci_bus_add_child(child);
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if (retval)
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dev_err(&dev->dev, "Error adding bus, continuing\n");
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}
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}
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void pci_enable_bridges(struct pci_bus *bus)
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{
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struct pci_dev *dev;
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int retval;
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list_for_each_entry(dev, &bus->devices, bus_list) {
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if (dev->subordinate) {
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if (!pci_is_enabled(dev)) {
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retval = pci_enable_device(dev);
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if (retval)
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dev_err(&dev->dev, "Error enabling bridge (%d), continuing\n", retval);
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pci_set_master(dev);
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}
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pci_enable_bridges(dev->subordinate);
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}
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}
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}
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/** pci_walk_bus - walk devices on/under bus, calling callback.
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* @top bus whose devices should be walked
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* @cb callback to be called for each device found
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* @userdata arbitrary pointer to be passed to callback.
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*
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* Walk the given bus, including any bridged devices
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* on buses under this bus. Call the provided callback
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* on each device found.
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*
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* We check the return of @cb each time. If it returns anything
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* other than 0, we break out.
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*
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*/
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void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
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void *userdata)
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{
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struct pci_dev *dev;
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struct pci_bus *bus;
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struct list_head *next;
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int retval;
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bus = top;
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down_read(&pci_bus_sem);
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next = top->devices.next;
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for (;;) {
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if (next == &bus->devices) {
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/* end of this bus, go up or finish */
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if (bus == top)
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break;
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next = bus->self->bus_list.next;
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bus = bus->self->bus;
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continue;
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}
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dev = list_entry(next, struct pci_dev, bus_list);
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if (dev->subordinate) {
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/* this is a pci-pci bridge, do its devices next */
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next = dev->subordinate->devices.next;
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bus = dev->subordinate;
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} else
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next = dev->bus_list.next;
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/* Run device routines with the device locked */
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device_lock(&dev->dev);
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retval = cb(dev, userdata);
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device_unlock(&dev->dev);
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if (retval)
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break;
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}
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up_read(&pci_bus_sem);
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}
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EXPORT_SYMBOL_GPL(pci_walk_bus);
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EXPORT_SYMBOL(pci_bus_alloc_resource);
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EXPORT_SYMBOL_GPL(pci_bus_add_device);
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EXPORT_SYMBOL(pci_bus_add_devices);
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EXPORT_SYMBOL(pci_enable_bridges);
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