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-----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIVAwUAT3NKzROxKuMESys7AQKElw/+JyDxJSlj+g+nymkx8IVVuU8CsEwNLgRk 8KEnRfLhGtkXFLSJYWO6jzGo16F8Uqli1PdMFte/wagSv0285/HZaKlkkBVHdJ/m u40oSjgT013bBh6MQ0Oaf8pFezFUiQB5zPOA9QGaLVGDLXCmgqUgd7exaD5wRIwB ZmyItjZeAVnDfk1R+ZiNYytHAi8A5wSB+eFDCIQYgyulA1Igd1UnRtx+dRKbvc/m rWQ6KWbZHIdvP1ksd8wHHkrlUD2pEeJ8glJLsZUhMm/5oMf/8RmOCvmo8rvE/qwl eDQ1h4cGYlfjobxXZMHqAN9m7Jg2bI946HZjdb7/7oCeO6VW3FwPZ/Ic75p+wp45 HXJTItufERYk6QxShiOKvA+QexnYwY0IT5oRP4DrhdVB/X9cl2MoaZHC+RbYLQy+ /5VNZKi38iK4F9AbFamS7kd0i5QszA/ZzEzKZ6VMuOp3W/fagpn4ZJT1LIA3m4A9 Q0cj24mqeyCfjysu0TMbPtaN+Yjeu1o1OFRvM8XffbZsp5bNzuTDEvviJ2NXw4vK 4qUHulhYSEWcu9YgAZXvEWDEM78FXCkg2v/CrZXH5tyc95kUkMPcgG+QZBB5wElR FaOKpiC/BuNIGEf02IZQ4nfDxE90QwnDeoYeV+FvNj9UEOopJ5z5bMPoTHxm4cCD NypQthI85pc= =G9mT -----END PGP SIGNATURE----- Merge tag 'split-asm_system_h-for-linus-20120328' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-asm_system Pull "Disintegrate and delete asm/system.h" from David Howells: "Here are a bunch of patches to disintegrate asm/system.h into a set of separate bits to relieve the problem of circular inclusion dependencies. I've built all the working defconfigs from all the arches that I can and made sure that they don't break. The reason for these patches is that I recently encountered a circular dependency problem that came about when I produced some patches to optimise get_order() by rewriting it to use ilog2(). This uses bitops - and on the SH arch asm/bitops.h drags in asm-generic/get_order.h by a circuituous route involving asm/system.h. The main difficulty seems to be asm/system.h. It holds a number of low level bits with no/few dependencies that are commonly used (eg. memory barriers) and a number of bits with more dependencies that aren't used in many places (eg. switch_to()). These patches break asm/system.h up into the following core pieces: (1) asm/barrier.h Move memory barriers here. This already done for MIPS and Alpha. (2) asm/switch_to.h Move switch_to() and related stuff here. (3) asm/exec.h Move arch_align_stack() here. Other process execution related bits could perhaps go here from asm/processor.h. (4) asm/cmpxchg.h Move xchg() and cmpxchg() here as they're full word atomic ops and frequently used by atomic_xchg() and atomic_cmpxchg(). (5) asm/bug.h Move die() and related bits. (6) asm/auxvec.h Move AT_VECTOR_SIZE_ARCH here. Other arch headers are created as needed on a per-arch basis." Fixed up some conflicts from other header file cleanups and moving code around that has happened in the meantime, so David's testing is somewhat weakened by that. We'll find out anything that got broken and fix it.. * tag 'split-asm_system_h-for-linus-20120328' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-asm_system: (38 commits) Delete all instances of asm/system.h Remove all #inclusions of asm/system.h Add #includes needed to permit the removal of asm/system.h Move all declarations of free_initmem() to linux/mm.h Disintegrate asm/system.h for OpenRISC Split arch_align_stack() out from asm-generic/system.h Split the switch_to() wrapper out of asm-generic/system.h Move the asm-generic/system.h xchg() implementation to asm-generic/cmpxchg.h Create asm-generic/barrier.h Make asm-generic/cmpxchg.h #include asm-generic/cmpxchg-local.h Disintegrate asm/system.h for Xtensa Disintegrate asm/system.h for Unicore32 [based on ver #3, changed by gxt] Disintegrate asm/system.h for Tile Disintegrate asm/system.h for Sparc Disintegrate asm/system.h for SH Disintegrate asm/system.h for Score Disintegrate asm/system.h for S390 Disintegrate asm/system.h for PowerPC Disintegrate asm/system.h for PA-RISC Disintegrate asm/system.h for MN10300 ...
772 lines
18 KiB
C
772 lines
18 KiB
C
/*
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* Watchdog Timer Driver
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* for ITE IT87xx Environment Control - Low Pin Count Input / Output
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*
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* (c) Copyright 2007 Oliver Schuster <olivers137@aol.com>
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*
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* Based on softdog.c by Alan Cox,
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* 83977f_wdt.c by Jose Goncalves,
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* it87.c by Chris Gauthron, Jean Delvare
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*
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* Data-sheets: Publicly available at the ITE website
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* http://www.ite.com.tw/
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*
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* Support of the watchdog timers, which are available on
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* IT8702, IT8712, IT8716, IT8718, IT8720, IT8721 and IT8726.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/fs.h>
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#include <linux/miscdevice.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/watchdog.h>
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#include <linux/notifier.h>
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#include <linux/reboot.h>
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#include <linux/uaccess.h>
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#include <linux/io.h>
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#define WATCHDOG_VERSION "1.14"
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#define WATCHDOG_NAME "IT87 WDT"
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#define DRIVER_VERSION WATCHDOG_NAME " driver, v" WATCHDOG_VERSION "\n"
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#define WD_MAGIC 'V'
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/* Defaults for Module Parameter */
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#define DEFAULT_NOGAMEPORT 0
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#define DEFAULT_EXCLUSIVE 1
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#define DEFAULT_TIMEOUT 60
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#define DEFAULT_TESTMODE 0
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#define DEFAULT_NOWAYOUT WATCHDOG_NOWAYOUT
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/* IO Ports */
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#define REG 0x2e
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#define VAL 0x2f
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/* Logical device Numbers LDN */
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#define GPIO 0x07
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#define GAMEPORT 0x09
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#define CIR 0x0a
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/* Configuration Registers and Functions */
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#define LDNREG 0x07
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#define CHIPID 0x20
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#define CHIPREV 0x22
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#define ACTREG 0x30
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#define BASEREG 0x60
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/* Chip Id numbers */
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#define NO_DEV_ID 0xffff
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#define IT8702_ID 0x8702
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#define IT8705_ID 0x8705
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#define IT8712_ID 0x8712
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#define IT8716_ID 0x8716
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#define IT8718_ID 0x8718
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#define IT8720_ID 0x8720
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#define IT8721_ID 0x8721
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#define IT8726_ID 0x8726 /* the data sheet suggest wrongly 0x8716 */
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/* GPIO Configuration Registers LDN=0x07 */
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#define WDTCTRL 0x71
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#define WDTCFG 0x72
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#define WDTVALLSB 0x73
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#define WDTVALMSB 0x74
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/* GPIO Bits WDTCTRL */
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#define WDT_CIRINT 0x80
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#define WDT_MOUSEINT 0x40
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#define WDT_KYBINT 0x20
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#define WDT_GAMEPORT 0x10 /* not in it8718, it8720, it8721 */
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#define WDT_FORCE 0x02
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#define WDT_ZERO 0x01
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/* GPIO Bits WDTCFG */
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#define WDT_TOV1 0x80
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#define WDT_KRST 0x40
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#define WDT_TOVE 0x20
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#define WDT_PWROK 0x10 /* not in it8721 */
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#define WDT_INT_MASK 0x0f
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/* CIR Configuration Register LDN=0x0a */
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#define CIR_ILS 0x70
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/* The default Base address is not always available, we use this */
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#define CIR_BASE 0x0208
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/* CIR Controller */
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#define CIR_DR(b) (b)
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#define CIR_IER(b) (b + 1)
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#define CIR_RCR(b) (b + 2)
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#define CIR_TCR1(b) (b + 3)
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#define CIR_TCR2(b) (b + 4)
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#define CIR_TSR(b) (b + 5)
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#define CIR_RSR(b) (b + 6)
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#define CIR_BDLR(b) (b + 5)
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#define CIR_BDHR(b) (b + 6)
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#define CIR_IIR(b) (b + 7)
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/* Default Base address of Game port */
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#define GP_BASE_DEFAULT 0x0201
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/* wdt_status */
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#define WDTS_TIMER_RUN 0
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#define WDTS_DEV_OPEN 1
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#define WDTS_KEEPALIVE 2
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#define WDTS_LOCKED 3
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#define WDTS_USE_GP 4
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#define WDTS_EXPECTED 5
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static unsigned int base, gpact, ciract, max_units, chip_type;
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static unsigned long wdt_status;
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static int nogameport = DEFAULT_NOGAMEPORT;
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static int exclusive = DEFAULT_EXCLUSIVE;
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static int timeout = DEFAULT_TIMEOUT;
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static int testmode = DEFAULT_TESTMODE;
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static bool nowayout = DEFAULT_NOWAYOUT;
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module_param(nogameport, int, 0);
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MODULE_PARM_DESC(nogameport, "Forbid the activation of game port, default="
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__MODULE_STRING(DEFAULT_NOGAMEPORT));
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module_param(exclusive, int, 0);
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MODULE_PARM_DESC(exclusive, "Watchdog exclusive device open, default="
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__MODULE_STRING(DEFAULT_EXCLUSIVE));
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module_param(timeout, int, 0);
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MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds, default="
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__MODULE_STRING(DEFAULT_TIMEOUT));
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module_param(testmode, int, 0);
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MODULE_PARM_DESC(testmode, "Watchdog test mode (1 = no reboot), default="
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__MODULE_STRING(DEFAULT_TESTMODE));
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started, default="
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__MODULE_STRING(WATCHDOG_NOWAYOUT));
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/* Superio Chip */
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static inline int superio_enter(void)
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{
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/*
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* Try to reserve REG and REG + 1 for exclusive access.
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*/
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if (!request_muxed_region(REG, 2, WATCHDOG_NAME))
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return -EBUSY;
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outb(0x87, REG);
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outb(0x01, REG);
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outb(0x55, REG);
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outb(0x55, REG);
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return 0;
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}
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static inline void superio_exit(void)
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{
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outb(0x02, REG);
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outb(0x02, VAL);
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release_region(REG, 2);
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}
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static inline void superio_select(int ldn)
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{
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outb(LDNREG, REG);
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outb(ldn, VAL);
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}
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static inline int superio_inb(int reg)
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{
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outb(reg, REG);
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return inb(VAL);
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}
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static inline void superio_outb(int val, int reg)
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{
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outb(reg, REG);
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outb(val, VAL);
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}
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static inline int superio_inw(int reg)
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{
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int val;
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outb(reg++, REG);
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val = inb(VAL) << 8;
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outb(reg, REG);
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val |= inb(VAL);
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return val;
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}
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static inline void superio_outw(int val, int reg)
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{
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outb(reg++, REG);
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outb(val >> 8, VAL);
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outb(reg, REG);
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outb(val, VAL);
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}
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/* Internal function, should be called after superio_select(GPIO) */
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static void wdt_update_timeout(void)
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{
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unsigned char cfg = WDT_KRST;
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int tm = timeout;
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if (testmode)
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cfg = 0;
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if (tm <= max_units)
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cfg |= WDT_TOV1;
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else
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tm /= 60;
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if (chip_type != IT8721_ID)
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cfg |= WDT_PWROK;
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superio_outb(cfg, WDTCFG);
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superio_outb(tm, WDTVALLSB);
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if (max_units > 255)
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superio_outb(tm>>8, WDTVALMSB);
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}
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static int wdt_round_time(int t)
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{
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t += 59;
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t -= t % 60;
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return t;
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}
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/* watchdog timer handling */
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static void wdt_keepalive(void)
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{
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if (test_bit(WDTS_USE_GP, &wdt_status))
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inb(base);
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else
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/* The timer reloads with around 5 msec delay */
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outb(0x55, CIR_DR(base));
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set_bit(WDTS_KEEPALIVE, &wdt_status);
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}
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static int wdt_start(void)
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{
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int ret = superio_enter();
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if (ret)
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return ret;
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superio_select(GPIO);
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if (test_bit(WDTS_USE_GP, &wdt_status))
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superio_outb(WDT_GAMEPORT, WDTCTRL);
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else
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superio_outb(WDT_CIRINT, WDTCTRL);
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wdt_update_timeout();
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superio_exit();
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return 0;
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}
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static int wdt_stop(void)
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{
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int ret = superio_enter();
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if (ret)
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return ret;
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superio_select(GPIO);
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superio_outb(0x00, WDTCTRL);
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superio_outb(WDT_TOV1, WDTCFG);
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superio_outb(0x00, WDTVALLSB);
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if (max_units > 255)
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superio_outb(0x00, WDTVALMSB);
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superio_exit();
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return 0;
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}
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/**
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* wdt_set_timeout - set a new timeout value with watchdog ioctl
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* @t: timeout value in seconds
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*
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* The hardware device has a 8 or 16 bit watchdog timer (depends on
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* chip version) that can be configured to count seconds or minutes.
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*
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* Used within WDIOC_SETTIMEOUT watchdog device ioctl.
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*/
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static int wdt_set_timeout(int t)
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{
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if (t < 1 || t > max_units * 60)
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return -EINVAL;
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if (t > max_units)
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timeout = wdt_round_time(t);
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else
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timeout = t;
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if (test_bit(WDTS_TIMER_RUN, &wdt_status)) {
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int ret = superio_enter();
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if (ret)
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return ret;
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superio_select(GPIO);
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wdt_update_timeout();
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superio_exit();
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}
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return 0;
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}
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/**
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* wdt_get_status - determines the status supported by watchdog ioctl
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* @status: status returned to user space
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*
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* The status bit of the device does not allow to distinguish
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* between a regular system reset and a watchdog forced reset.
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* But, in test mode it is useful, so it is supported through
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* WDIOC_GETSTATUS watchdog ioctl. Additionally the driver
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* reports the keepalive signal and the acception of the magic.
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*
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* Used within WDIOC_GETSTATUS watchdog device ioctl.
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*/
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static int wdt_get_status(int *status)
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{
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*status = 0;
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if (testmode) {
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int ret = superio_enter();
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if (ret)
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return ret;
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superio_select(GPIO);
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if (superio_inb(WDTCTRL) & WDT_ZERO) {
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superio_outb(0x00, WDTCTRL);
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clear_bit(WDTS_TIMER_RUN, &wdt_status);
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*status |= WDIOF_CARDRESET;
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}
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superio_exit();
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}
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if (test_and_clear_bit(WDTS_KEEPALIVE, &wdt_status))
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*status |= WDIOF_KEEPALIVEPING;
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if (test_bit(WDTS_EXPECTED, &wdt_status))
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*status |= WDIOF_MAGICCLOSE;
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return 0;
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}
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/* /dev/watchdog handling */
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/**
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* wdt_open - watchdog file_operations .open
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* @inode: inode of the device
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* @file: file handle to the device
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*
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* The watchdog timer starts by opening the device.
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*
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* Used within the file operation of the watchdog device.
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*/
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static int wdt_open(struct inode *inode, struct file *file)
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{
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if (exclusive && test_and_set_bit(WDTS_DEV_OPEN, &wdt_status))
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return -EBUSY;
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if (!test_and_set_bit(WDTS_TIMER_RUN, &wdt_status)) {
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int ret;
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if (nowayout && !test_and_set_bit(WDTS_LOCKED, &wdt_status))
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__module_get(THIS_MODULE);
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ret = wdt_start();
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if (ret) {
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clear_bit(WDTS_LOCKED, &wdt_status);
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clear_bit(WDTS_TIMER_RUN, &wdt_status);
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clear_bit(WDTS_DEV_OPEN, &wdt_status);
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return ret;
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}
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}
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return nonseekable_open(inode, file);
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}
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/**
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* wdt_release - watchdog file_operations .release
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* @inode: inode of the device
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* @file: file handle to the device
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*
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* Closing the watchdog device either stops the watchdog timer
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* or in the case, that nowayout is set or the magic character
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* wasn't written, a critical warning about an running watchdog
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* timer is given.
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*
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* Used within the file operation of the watchdog device.
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*/
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static int wdt_release(struct inode *inode, struct file *file)
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{
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if (test_bit(WDTS_TIMER_RUN, &wdt_status)) {
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if (test_and_clear_bit(WDTS_EXPECTED, &wdt_status)) {
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int ret = wdt_stop();
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if (ret) {
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/*
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* Stop failed. Just keep the watchdog alive
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* and hope nothing bad happens.
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*/
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set_bit(WDTS_EXPECTED, &wdt_status);
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wdt_keepalive();
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return ret;
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}
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clear_bit(WDTS_TIMER_RUN, &wdt_status);
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} else {
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wdt_keepalive();
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pr_crit("unexpected close, not stopping watchdog!\n");
|
|
}
|
|
}
|
|
clear_bit(WDTS_DEV_OPEN, &wdt_status);
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* wdt_write - watchdog file_operations .write
|
|
* @file: file handle to the watchdog
|
|
* @buf: buffer to write
|
|
* @count: count of bytes
|
|
* @ppos: pointer to the position to write. No seeks allowed
|
|
*
|
|
* A write to a watchdog device is defined as a keepalive signal. Any
|
|
* write of data will do, as we don't define content meaning.
|
|
*
|
|
* Used within the file operation of the watchdog device.
|
|
*/
|
|
|
|
static ssize_t wdt_write(struct file *file, const char __user *buf,
|
|
size_t count, loff_t *ppos)
|
|
{
|
|
if (count) {
|
|
clear_bit(WDTS_EXPECTED, &wdt_status);
|
|
wdt_keepalive();
|
|
}
|
|
if (!nowayout) {
|
|
size_t ofs;
|
|
|
|
/* note: just in case someone wrote the magic character long ago */
|
|
for (ofs = 0; ofs != count; ofs++) {
|
|
char c;
|
|
if (get_user(c, buf + ofs))
|
|
return -EFAULT;
|
|
if (c == WD_MAGIC)
|
|
set_bit(WDTS_EXPECTED, &wdt_status);
|
|
}
|
|
}
|
|
return count;
|
|
}
|
|
|
|
static const struct watchdog_info ident = {
|
|
.options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
|
|
.firmware_version = 1,
|
|
.identity = WATCHDOG_NAME,
|
|
};
|
|
|
|
/**
|
|
* wdt_ioctl - watchdog file_operations .unlocked_ioctl
|
|
* @file: file handle to the device
|
|
* @cmd: watchdog command
|
|
* @arg: argument pointer
|
|
*
|
|
* The watchdog API defines a common set of functions for all watchdogs
|
|
* according to their available features.
|
|
*
|
|
* Used within the file operation of the watchdog device.
|
|
*/
|
|
|
|
static long wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
|
|
{
|
|
int rc = 0, status, new_options, new_timeout;
|
|
union {
|
|
struct watchdog_info __user *ident;
|
|
int __user *i;
|
|
} uarg;
|
|
|
|
uarg.i = (int __user *)arg;
|
|
|
|
switch (cmd) {
|
|
case WDIOC_GETSUPPORT:
|
|
return copy_to_user(uarg.ident,
|
|
&ident, sizeof(ident)) ? -EFAULT : 0;
|
|
|
|
case WDIOC_GETSTATUS:
|
|
rc = wdt_get_status(&status);
|
|
if (rc)
|
|
return rc;
|
|
return put_user(status, uarg.i);
|
|
|
|
case WDIOC_GETBOOTSTATUS:
|
|
return put_user(0, uarg.i);
|
|
|
|
case WDIOC_KEEPALIVE:
|
|
wdt_keepalive();
|
|
return 0;
|
|
|
|
case WDIOC_SETOPTIONS:
|
|
if (get_user(new_options, uarg.i))
|
|
return -EFAULT;
|
|
|
|
switch (new_options) {
|
|
case WDIOS_DISABLECARD:
|
|
if (test_bit(WDTS_TIMER_RUN, &wdt_status)) {
|
|
rc = wdt_stop();
|
|
if (rc)
|
|
return rc;
|
|
}
|
|
clear_bit(WDTS_TIMER_RUN, &wdt_status);
|
|
return 0;
|
|
|
|
case WDIOS_ENABLECARD:
|
|
if (!test_and_set_bit(WDTS_TIMER_RUN, &wdt_status)) {
|
|
rc = wdt_start();
|
|
if (rc) {
|
|
clear_bit(WDTS_TIMER_RUN, &wdt_status);
|
|
return rc;
|
|
}
|
|
}
|
|
return 0;
|
|
|
|
default:
|
|
return -EFAULT;
|
|
}
|
|
|
|
case WDIOC_SETTIMEOUT:
|
|
if (get_user(new_timeout, uarg.i))
|
|
return -EFAULT;
|
|
rc = wdt_set_timeout(new_timeout);
|
|
case WDIOC_GETTIMEOUT:
|
|
if (put_user(timeout, uarg.i))
|
|
return -EFAULT;
|
|
return rc;
|
|
|
|
default:
|
|
return -ENOTTY;
|
|
}
|
|
}
|
|
|
|
static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
|
|
void *unused)
|
|
{
|
|
if (code == SYS_DOWN || code == SYS_HALT)
|
|
wdt_stop();
|
|
return NOTIFY_DONE;
|
|
}
|
|
|
|
static const struct file_operations wdt_fops = {
|
|
.owner = THIS_MODULE,
|
|
.llseek = no_llseek,
|
|
.write = wdt_write,
|
|
.unlocked_ioctl = wdt_ioctl,
|
|
.open = wdt_open,
|
|
.release = wdt_release,
|
|
};
|
|
|
|
static struct miscdevice wdt_miscdev = {
|
|
.minor = WATCHDOG_MINOR,
|
|
.name = "watchdog",
|
|
.fops = &wdt_fops,
|
|
};
|
|
|
|
static struct notifier_block wdt_notifier = {
|
|
.notifier_call = wdt_notify_sys,
|
|
};
|
|
|
|
static int __init it87_wdt_init(void)
|
|
{
|
|
int rc = 0;
|
|
int try_gameport = !nogameport;
|
|
u8 chip_rev;
|
|
int gp_rreq_fail = 0;
|
|
|
|
wdt_status = 0;
|
|
|
|
rc = superio_enter();
|
|
if (rc)
|
|
return rc;
|
|
|
|
chip_type = superio_inw(CHIPID);
|
|
chip_rev = superio_inb(CHIPREV) & 0x0f;
|
|
superio_exit();
|
|
|
|
switch (chip_type) {
|
|
case IT8702_ID:
|
|
max_units = 255;
|
|
break;
|
|
case IT8712_ID:
|
|
max_units = (chip_rev < 8) ? 255 : 65535;
|
|
break;
|
|
case IT8716_ID:
|
|
case IT8726_ID:
|
|
max_units = 65535;
|
|
break;
|
|
case IT8718_ID:
|
|
case IT8720_ID:
|
|
case IT8721_ID:
|
|
max_units = 65535;
|
|
try_gameport = 0;
|
|
break;
|
|
case IT8705_ID:
|
|
pr_err("Unsupported Chip found, Chip %04x Revision %02x\n",
|
|
chip_type, chip_rev);
|
|
return -ENODEV;
|
|
case NO_DEV_ID:
|
|
pr_err("no device\n");
|
|
return -ENODEV;
|
|
default:
|
|
pr_err("Unknown Chip found, Chip %04x Revision %04x\n",
|
|
chip_type, chip_rev);
|
|
return -ENODEV;
|
|
}
|
|
|
|
rc = superio_enter();
|
|
if (rc)
|
|
return rc;
|
|
|
|
superio_select(GPIO);
|
|
superio_outb(WDT_TOV1, WDTCFG);
|
|
superio_outb(0x00, WDTCTRL);
|
|
|
|
/* First try to get Gameport support */
|
|
if (try_gameport) {
|
|
superio_select(GAMEPORT);
|
|
base = superio_inw(BASEREG);
|
|
if (!base) {
|
|
base = GP_BASE_DEFAULT;
|
|
superio_outw(base, BASEREG);
|
|
}
|
|
gpact = superio_inb(ACTREG);
|
|
superio_outb(0x01, ACTREG);
|
|
if (request_region(base, 1, WATCHDOG_NAME))
|
|
set_bit(WDTS_USE_GP, &wdt_status);
|
|
else
|
|
gp_rreq_fail = 1;
|
|
}
|
|
|
|
/* If we haven't Gameport support, try to get CIR support */
|
|
if (!test_bit(WDTS_USE_GP, &wdt_status)) {
|
|
if (!request_region(CIR_BASE, 8, WATCHDOG_NAME)) {
|
|
if (gp_rreq_fail)
|
|
pr_err("I/O Address 0x%04x and 0x%04x already in use\n",
|
|
base, CIR_BASE);
|
|
else
|
|
pr_err("I/O Address 0x%04x already in use\n",
|
|
CIR_BASE);
|
|
rc = -EIO;
|
|
goto err_out;
|
|
}
|
|
base = CIR_BASE;
|
|
|
|
superio_select(CIR);
|
|
superio_outw(base, BASEREG);
|
|
superio_outb(0x00, CIR_ILS);
|
|
ciract = superio_inb(ACTREG);
|
|
superio_outb(0x01, ACTREG);
|
|
if (gp_rreq_fail) {
|
|
superio_select(GAMEPORT);
|
|
superio_outb(gpact, ACTREG);
|
|
}
|
|
}
|
|
|
|
if (timeout < 1 || timeout > max_units * 60) {
|
|
timeout = DEFAULT_TIMEOUT;
|
|
pr_warn("Timeout value out of range, use default %d sec\n",
|
|
DEFAULT_TIMEOUT);
|
|
}
|
|
|
|
if (timeout > max_units)
|
|
timeout = wdt_round_time(timeout);
|
|
|
|
rc = register_reboot_notifier(&wdt_notifier);
|
|
if (rc) {
|
|
pr_err("Cannot register reboot notifier (err=%d)\n", rc);
|
|
goto err_out_region;
|
|
}
|
|
|
|
rc = misc_register(&wdt_miscdev);
|
|
if (rc) {
|
|
pr_err("Cannot register miscdev on minor=%d (err=%d)\n",
|
|
wdt_miscdev.minor, rc);
|
|
goto err_out_reboot;
|
|
}
|
|
|
|
/* Initialize CIR to use it as keepalive source */
|
|
if (!test_bit(WDTS_USE_GP, &wdt_status)) {
|
|
outb(0x00, CIR_RCR(base));
|
|
outb(0xc0, CIR_TCR1(base));
|
|
outb(0x5c, CIR_TCR2(base));
|
|
outb(0x10, CIR_IER(base));
|
|
outb(0x00, CIR_BDHR(base));
|
|
outb(0x01, CIR_BDLR(base));
|
|
outb(0x09, CIR_IER(base));
|
|
}
|
|
|
|
pr_info("Chip IT%04x revision %d initialized. timeout=%d sec (nowayout=%d testmode=%d exclusive=%d nogameport=%d)\n",
|
|
chip_type, chip_rev, timeout,
|
|
nowayout, testmode, exclusive, nogameport);
|
|
|
|
superio_exit();
|
|
return 0;
|
|
|
|
err_out_reboot:
|
|
unregister_reboot_notifier(&wdt_notifier);
|
|
err_out_region:
|
|
release_region(base, test_bit(WDTS_USE_GP, &wdt_status) ? 1 : 8);
|
|
if (!test_bit(WDTS_USE_GP, &wdt_status)) {
|
|
superio_select(CIR);
|
|
superio_outb(ciract, ACTREG);
|
|
}
|
|
err_out:
|
|
if (try_gameport) {
|
|
superio_select(GAMEPORT);
|
|
superio_outb(gpact, ACTREG);
|
|
}
|
|
|
|
superio_exit();
|
|
return rc;
|
|
}
|
|
|
|
static void __exit it87_wdt_exit(void)
|
|
{
|
|
if (superio_enter() == 0) {
|
|
superio_select(GPIO);
|
|
superio_outb(0x00, WDTCTRL);
|
|
superio_outb(0x00, WDTCFG);
|
|
superio_outb(0x00, WDTVALLSB);
|
|
if (max_units > 255)
|
|
superio_outb(0x00, WDTVALMSB);
|
|
if (test_bit(WDTS_USE_GP, &wdt_status)) {
|
|
superio_select(GAMEPORT);
|
|
superio_outb(gpact, ACTREG);
|
|
} else {
|
|
superio_select(CIR);
|
|
superio_outb(ciract, ACTREG);
|
|
}
|
|
superio_exit();
|
|
}
|
|
|
|
misc_deregister(&wdt_miscdev);
|
|
unregister_reboot_notifier(&wdt_notifier);
|
|
release_region(base, test_bit(WDTS_USE_GP, &wdt_status) ? 1 : 8);
|
|
}
|
|
|
|
module_init(it87_wdt_init);
|
|
module_exit(it87_wdt_exit);
|
|
|
|
MODULE_AUTHOR("Oliver Schuster");
|
|
MODULE_DESCRIPTION("Hardware Watchdog Device Driver for IT87xx EC-LPC I/O");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
|