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![Yong Wu](/assets/img/avatar_default.png)
Use the common compare helpers from component. Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Russell King <linux+etnaviv@armlinux.org.uk> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: etnaviv@lists.freedesktop.org Signed-off-by: Yong Wu <yong.wu@mediatek.com> Link: https://lore.kernel.org/r/20220214060819.7334-5-yong.wu@mediatek.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
716 lines
17 KiB
C
716 lines
17 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2015-2018 Etnaviv Project
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*/
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#include <linux/component.h>
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#include <linux/dma-mapping.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/uaccess.h>
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#include <drm/drm_debugfs.h>
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#include <drm/drm_drv.h>
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#include <drm/drm_file.h>
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#include <drm/drm_ioctl.h>
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#include <drm/drm_of.h>
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#include <drm/drm_prime.h>
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#include "etnaviv_cmdbuf.h"
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#include "etnaviv_drv.h"
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#include "etnaviv_gpu.h"
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#include "etnaviv_gem.h"
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#include "etnaviv_mmu.h"
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#include "etnaviv_perfmon.h"
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/*
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* DRM operations:
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*/
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static void load_gpu(struct drm_device *dev)
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{
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struct etnaviv_drm_private *priv = dev->dev_private;
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unsigned int i;
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for (i = 0; i < ETNA_MAX_PIPES; i++) {
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struct etnaviv_gpu *g = priv->gpu[i];
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if (g) {
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int ret;
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ret = etnaviv_gpu_init(g);
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if (ret)
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priv->gpu[i] = NULL;
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}
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}
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}
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static int etnaviv_open(struct drm_device *dev, struct drm_file *file)
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{
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struct etnaviv_drm_private *priv = dev->dev_private;
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struct etnaviv_file_private *ctx;
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int ret, i;
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ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
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if (!ctx)
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return -ENOMEM;
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ctx->mmu = etnaviv_iommu_context_init(priv->mmu_global,
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priv->cmdbuf_suballoc);
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if (!ctx->mmu) {
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ret = -ENOMEM;
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goto out_free;
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}
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for (i = 0; i < ETNA_MAX_PIPES; i++) {
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struct etnaviv_gpu *gpu = priv->gpu[i];
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struct drm_gpu_scheduler *sched;
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if (gpu) {
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sched = &gpu->sched;
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drm_sched_entity_init(&ctx->sched_entity[i],
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DRM_SCHED_PRIORITY_NORMAL, &sched,
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1, NULL);
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}
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}
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file->driver_priv = ctx;
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return 0;
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out_free:
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kfree(ctx);
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return ret;
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}
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static void etnaviv_postclose(struct drm_device *dev, struct drm_file *file)
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{
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struct etnaviv_drm_private *priv = dev->dev_private;
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struct etnaviv_file_private *ctx = file->driver_priv;
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unsigned int i;
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for (i = 0; i < ETNA_MAX_PIPES; i++) {
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struct etnaviv_gpu *gpu = priv->gpu[i];
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if (gpu)
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drm_sched_entity_destroy(&ctx->sched_entity[i]);
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}
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etnaviv_iommu_context_put(ctx->mmu);
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kfree(ctx);
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}
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/*
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* DRM debugfs:
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*/
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#ifdef CONFIG_DEBUG_FS
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static int etnaviv_gem_show(struct drm_device *dev, struct seq_file *m)
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{
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struct etnaviv_drm_private *priv = dev->dev_private;
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etnaviv_gem_describe_objects(priv, m);
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return 0;
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}
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static int etnaviv_mm_show(struct drm_device *dev, struct seq_file *m)
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{
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struct drm_printer p = drm_seq_file_printer(m);
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read_lock(&dev->vma_offset_manager->vm_lock);
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drm_mm_print(&dev->vma_offset_manager->vm_addr_space_mm, &p);
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read_unlock(&dev->vma_offset_manager->vm_lock);
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return 0;
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}
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static int etnaviv_mmu_show(struct etnaviv_gpu *gpu, struct seq_file *m)
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{
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struct drm_printer p = drm_seq_file_printer(m);
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struct etnaviv_iommu_context *mmu_context;
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seq_printf(m, "Active Objects (%s):\n", dev_name(gpu->dev));
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/*
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* Lock the GPU to avoid a MMU context switch just now and elevate
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* the refcount of the current context to avoid it disappearing from
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* under our feet.
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*/
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mutex_lock(&gpu->lock);
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mmu_context = gpu->mmu_context;
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if (mmu_context)
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etnaviv_iommu_context_get(mmu_context);
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mutex_unlock(&gpu->lock);
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if (!mmu_context)
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return 0;
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mutex_lock(&mmu_context->lock);
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drm_mm_print(&mmu_context->mm, &p);
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mutex_unlock(&mmu_context->lock);
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etnaviv_iommu_context_put(mmu_context);
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return 0;
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}
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static void etnaviv_buffer_dump(struct etnaviv_gpu *gpu, struct seq_file *m)
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{
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struct etnaviv_cmdbuf *buf = &gpu->buffer;
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u32 size = buf->size;
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u32 *ptr = buf->vaddr;
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u32 i;
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seq_printf(m, "virt %p - phys 0x%llx - free 0x%08x\n",
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buf->vaddr, (u64)etnaviv_cmdbuf_get_pa(buf),
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size - buf->user_size);
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for (i = 0; i < size / 4; i++) {
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if (i && !(i % 4))
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seq_puts(m, "\n");
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if (i % 4 == 0)
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seq_printf(m, "\t0x%p: ", ptr + i);
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seq_printf(m, "%08x ", *(ptr + i));
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}
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seq_puts(m, "\n");
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}
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static int etnaviv_ring_show(struct etnaviv_gpu *gpu, struct seq_file *m)
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{
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seq_printf(m, "Ring Buffer (%s): ", dev_name(gpu->dev));
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mutex_lock(&gpu->lock);
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etnaviv_buffer_dump(gpu, m);
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mutex_unlock(&gpu->lock);
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return 0;
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}
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static int show_unlocked(struct seq_file *m, void *arg)
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{
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struct drm_info_node *node = (struct drm_info_node *) m->private;
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struct drm_device *dev = node->minor->dev;
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int (*show)(struct drm_device *dev, struct seq_file *m) =
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node->info_ent->data;
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return show(dev, m);
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}
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static int show_each_gpu(struct seq_file *m, void *arg)
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{
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struct drm_info_node *node = (struct drm_info_node *) m->private;
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struct drm_device *dev = node->minor->dev;
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struct etnaviv_drm_private *priv = dev->dev_private;
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struct etnaviv_gpu *gpu;
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int (*show)(struct etnaviv_gpu *gpu, struct seq_file *m) =
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node->info_ent->data;
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unsigned int i;
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int ret = 0;
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for (i = 0; i < ETNA_MAX_PIPES; i++) {
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gpu = priv->gpu[i];
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if (!gpu)
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continue;
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ret = show(gpu, m);
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if (ret < 0)
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break;
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}
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return ret;
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}
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static struct drm_info_list etnaviv_debugfs_list[] = {
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{"gpu", show_each_gpu, 0, etnaviv_gpu_debugfs},
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{"gem", show_unlocked, 0, etnaviv_gem_show},
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{ "mm", show_unlocked, 0, etnaviv_mm_show },
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{"mmu", show_each_gpu, 0, etnaviv_mmu_show},
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{"ring", show_each_gpu, 0, etnaviv_ring_show},
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};
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static void etnaviv_debugfs_init(struct drm_minor *minor)
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{
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drm_debugfs_create_files(etnaviv_debugfs_list,
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ARRAY_SIZE(etnaviv_debugfs_list),
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minor->debugfs_root, minor);
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}
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#endif
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/*
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* DRM ioctls:
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*/
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static int etnaviv_ioctl_get_param(struct drm_device *dev, void *data,
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struct drm_file *file)
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{
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struct etnaviv_drm_private *priv = dev->dev_private;
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struct drm_etnaviv_param *args = data;
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struct etnaviv_gpu *gpu;
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if (args->pipe >= ETNA_MAX_PIPES)
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return -EINVAL;
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gpu = priv->gpu[args->pipe];
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if (!gpu)
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return -ENXIO;
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return etnaviv_gpu_get_param(gpu, args->param, &args->value);
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}
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static int etnaviv_ioctl_gem_new(struct drm_device *dev, void *data,
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struct drm_file *file)
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{
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struct drm_etnaviv_gem_new *args = data;
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if (args->flags & ~(ETNA_BO_CACHED | ETNA_BO_WC | ETNA_BO_UNCACHED |
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ETNA_BO_FORCE_MMU))
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return -EINVAL;
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return etnaviv_gem_new_handle(dev, file, args->size,
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args->flags, &args->handle);
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}
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static int etnaviv_ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
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struct drm_file *file)
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{
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struct drm_etnaviv_gem_cpu_prep *args = data;
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struct drm_gem_object *obj;
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int ret;
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if (args->op & ~(ETNA_PREP_READ | ETNA_PREP_WRITE | ETNA_PREP_NOSYNC))
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return -EINVAL;
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obj = drm_gem_object_lookup(file, args->handle);
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if (!obj)
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return -ENOENT;
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ret = etnaviv_gem_cpu_prep(obj, args->op, &args->timeout);
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drm_gem_object_put(obj);
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return ret;
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}
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static int etnaviv_ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
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struct drm_file *file)
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{
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struct drm_etnaviv_gem_cpu_fini *args = data;
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struct drm_gem_object *obj;
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int ret;
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if (args->flags)
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return -EINVAL;
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obj = drm_gem_object_lookup(file, args->handle);
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if (!obj)
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return -ENOENT;
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ret = etnaviv_gem_cpu_fini(obj);
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drm_gem_object_put(obj);
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return ret;
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}
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static int etnaviv_ioctl_gem_info(struct drm_device *dev, void *data,
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struct drm_file *file)
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{
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struct drm_etnaviv_gem_info *args = data;
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struct drm_gem_object *obj;
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int ret;
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if (args->pad)
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return -EINVAL;
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obj = drm_gem_object_lookup(file, args->handle);
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if (!obj)
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return -ENOENT;
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ret = etnaviv_gem_mmap_offset(obj, &args->offset);
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drm_gem_object_put(obj);
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return ret;
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}
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static int etnaviv_ioctl_wait_fence(struct drm_device *dev, void *data,
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struct drm_file *file)
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{
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struct drm_etnaviv_wait_fence *args = data;
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struct etnaviv_drm_private *priv = dev->dev_private;
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struct drm_etnaviv_timespec *timeout = &args->timeout;
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struct etnaviv_gpu *gpu;
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if (args->flags & ~(ETNA_WAIT_NONBLOCK))
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return -EINVAL;
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if (args->pipe >= ETNA_MAX_PIPES)
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return -EINVAL;
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gpu = priv->gpu[args->pipe];
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if (!gpu)
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return -ENXIO;
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if (args->flags & ETNA_WAIT_NONBLOCK)
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timeout = NULL;
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return etnaviv_gpu_wait_fence_interruptible(gpu, args->fence,
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timeout);
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}
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static int etnaviv_ioctl_gem_userptr(struct drm_device *dev, void *data,
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struct drm_file *file)
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{
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struct drm_etnaviv_gem_userptr *args = data;
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if (args->flags & ~(ETNA_USERPTR_READ|ETNA_USERPTR_WRITE) ||
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args->flags == 0)
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return -EINVAL;
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if (offset_in_page(args->user_ptr | args->user_size) ||
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(uintptr_t)args->user_ptr != args->user_ptr ||
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(u32)args->user_size != args->user_size ||
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args->user_ptr & ~PAGE_MASK)
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return -EINVAL;
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if (!access_ok((void __user *)(unsigned long)args->user_ptr,
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args->user_size))
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return -EFAULT;
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return etnaviv_gem_new_userptr(dev, file, args->user_ptr,
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args->user_size, args->flags,
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&args->handle);
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}
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static int etnaviv_ioctl_gem_wait(struct drm_device *dev, void *data,
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struct drm_file *file)
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{
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struct etnaviv_drm_private *priv = dev->dev_private;
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struct drm_etnaviv_gem_wait *args = data;
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struct drm_etnaviv_timespec *timeout = &args->timeout;
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struct drm_gem_object *obj;
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struct etnaviv_gpu *gpu;
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int ret;
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if (args->flags & ~(ETNA_WAIT_NONBLOCK))
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return -EINVAL;
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if (args->pipe >= ETNA_MAX_PIPES)
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return -EINVAL;
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gpu = priv->gpu[args->pipe];
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if (!gpu)
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return -ENXIO;
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obj = drm_gem_object_lookup(file, args->handle);
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if (!obj)
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return -ENOENT;
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if (args->flags & ETNA_WAIT_NONBLOCK)
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timeout = NULL;
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ret = etnaviv_gem_wait_bo(gpu, obj, timeout);
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drm_gem_object_put(obj);
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return ret;
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}
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static int etnaviv_ioctl_pm_query_dom(struct drm_device *dev, void *data,
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struct drm_file *file)
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{
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struct etnaviv_drm_private *priv = dev->dev_private;
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struct drm_etnaviv_pm_domain *args = data;
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struct etnaviv_gpu *gpu;
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if (args->pipe >= ETNA_MAX_PIPES)
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return -EINVAL;
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gpu = priv->gpu[args->pipe];
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if (!gpu)
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return -ENXIO;
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return etnaviv_pm_query_dom(gpu, args);
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}
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static int etnaviv_ioctl_pm_query_sig(struct drm_device *dev, void *data,
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struct drm_file *file)
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{
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struct etnaviv_drm_private *priv = dev->dev_private;
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struct drm_etnaviv_pm_signal *args = data;
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struct etnaviv_gpu *gpu;
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if (args->pipe >= ETNA_MAX_PIPES)
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return -EINVAL;
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gpu = priv->gpu[args->pipe];
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if (!gpu)
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return -ENXIO;
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return etnaviv_pm_query_sig(gpu, args);
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}
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static const struct drm_ioctl_desc etnaviv_ioctls[] = {
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#define ETNA_IOCTL(n, func, flags) \
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DRM_IOCTL_DEF_DRV(ETNAVIV_##n, etnaviv_ioctl_##func, flags)
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ETNA_IOCTL(GET_PARAM, get_param, DRM_RENDER_ALLOW),
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ETNA_IOCTL(GEM_NEW, gem_new, DRM_RENDER_ALLOW),
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ETNA_IOCTL(GEM_INFO, gem_info, DRM_RENDER_ALLOW),
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ETNA_IOCTL(GEM_CPU_PREP, gem_cpu_prep, DRM_RENDER_ALLOW),
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ETNA_IOCTL(GEM_CPU_FINI, gem_cpu_fini, DRM_RENDER_ALLOW),
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ETNA_IOCTL(GEM_SUBMIT, gem_submit, DRM_RENDER_ALLOW),
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ETNA_IOCTL(WAIT_FENCE, wait_fence, DRM_RENDER_ALLOW),
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ETNA_IOCTL(GEM_USERPTR, gem_userptr, DRM_RENDER_ALLOW),
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ETNA_IOCTL(GEM_WAIT, gem_wait, DRM_RENDER_ALLOW),
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ETNA_IOCTL(PM_QUERY_DOM, pm_query_dom, DRM_RENDER_ALLOW),
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ETNA_IOCTL(PM_QUERY_SIG, pm_query_sig, DRM_RENDER_ALLOW),
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};
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DEFINE_DRM_GEM_FOPS(fops);
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static const struct drm_driver etnaviv_drm_driver = {
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.driver_features = DRIVER_GEM | DRIVER_RENDER,
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.open = etnaviv_open,
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.postclose = etnaviv_postclose,
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.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
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.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
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.gem_prime_import_sg_table = etnaviv_gem_prime_import_sg_table,
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.gem_prime_mmap = drm_gem_prime_mmap,
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#ifdef CONFIG_DEBUG_FS
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.debugfs_init = etnaviv_debugfs_init,
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#endif
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.ioctls = etnaviv_ioctls,
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.num_ioctls = DRM_ETNAVIV_NUM_IOCTLS,
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.fops = &fops,
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.name = "etnaviv",
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.desc = "etnaviv DRM",
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.date = "20151214",
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.major = 1,
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.minor = 3,
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};
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/*
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* Platform driver:
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*/
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static int etnaviv_bind(struct device *dev)
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{
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struct etnaviv_drm_private *priv;
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struct drm_device *drm;
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int ret;
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drm = drm_dev_alloc(&etnaviv_drm_driver, dev);
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if (IS_ERR(drm))
|
|
return PTR_ERR(drm);
|
|
|
|
priv = kzalloc(sizeof(*priv), GFP_KERNEL);
|
|
if (!priv) {
|
|
dev_err(dev, "failed to allocate private data\n");
|
|
ret = -ENOMEM;
|
|
goto out_put;
|
|
}
|
|
drm->dev_private = priv;
|
|
|
|
dma_set_max_seg_size(dev, SZ_2G);
|
|
|
|
mutex_init(&priv->gem_lock);
|
|
INIT_LIST_HEAD(&priv->gem_list);
|
|
priv->num_gpus = 0;
|
|
priv->shm_gfp_mask = GFP_HIGHUSER | __GFP_RETRY_MAYFAIL | __GFP_NOWARN;
|
|
|
|
priv->cmdbuf_suballoc = etnaviv_cmdbuf_suballoc_new(drm->dev);
|
|
if (IS_ERR(priv->cmdbuf_suballoc)) {
|
|
dev_err(drm->dev, "Failed to create cmdbuf suballocator\n");
|
|
ret = PTR_ERR(priv->cmdbuf_suballoc);
|
|
goto out_free_priv;
|
|
}
|
|
|
|
dev_set_drvdata(dev, drm);
|
|
|
|
ret = component_bind_all(dev, drm);
|
|
if (ret < 0)
|
|
goto out_destroy_suballoc;
|
|
|
|
load_gpu(drm);
|
|
|
|
ret = drm_dev_register(drm, 0);
|
|
if (ret)
|
|
goto out_unbind;
|
|
|
|
return 0;
|
|
|
|
out_unbind:
|
|
component_unbind_all(dev, drm);
|
|
out_destroy_suballoc:
|
|
etnaviv_cmdbuf_suballoc_destroy(priv->cmdbuf_suballoc);
|
|
out_free_priv:
|
|
kfree(priv);
|
|
out_put:
|
|
drm_dev_put(drm);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void etnaviv_unbind(struct device *dev)
|
|
{
|
|
struct drm_device *drm = dev_get_drvdata(dev);
|
|
struct etnaviv_drm_private *priv = drm->dev_private;
|
|
|
|
drm_dev_unregister(drm);
|
|
|
|
component_unbind_all(dev, drm);
|
|
|
|
etnaviv_cmdbuf_suballoc_destroy(priv->cmdbuf_suballoc);
|
|
|
|
drm->dev_private = NULL;
|
|
kfree(priv);
|
|
|
|
drm_dev_put(drm);
|
|
}
|
|
|
|
static const struct component_master_ops etnaviv_master_ops = {
|
|
.bind = etnaviv_bind,
|
|
.unbind = etnaviv_unbind,
|
|
};
|
|
|
|
static int etnaviv_pdev_probe(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct device_node *first_node = NULL;
|
|
struct component_match *match = NULL;
|
|
|
|
if (!dev->platform_data) {
|
|
struct device_node *core_node;
|
|
|
|
for_each_compatible_node(core_node, NULL, "vivante,gc") {
|
|
if (!of_device_is_available(core_node))
|
|
continue;
|
|
|
|
if (!first_node)
|
|
first_node = core_node;
|
|
|
|
drm_of_component_match_add(&pdev->dev, &match,
|
|
component_compare_of, core_node);
|
|
}
|
|
} else {
|
|
char **names = dev->platform_data;
|
|
unsigned i;
|
|
|
|
for (i = 0; names[i]; i++)
|
|
component_match_add(dev, &match, component_compare_dev_name, names[i]);
|
|
}
|
|
|
|
/*
|
|
* PTA and MTLB can have 40 bit base addresses, but
|
|
* unfortunately, an entry in the MTLB can only point to a
|
|
* 32 bit base address of a STLB. Moreover, to initialize the
|
|
* MMU we need a command buffer with a 32 bit address because
|
|
* without an MMU there is only an indentity mapping between
|
|
* the internal 32 bit addresses and the bus addresses.
|
|
*
|
|
* To make things easy, we set the dma_coherent_mask to 32
|
|
* bit to make sure we are allocating the command buffers and
|
|
* TLBs in the lower 4 GiB address space.
|
|
*/
|
|
if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(40)) ||
|
|
dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32))) {
|
|
dev_dbg(&pdev->dev, "No suitable DMA available\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
/*
|
|
* Apply the same DMA configuration to the virtual etnaviv
|
|
* device as the GPU we found. This assumes that all Vivante
|
|
* GPUs in the system share the same DMA constraints.
|
|
*/
|
|
if (first_node)
|
|
of_dma_configure(&pdev->dev, first_node, true);
|
|
|
|
return component_master_add_with_match(dev, &etnaviv_master_ops, match);
|
|
}
|
|
|
|
static int etnaviv_pdev_remove(struct platform_device *pdev)
|
|
{
|
|
component_master_del(&pdev->dev, &etnaviv_master_ops);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver etnaviv_platform_driver = {
|
|
.probe = etnaviv_pdev_probe,
|
|
.remove = etnaviv_pdev_remove,
|
|
.driver = {
|
|
.name = "etnaviv",
|
|
},
|
|
};
|
|
|
|
static struct platform_device *etnaviv_drm;
|
|
|
|
static int __init etnaviv_init(void)
|
|
{
|
|
struct platform_device *pdev;
|
|
int ret;
|
|
struct device_node *np;
|
|
|
|
etnaviv_validate_init();
|
|
|
|
ret = platform_driver_register(&etnaviv_gpu_driver);
|
|
if (ret != 0)
|
|
return ret;
|
|
|
|
ret = platform_driver_register(&etnaviv_platform_driver);
|
|
if (ret != 0)
|
|
goto unregister_gpu_driver;
|
|
|
|
/*
|
|
* If the DT contains at least one available GPU device, instantiate
|
|
* the DRM platform device.
|
|
*/
|
|
for_each_compatible_node(np, NULL, "vivante,gc") {
|
|
if (!of_device_is_available(np))
|
|
continue;
|
|
|
|
pdev = platform_device_alloc("etnaviv", PLATFORM_DEVID_NONE);
|
|
if (!pdev) {
|
|
ret = -ENOMEM;
|
|
of_node_put(np);
|
|
goto unregister_platform_driver;
|
|
}
|
|
|
|
ret = platform_device_add(pdev);
|
|
if (ret) {
|
|
platform_device_put(pdev);
|
|
of_node_put(np);
|
|
goto unregister_platform_driver;
|
|
}
|
|
|
|
etnaviv_drm = pdev;
|
|
of_node_put(np);
|
|
break;
|
|
}
|
|
|
|
return 0;
|
|
|
|
unregister_platform_driver:
|
|
platform_driver_unregister(&etnaviv_platform_driver);
|
|
unregister_gpu_driver:
|
|
platform_driver_unregister(&etnaviv_gpu_driver);
|
|
return ret;
|
|
}
|
|
module_init(etnaviv_init);
|
|
|
|
static void __exit etnaviv_exit(void)
|
|
{
|
|
platform_device_unregister(etnaviv_drm);
|
|
platform_driver_unregister(&etnaviv_platform_driver);
|
|
platform_driver_unregister(&etnaviv_gpu_driver);
|
|
}
|
|
module_exit(etnaviv_exit);
|
|
|
|
MODULE_AUTHOR("Christian Gmeiner <christian.gmeiner@gmail.com>");
|
|
MODULE_AUTHOR("Russell King <rmk+kernel@armlinux.org.uk>");
|
|
MODULE_AUTHOR("Lucas Stach <l.stach@pengutronix.de>");
|
|
MODULE_DESCRIPTION("etnaviv DRM Driver");
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_ALIAS("platform:etnaviv");
|