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![Thomas Zimmermann](/assets/img/avatar_default.png)
Move the generic fbdev implementation into its own source and header file. Adapt drivers. No functional changes, but some of the internal helpers have been renamed to fit into the drm_fbdev_ naming scheme. v3: * rename drm_fbdev.{c,h} to drm_fbdev_generic.{c,h} * rebase onto vmwgfx changes * rebase onto xlnx changes * fix include statements in amdgpu Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221103151446.2638-22-tzimmermann@suse.de
534 lines
15 KiB
C
534 lines
15 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* ZynqMP DisplayPort Subsystem - KMS API
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*
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* Copyright (C) 2017 - 2021 Xilinx, Inc.
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*
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* Authors:
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* - Hyun Woo Kwon <hyun.kwon@xilinx.com>
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* - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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*/
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_blend.h>
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#include <drm/drm_bridge.h>
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#include <drm/drm_bridge_connector.h>
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#include <drm/drm_connector.h>
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#include <drm/drm_crtc.h>
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#include <drm/drm_device.h>
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#include <drm/drm_drv.h>
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#include <drm/drm_encoder.h>
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#include <drm/drm_fbdev_generic.h>
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#include <drm/drm_fourcc.h>
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#include <drm/drm_framebuffer.h>
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#include <drm/drm_gem_dma_helper.h>
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#include <drm/drm_gem_framebuffer_helper.h>
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#include <drm/drm_managed.h>
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#include <drm/drm_mode_config.h>
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#include <drm/drm_plane.h>
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#include <drm/drm_plane_helper.h>
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#include <drm/drm_probe_helper.h>
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#include <drm/drm_simple_kms_helper.h>
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#include <drm/drm_vblank.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/pm_runtime.h>
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#include <linux/spinlock.h>
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#include "zynqmp_disp.h"
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#include "zynqmp_dp.h"
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#include "zynqmp_dpsub.h"
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#include "zynqmp_kms.h"
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static inline struct zynqmp_dpsub *to_zynqmp_dpsub(struct drm_device *drm)
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{
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return container_of(drm, struct zynqmp_dpsub_drm, dev)->dpsub;
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}
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/* -----------------------------------------------------------------------------
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* DRM Planes
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*/
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static int zynqmp_dpsub_plane_atomic_check(struct drm_plane *plane,
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struct drm_atomic_state *state)
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{
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struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
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plane);
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struct drm_crtc_state *crtc_state;
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if (!new_plane_state->crtc)
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return 0;
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crtc_state = drm_atomic_get_crtc_state(state, new_plane_state->crtc);
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if (IS_ERR(crtc_state))
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return PTR_ERR(crtc_state);
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return drm_atomic_helper_check_plane_state(new_plane_state,
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crtc_state,
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DRM_PLANE_NO_SCALING,
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DRM_PLANE_NO_SCALING,
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false, false);
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}
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static void zynqmp_dpsub_plane_atomic_disable(struct drm_plane *plane,
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struct drm_atomic_state *state)
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{
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struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state,
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plane);
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struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(plane->dev);
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struct zynqmp_disp_layer *layer = dpsub->layers[plane->index];
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if (!old_state->fb)
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return;
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zynqmp_disp_layer_disable(layer);
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if (plane->index == ZYNQMP_DPSUB_LAYER_GFX)
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zynqmp_disp_blend_set_global_alpha(dpsub->disp, false,
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plane->state->alpha >> 8);
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}
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static void zynqmp_dpsub_plane_atomic_update(struct drm_plane *plane,
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struct drm_atomic_state *state)
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{
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struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, plane);
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struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane);
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struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(plane->dev);
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struct zynqmp_disp_layer *layer = dpsub->layers[plane->index];
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bool format_changed = false;
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if (!old_state->fb ||
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old_state->fb->format->format != new_state->fb->format->format)
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format_changed = true;
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/*
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* If the format has changed (including going from a previously
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* disabled state to any format), reconfigure the format. Disable the
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* plane first if needed.
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*/
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if (format_changed) {
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if (old_state->fb)
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zynqmp_disp_layer_disable(layer);
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zynqmp_disp_layer_set_format(layer, new_state->fb->format);
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}
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zynqmp_disp_layer_update(layer, new_state);
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if (plane->index == ZYNQMP_DPSUB_LAYER_GFX)
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zynqmp_disp_blend_set_global_alpha(dpsub->disp, true,
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plane->state->alpha >> 8);
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/* Enable or re-enable the plane if the format has changed. */
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if (format_changed)
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zynqmp_disp_layer_enable(layer, ZYNQMP_DPSUB_LAYER_NONLIVE);
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}
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static const struct drm_plane_helper_funcs zynqmp_dpsub_plane_helper_funcs = {
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.atomic_check = zynqmp_dpsub_plane_atomic_check,
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.atomic_update = zynqmp_dpsub_plane_atomic_update,
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.atomic_disable = zynqmp_dpsub_plane_atomic_disable,
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};
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static const struct drm_plane_funcs zynqmp_dpsub_plane_funcs = {
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.update_plane = drm_atomic_helper_update_plane,
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.disable_plane = drm_atomic_helper_disable_plane,
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.destroy = drm_plane_cleanup,
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.reset = drm_atomic_helper_plane_reset,
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.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
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.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
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};
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static int zynqmp_dpsub_create_planes(struct zynqmp_dpsub *dpsub)
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{
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unsigned int i;
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int ret;
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for (i = 0; i < ARRAY_SIZE(dpsub->drm->planes); i++) {
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struct zynqmp_disp_layer *layer = dpsub->layers[i];
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struct drm_plane *plane = &dpsub->drm->planes[i];
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enum drm_plane_type type;
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unsigned int num_formats;
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u32 *formats;
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formats = zynqmp_disp_layer_drm_formats(layer, &num_formats);
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if (!formats)
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return -ENOMEM;
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/* Graphics layer is primary, and video layer is overlay. */
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type = i == ZYNQMP_DPSUB_LAYER_VID
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? DRM_PLANE_TYPE_OVERLAY : DRM_PLANE_TYPE_PRIMARY;
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ret = drm_universal_plane_init(&dpsub->drm->dev, plane, 0,
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&zynqmp_dpsub_plane_funcs,
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formats, num_formats,
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NULL, type, NULL);
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kfree(formats);
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if (ret)
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return ret;
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drm_plane_helper_add(plane, &zynqmp_dpsub_plane_helper_funcs);
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drm_plane_create_zpos_immutable_property(plane, i);
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if (i == ZYNQMP_DPSUB_LAYER_GFX)
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drm_plane_create_alpha_property(plane);
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}
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return 0;
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}
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/* -----------------------------------------------------------------------------
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* DRM CRTC
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*/
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static inline struct zynqmp_dpsub *crtc_to_dpsub(struct drm_crtc *crtc)
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{
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return container_of(crtc, struct zynqmp_dpsub_drm, crtc)->dpsub;
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}
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static void zynqmp_dpsub_crtc_atomic_enable(struct drm_crtc *crtc,
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struct drm_atomic_state *state)
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{
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struct zynqmp_dpsub *dpsub = crtc_to_dpsub(crtc);
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struct drm_display_mode *adjusted_mode = &crtc->state->adjusted_mode;
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int ret, vrefresh;
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pm_runtime_get_sync(dpsub->dev);
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zynqmp_disp_setup_clock(dpsub->disp, adjusted_mode->clock * 1000);
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ret = clk_prepare_enable(dpsub->vid_clk);
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if (ret) {
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dev_err(dpsub->dev, "failed to enable a pixel clock\n");
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pm_runtime_put_sync(dpsub->dev);
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return;
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}
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zynqmp_disp_enable(dpsub->disp);
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/* Delay of 3 vblank intervals for timing gen to be stable */
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vrefresh = (adjusted_mode->clock * 1000) /
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(adjusted_mode->vtotal * adjusted_mode->htotal);
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msleep(3 * 1000 / vrefresh);
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}
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static void zynqmp_dpsub_crtc_atomic_disable(struct drm_crtc *crtc,
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struct drm_atomic_state *state)
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{
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struct zynqmp_dpsub *dpsub = crtc_to_dpsub(crtc);
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struct drm_plane_state *old_plane_state;
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/*
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* Disable the plane if active. The old plane state can be NULL in the
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* .shutdown() path if the plane is already disabled, skip
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* zynqmp_disp_plane_atomic_disable() in that case.
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*/
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old_plane_state = drm_atomic_get_old_plane_state(state, crtc->primary);
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if (old_plane_state)
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zynqmp_dpsub_plane_atomic_disable(crtc->primary, state);
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zynqmp_disp_disable(dpsub->disp);
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drm_crtc_vblank_off(crtc);
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spin_lock_irq(&crtc->dev->event_lock);
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if (crtc->state->event) {
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drm_crtc_send_vblank_event(crtc, crtc->state->event);
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crtc->state->event = NULL;
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}
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spin_unlock_irq(&crtc->dev->event_lock);
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clk_disable_unprepare(dpsub->vid_clk);
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pm_runtime_put_sync(dpsub->dev);
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}
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static int zynqmp_dpsub_crtc_atomic_check(struct drm_crtc *crtc,
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struct drm_atomic_state *state)
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{
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return drm_atomic_add_affected_planes(state, crtc);
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}
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static void zynqmp_dpsub_crtc_atomic_begin(struct drm_crtc *crtc,
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struct drm_atomic_state *state)
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{
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drm_crtc_vblank_on(crtc);
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}
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static void zynqmp_dpsub_crtc_atomic_flush(struct drm_crtc *crtc,
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struct drm_atomic_state *state)
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{
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if (crtc->state->event) {
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struct drm_pending_vblank_event *event;
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/* Consume the flip_done event from atomic helper. */
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event = crtc->state->event;
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crtc->state->event = NULL;
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event->pipe = drm_crtc_index(crtc);
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WARN_ON(drm_crtc_vblank_get(crtc) != 0);
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spin_lock_irq(&crtc->dev->event_lock);
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drm_crtc_arm_vblank_event(crtc, event);
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spin_unlock_irq(&crtc->dev->event_lock);
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}
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}
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static const struct drm_crtc_helper_funcs zynqmp_dpsub_crtc_helper_funcs = {
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.atomic_enable = zynqmp_dpsub_crtc_atomic_enable,
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.atomic_disable = zynqmp_dpsub_crtc_atomic_disable,
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.atomic_check = zynqmp_dpsub_crtc_atomic_check,
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.atomic_begin = zynqmp_dpsub_crtc_atomic_begin,
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.atomic_flush = zynqmp_dpsub_crtc_atomic_flush,
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};
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static int zynqmp_dpsub_crtc_enable_vblank(struct drm_crtc *crtc)
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{
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struct zynqmp_dpsub *dpsub = crtc_to_dpsub(crtc);
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zynqmp_dp_enable_vblank(dpsub->dp);
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return 0;
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}
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static void zynqmp_dpsub_crtc_disable_vblank(struct drm_crtc *crtc)
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{
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struct zynqmp_dpsub *dpsub = crtc_to_dpsub(crtc);
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zynqmp_dp_disable_vblank(dpsub->dp);
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}
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static const struct drm_crtc_funcs zynqmp_dpsub_crtc_funcs = {
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.destroy = drm_crtc_cleanup,
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.set_config = drm_atomic_helper_set_config,
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.page_flip = drm_atomic_helper_page_flip,
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.reset = drm_atomic_helper_crtc_reset,
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.atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
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.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
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.enable_vblank = zynqmp_dpsub_crtc_enable_vblank,
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.disable_vblank = zynqmp_dpsub_crtc_disable_vblank,
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};
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static int zynqmp_dpsub_create_crtc(struct zynqmp_dpsub *dpsub)
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{
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struct drm_plane *plane = &dpsub->drm->planes[ZYNQMP_DPSUB_LAYER_GFX];
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struct drm_crtc *crtc = &dpsub->drm->crtc;
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int ret;
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ret = drm_crtc_init_with_planes(&dpsub->drm->dev, crtc, plane,
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NULL, &zynqmp_dpsub_crtc_funcs, NULL);
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if (ret < 0)
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return ret;
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drm_crtc_helper_add(crtc, &zynqmp_dpsub_crtc_helper_funcs);
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/* Start with vertical blanking interrupt reporting disabled. */
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drm_crtc_vblank_off(crtc);
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return 0;
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}
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static void zynqmp_dpsub_map_crtc_to_plane(struct zynqmp_dpsub *dpsub)
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{
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u32 possible_crtcs = drm_crtc_mask(&dpsub->drm->crtc);
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(dpsub->drm->planes); i++)
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dpsub->drm->planes[i].possible_crtcs = possible_crtcs;
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}
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/**
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* zynqmp_dpsub_drm_handle_vblank - Handle the vblank event
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* @dpsub: DisplayPort subsystem
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*
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* This function handles the vblank interrupt, and sends an event to
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* CRTC object. This will be called by the DP vblank interrupt handler.
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*/
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void zynqmp_dpsub_drm_handle_vblank(struct zynqmp_dpsub *dpsub)
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{
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drm_crtc_handle_vblank(&dpsub->drm->crtc);
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}
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/* -----------------------------------------------------------------------------
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* Dumb Buffer & Framebuffer Allocation
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*/
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static int zynqmp_dpsub_dumb_create(struct drm_file *file_priv,
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struct drm_device *drm,
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struct drm_mode_create_dumb *args)
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{
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struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(drm);
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unsigned int pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
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/* Enforce the alignment constraints of the DMA engine. */
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args->pitch = ALIGN(pitch, dpsub->dma_align);
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return drm_gem_dma_dumb_create_internal(file_priv, drm, args);
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}
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static struct drm_framebuffer *
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zynqmp_dpsub_fb_create(struct drm_device *drm, struct drm_file *file_priv,
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const struct drm_mode_fb_cmd2 *mode_cmd)
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{
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struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(drm);
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struct drm_mode_fb_cmd2 cmd = *mode_cmd;
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unsigned int i;
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/* Enforce the alignment constraints of the DMA engine. */
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for (i = 0; i < ARRAY_SIZE(cmd.pitches); ++i)
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cmd.pitches[i] = ALIGN(cmd.pitches[i], dpsub->dma_align);
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return drm_gem_fb_create(drm, file_priv, &cmd);
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}
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static const struct drm_mode_config_funcs zynqmp_dpsub_mode_config_funcs = {
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.fb_create = zynqmp_dpsub_fb_create,
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.atomic_check = drm_atomic_helper_check,
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.atomic_commit = drm_atomic_helper_commit,
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};
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/* -----------------------------------------------------------------------------
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* DRM/KMS Driver
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*/
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DEFINE_DRM_GEM_DMA_FOPS(zynqmp_dpsub_drm_fops);
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static const struct drm_driver zynqmp_dpsub_drm_driver = {
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.driver_features = DRIVER_MODESET | DRIVER_GEM |
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DRIVER_ATOMIC,
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DRM_GEM_DMA_DRIVER_OPS_WITH_DUMB_CREATE(zynqmp_dpsub_dumb_create),
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.fops = &zynqmp_dpsub_drm_fops,
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.name = "zynqmp-dpsub",
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.desc = "Xilinx DisplayPort Subsystem Driver",
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.date = "20130509",
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.major = 1,
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.minor = 0,
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};
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static int zynqmp_dpsub_kms_init(struct zynqmp_dpsub *dpsub)
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{
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struct drm_encoder *encoder = &dpsub->drm->encoder;
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struct drm_connector *connector;
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int ret;
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/* Create the planes and the CRTC. */
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ret = zynqmp_dpsub_create_planes(dpsub);
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if (ret)
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return ret;
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ret = zynqmp_dpsub_create_crtc(dpsub);
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if (ret < 0)
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return ret;
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zynqmp_dpsub_map_crtc_to_plane(dpsub);
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/* Create the encoder and attach the bridge. */
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encoder->possible_crtcs |= drm_crtc_mask(&dpsub->drm->crtc);
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drm_simple_encoder_init(&dpsub->drm->dev, encoder, DRM_MODE_ENCODER_NONE);
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ret = drm_bridge_attach(encoder, dpsub->bridge, NULL,
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DRM_BRIDGE_ATTACH_NO_CONNECTOR);
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if (ret) {
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dev_err(dpsub->dev, "failed to attach bridge to encoder\n");
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return ret;
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}
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/* Create the connector for the chain of bridges. */
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connector = drm_bridge_connector_init(&dpsub->drm->dev, encoder);
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if (IS_ERR(connector)) {
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dev_err(dpsub->dev, "failed to created connector\n");
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return PTR_ERR(connector);
|
|
}
|
|
|
|
ret = drm_connector_attach_encoder(connector, encoder);
|
|
if (ret < 0) {
|
|
dev_err(dpsub->dev, "failed to attach connector to encoder\n");
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void zynqmp_dpsub_drm_release(struct drm_device *drm, void *res)
|
|
{
|
|
struct zynqmp_dpsub_drm *dpdrm = res;
|
|
|
|
zynqmp_dpsub_release(dpdrm->dpsub);
|
|
}
|
|
|
|
int zynqmp_dpsub_drm_init(struct zynqmp_dpsub *dpsub)
|
|
{
|
|
struct zynqmp_dpsub_drm *dpdrm;
|
|
struct drm_device *drm;
|
|
int ret;
|
|
|
|
/*
|
|
* Allocate the drm_device and immediately add a cleanup action to
|
|
* release the zynqmp_dpsub instance. If any of those operations fail,
|
|
* dpsub->drm will remain NULL, which tells the caller that it must
|
|
* cleanup manually.
|
|
*/
|
|
dpdrm = devm_drm_dev_alloc(dpsub->dev, &zynqmp_dpsub_drm_driver,
|
|
struct zynqmp_dpsub_drm, dev);
|
|
if (IS_ERR(dpdrm))
|
|
return PTR_ERR(dpdrm);
|
|
|
|
dpdrm->dpsub = dpsub;
|
|
drm = &dpdrm->dev;
|
|
|
|
ret = drmm_add_action(drm, zynqmp_dpsub_drm_release, dpdrm);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
dpsub->drm = dpdrm;
|
|
|
|
/* Initialize mode config, vblank and the KMS poll helper. */
|
|
ret = drmm_mode_config_init(drm);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
drm->mode_config.funcs = &zynqmp_dpsub_mode_config_funcs;
|
|
drm->mode_config.min_width = 0;
|
|
drm->mode_config.min_height = 0;
|
|
drm->mode_config.max_width = ZYNQMP_DISP_MAX_WIDTH;
|
|
drm->mode_config.max_height = ZYNQMP_DISP_MAX_HEIGHT;
|
|
|
|
ret = drm_vblank_init(drm, 1);
|
|
if (ret)
|
|
return ret;
|
|
|
|
drm_kms_helper_poll_init(drm);
|
|
|
|
ret = zynqmp_dpsub_kms_init(dpsub);
|
|
if (ret < 0)
|
|
goto err_poll_fini;
|
|
|
|
/* Reset all components and register the DRM device. */
|
|
drm_mode_config_reset(drm);
|
|
|
|
ret = drm_dev_register(drm, 0);
|
|
if (ret < 0)
|
|
goto err_poll_fini;
|
|
|
|
/* Initialize fbdev generic emulation. */
|
|
drm_fbdev_generic_setup(drm, 24);
|
|
|
|
return 0;
|
|
|
|
err_poll_fini:
|
|
drm_kms_helper_poll_fini(drm);
|
|
return ret;
|
|
}
|
|
|
|
void zynqmp_dpsub_drm_cleanup(struct zynqmp_dpsub *dpsub)
|
|
{
|
|
struct drm_device *drm = &dpsub->drm->dev;
|
|
|
|
drm_dev_unregister(drm);
|
|
drm_atomic_helper_shutdown(drm);
|
|
drm_kms_helper_poll_fini(drm);
|
|
}
|