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139c949f7f
mt7621 has the following memory map:
0x0-0x1c000000: lower 448m memory
0x1c000000-0x2000000: peripheral registers
0x20000000-0x2400000: higher 64m memory
detect_memory_region in arch/mips/kernel/setup.c only adds the first
memory region and isn't suitable for 512m memory detection because
it may accidentally read the memory area for peripheral registers.
This commit adds memory detection capability for mt7621:
1. Add the highmem area when 512m is detected.
2. Guard memcmp from accessing peripheral registers:
This only happens when a user decided to change kernel load address
to 256m or higher address. Since this is a quite unusual case, we
just skip 512m testing and return 256m as memory size.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
[Minor commit message reword, make mt7621_memory_detect static]
Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
35 lines
802 B
C
35 lines
802 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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*
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* Copyright (C) 2013 John Crispin <john@phrozen.org>
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*/
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#ifndef _RALINK_COMMON_H__
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#define _RALINK_COMMON_H__
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#define RAMIPS_SYS_TYPE_LEN 32
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struct ralink_soc_info {
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unsigned char sys_type[RAMIPS_SYS_TYPE_LEN];
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unsigned char *compatible;
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unsigned long mem_base;
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unsigned long mem_size;
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unsigned long mem_size_min;
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unsigned long mem_size_max;
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void (*mem_detect)(void);
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};
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extern struct ralink_soc_info soc_info;
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extern void ralink_of_remap(void);
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extern void ralink_clk_init(void);
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extern void ralink_clk_add(const char *dev, unsigned long rate);
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extern void ralink_rst_init(void);
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extern void __init prom_soc_init(struct ralink_soc_info *soc_info);
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__iomem void *plat_of_remap_node(const char *node);
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#endif /* _RALINK_COMMON_H__ */
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