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767139540c
On Vybrid, all peripherals are numbered starting with zero, including the GPIO and PORT module. However, the labels of the corresponding device tree nodes start with one, which is confusing. Fix that by renaming the labels of the gpio nodes in the device tree. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
187 lines
3.4 KiB
Text
187 lines
3.4 KiB
Text
/*
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* Copyright 2014 Toradex AG
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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/ {
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bl: backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm0 0 5000000 0>;
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status = "disabled";
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};
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};
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&adc0 {
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status = "okay";
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};
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&adc1 {
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status = "okay";
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};
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&edma0 {
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status = "okay";
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};
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&esdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_esdhc1>;
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bus-width = <4>;
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cd-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
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};
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&fec1 {
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phy-mode = "rmii";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec1>;
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};
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&i2c0 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c0>;
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};
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&pwm0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm0>;
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};
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&pwm1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm1>;
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart0>;
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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};
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&usbdev0 {
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disable-over-current;
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status = "okay";
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};
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&usbh1 {
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disable-over-current;
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status = "okay";
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};
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&usbmisc0 {
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status = "okay";
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};
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&usbmisc1 {
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status = "okay";
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};
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&usbphy0 {
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status = "okay";
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};
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&usbphy1 {
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status = "okay";
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};
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&iomuxc {
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vf610-colibri {
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pinctrl_gpio_ext: gpio_ext {
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fsl,pins = <
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VF610_PAD_PTD10__GPIO_89 0x22ed /* EXT_IO_0 */
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VF610_PAD_PTD9__GPIO_88 0x22ed /* EXT_IO_1 */
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VF610_PAD_PTD26__GPIO_68 0x22ed /* EXT_IO_2 */
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>;
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};
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pinctrl_esdhc1: esdhc1grp {
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fsl,pins = <
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VF610_PAD_PTA24__ESDHC1_CLK 0x31ef
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VF610_PAD_PTA25__ESDHC1_CMD 0x31ef
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VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef
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VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef
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VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef
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VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef
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VF610_PAD_PTB20__GPIO_42 0x219d
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>;
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};
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pinctrl_fec1: fec1grp {
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fsl,pins = <
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VF610_PAD_PTA6__RMII_CLKOUT 0x30d2
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VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2
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VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3
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VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1
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VF610_PAD_PTC12__ENET_RMII_RXD1 0x30d1
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VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1
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VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1
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VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2
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VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2
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VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2
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>;
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};
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pinctrl_i2c0: i2c0grp {
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fsl,pins = <
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VF610_PAD_PTB14__I2C0_SCL 0x37ff
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VF610_PAD_PTB15__I2C0_SDA 0x37ff
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>;
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};
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pinctrl_pwm0: pwm0grp {
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fsl,pins = <
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VF610_PAD_PTB0__FTM0_CH0 0x1182
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VF610_PAD_PTB1__FTM0_CH1 0x1182
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>;
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};
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pinctrl_pwm1: pwm1grp {
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fsl,pins = <
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VF610_PAD_PTB8__FTM1_CH0 0x1182
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VF610_PAD_PTB9__FTM1_CH1 0x1182
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>;
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};
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pinctrl_uart0: uart0grp {
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fsl,pins = <
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VF610_PAD_PTB10__UART0_TX 0x21a2
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VF610_PAD_PTB11__UART0_RX 0x21a1
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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VF610_PAD_PTB4__UART1_TX 0x21a2
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VF610_PAD_PTB5__UART1_RX 0x21a1
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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VF610_PAD_PTD0__UART2_TX 0x21a2
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VF610_PAD_PTD1__UART2_RX 0x21a1
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VF610_PAD_PTD2__UART2_RTS 0x21a2
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VF610_PAD_PTD3__UART2_CTS 0x21a1
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>;
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};
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pinctrl_usbh1_reg: gpio_usb_vbus {
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fsl,pins = <
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VF610_PAD_PTD4__GPIO_83 0x22ed
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>;
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};
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};
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};
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