Dan Carpenter 0613de3737 clk: davinci: cfgchip: testing the wrong variable ... There is a copy and paste bug here. We should be testing "usb1" instead of "usb0". Fixes: 58e1e2d2cd ("clk: davinci: cfgchip: Add TI DA8XX USB PHY clocks") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: David Lechner <david@lechnology.com>		2018-06-25 18:07:02 -05:00
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da8xx-cfgchip.c	clk: davinci: cfgchip: testing the wrong variable	2018-06-25 18:07:02 -05:00
Makefile	clk: davinci: New driver for TI DA8XX CFGCHIP clocks	2018-03-20 10:16:26 -07:00
pll-da830.c	clk: davinci: pll: allow dev == NULL	2018-05-30 12:48:35 -07:00
pll-da850.c	clk: davinci: da850-pll: change PLL0 to CLK_OF_DECLARE	2018-05-30 12:48:39 -07:00
pll-dm355.c	clk: davinci: pll: allow dev == NULL	2018-05-30 12:48:35 -07:00
pll-dm365.c	clk: davinci: pll: allow dev == NULL	2018-05-30 12:48:35 -07:00
pll-dm644x.c	clk: davinci: pll: allow dev == NULL	2018-05-30 12:48:35 -07:00
pll-dm646x.c	clk: davinci: pll: allow dev == NULL	2018-05-30 12:48:35 -07:00
pll.c	Merge branches 'clk-davinci-psc-da830', 'clk-renesas', 'clk-at91-recalc', 'clk-davinci' and 'clk-meson' into clk-next	2018-06-04 12:37:41 -07:00
pll.h	clk: davinci: Fix link errors when not all SoCs are enabled	2018-05-30 12:48:49 -07:00
psc-da830.c	clk: davinci: psc-da830: fix USB0 48MHz PHY clock registration	2018-05-15 15:33:52 -07:00
psc-da850.c	clk: davinci: add a reset lookup table for psc0	2018-04-06 13:37:19 -07:00
psc-dm355.c	clk: davinci: psc: allow for dev == NULL	2018-05-30 12:48:44 -07:00
psc-dm365.c	clk: davinci: psc: allow for dev == NULL	2018-05-30 12:48:44 -07:00
psc-dm644x.c	clk: davinci: psc: allow for dev == NULL	2018-05-30 12:48:44 -07:00
psc-dm646x.c	clk: davinci: psc: allow for dev == NULL	2018-05-30 12:48:44 -07:00
psc.c	clk: davinci: Fix link errors when not all SoCs are enabled	2018-05-30 12:48:49 -07:00
psc.h	clk: davinci: Fix link errors when not all SoCs are enabled	2018-05-30 12:48:49 -07:00