linux-stable/drivers/clk/tegra
Boris Brezillon 0817b62cc0 clk: change clk_ops' ->determine_rate() prototype
Clock rates are stored in an unsigned long field, but ->determine_rate()
(which returns a rounded rate from a requested one) returns a long
value (errors are reported using negative error codes), which can lead
to long overflow if the clock rate exceed 2Ghz.

Change ->determine_rate() prototype to return 0 or an error code, and pass
a pointer to a clk_rate_request structure containing the expected target
rate and the rate constraints imposed by clk users.

The clk_rate_request structure might be extended in the future to contain
other kind of constraints like the rounding policy, the maximum clock
inaccuracy or other things that are not yet supported by the CCF
(power consumption constraints ?).

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
CC: Jonathan Corbet <corbet@lwn.net>
CC: Tony Lindgren <tony@atomide.com>
CC: Ralf Baechle <ralf@linux-mips.org>
CC: "Emilio López" <emilio@elopez.com.ar>
CC: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
CC: Peter De Schrijver <pdeschrijver@nvidia.com>
CC: Prashant Gaikwad <pgaikwad@nvidia.com>
CC: Stephen Warren <swarren@wwwdotorg.org>
CC: Thierry Reding <thierry.reding@gmail.com>
CC: Alexandre Courbot <gnurou@gmail.com>
CC: linux-doc@vger.kernel.org
CC: linux-kernel@vger.kernel.org
CC: linux-arm-kernel@lists.infradead.org
CC: linux-omap@vger.kernel.org
CC: linux-mips@linux-mips.org
CC: linux-tegra@vger.kernel.org
[sboyd@codeaurora.org: Fix parent dereference problem in
__clk_determine_rate()]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Tested-by: Romain Perier <romain.perier@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[sboyd@codeaurora.org: Folded in fix from Heiko for fixed-rate
clocks without parents or a rate determining op]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-27 18:12:01 -07:00
..
clk-audio-sync.c
clk-divider.c clk: tegra: Implement memory-controller clock 2014-11-26 09:43:23 +01:00
clk-emc.c clk: change clk_ops' ->determine_rate() prototype 2015-07-27 18:12:01 -07:00
clk-id.h clk: tegra: Define PLLD_DSI and remove dsia(b)_mux 2015-02-02 16:22:34 +02:00
clk-periph-gate.c ARM: tegra: Move includes to include/soc/tegra 2014-07-17 13:26:47 +02:00
clk-periph.c clk: Replace explicit clk assignment with __clk_hw_set_clk 2015-02-18 09:40:11 -08:00
clk-pll-out.c
clk-pll.c clk: tegra: Remove needless initializations 2015-04-10 16:04:18 +02:00
clk-super.c clk: tegra: Implement locking for super clock 2013-02-12 10:29:12 -07:00
clk-tegra-audio.c clk: tegra: move audio clk to common file 2013-11-26 18:46:24 +02:00
clk-tegra-fixed.c clk: tegra: Model oscillator as clock 2015-04-10 16:04:20 +02:00
clk-tegra-periph.c clk: tegra: Fix a bunch of sparse warnings 2015-04-10 16:03:41 +02:00
clk-tegra-pmc.c clk: tegra: move PMC, fixed clocks to common files 2013-11-26 18:46:49 +02:00
clk-tegra-super-gen4.c clk: tegra: cclk_lp has a pllx/2 divider 2014-02-17 16:18:28 +02:00
clk-tegra20.c clk: tegra: Implement memory-controller clock 2014-11-26 09:43:23 +01:00
clk-tegra30.c clk: tegra: Fix hda2codec_2x clock name for Tegra30 2015-05-13 15:17:14 +02:00
clk-tegra114.c clk: tegra: Use generic tegra_osc_clk_init() on Tegra114 2015-04-10 16:04:21 +02:00
clk-tegra124.c clk: tegra: Set the EMC clock as the parent of the MC clock 2015-05-13 15:17:12 +02:00
clk.c clk: tegra: Add peripheral registers for bank Y 2015-04-10 16:04:20 +02:00
clk.h clk: tegra: EMC clock driver depends on EMC driver 2015-05-13 15:17:13 +02:00
Kconfig clk: tegra: EMC clock driver depends on EMC driver 2015-05-13 15:17:13 +02:00
Makefile clk: tegra: EMC clock driver depends on EMC driver 2015-05-13 15:17:13 +02:00