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45984f0c70
Fix up inconsistent usage of upper and lowercase letters in "Samsung" and "Exynos" names. "SAMSUNG" and "EXYNOS" are not abbreviations but regular trademarked names. Therefore they should be written with lowercase letters starting with capital letter. The lowercase "Exynos" name is promoted by its manufacturer Samsung Electronics Co., Ltd., in advertisement materials and on website. Although advertisement materials usually use uppercase "SAMSUNG", the lowercase version is used in all legal aspects (e.g. on Wikipedia and in privacy/legal statements on https://www.samsung.com/semiconductor/privacy-global/). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
206 lines
5.4 KiB
C
206 lines
5.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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//
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// Samsung Exynos Flattened Device Tree enabled machine
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//
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// Copyright (c) 2010-2014 Samsung Electronics Co., Ltd.
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// http://www.samsung.com
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_fdt.h>
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#include <linux/platform_device.h>
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#include <linux/irqchip.h>
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#include <linux/soc/samsung/exynos-regs-pmu.h>
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#include <asm/cacheflush.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <mach/map.h>
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#include <plat/cpu.h>
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#include "common.h"
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static struct platform_device exynos_cpuidle = {
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.name = "exynos_cpuidle",
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#ifdef CONFIG_ARM_EXYNOS_CPUIDLE
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.dev.platform_data = exynos_enter_aftr,
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#endif
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.id = -1,
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};
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void __iomem *sysram_base_addr __ro_after_init;
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phys_addr_t sysram_base_phys __ro_after_init;
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void __iomem *sysram_ns_base_addr __ro_after_init;
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void __init exynos_sysram_init(void)
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{
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struct device_node *node;
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for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") {
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if (!of_device_is_available(node))
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continue;
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sysram_base_addr = of_iomap(node, 0);
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sysram_base_phys = of_translate_address(node,
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of_get_address(node, 0, NULL, NULL));
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break;
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}
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for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") {
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if (!of_device_is_available(node))
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continue;
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sysram_ns_base_addr = of_iomap(node, 0);
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break;
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}
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}
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static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
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int depth, void *data)
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{
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struct map_desc iodesc;
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const __be32 *reg;
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int len;
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if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid"))
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return 0;
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reg = of_get_flat_dt_prop(node, "reg", &len);
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if (reg == NULL || len != (sizeof(unsigned long) * 2))
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return 0;
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iodesc.pfn = __phys_to_pfn(be32_to_cpu(reg[0]));
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iodesc.length = be32_to_cpu(reg[1]) - 1;
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iodesc.virtual = (unsigned long)S5P_VA_CHIPID;
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iodesc.type = MT_DEVICE;
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iotable_init(&iodesc, 1);
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return 1;
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}
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static void __init exynos_init_io(void)
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{
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debug_ll_io_init();
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of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
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/* detect cpu id and rev. */
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s5p_init_cpu(S5P_VA_CHIPID);
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}
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/*
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* Set or clear the USE_DELAYED_RESET_ASSERTION option. Used by smp code
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* and suspend.
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*
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* This is necessary only on Exynos4 SoCs. When system is running
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* USE_DELAYED_RESET_ASSERTION should be set so the ARM CLK clock down
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* feature could properly detect global idle state when secondary CPU is
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* powered down.
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*
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* However this should not be set when such system is going into suspend.
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*/
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void exynos_set_delayed_reset_assertion(bool enable)
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{
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if (of_machine_is_compatible("samsung,exynos4")) {
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unsigned int tmp, core_id;
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for (core_id = 0; core_id < num_possible_cpus(); core_id++) {
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tmp = pmu_raw_readl(EXYNOS_ARM_CORE_OPTION(core_id));
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if (enable)
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tmp |= S5P_USE_DELAYED_RESET_ASSERTION;
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else
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tmp &= ~(S5P_USE_DELAYED_RESET_ASSERTION);
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pmu_raw_writel(tmp, EXYNOS_ARM_CORE_OPTION(core_id));
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}
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}
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}
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/*
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* Apparently, these SoCs are not able to wake-up from suspend using
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* the PMU. Too bad. Should they suddenly become capable of such a
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* feat, the matches below should be moved to suspend.c.
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*/
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static const struct of_device_id exynos_dt_pmu_match[] = {
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{ .compatible = "samsung,exynos5260-pmu" },
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{ .compatible = "samsung,exynos5410-pmu" },
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{ /*sentinel*/ },
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};
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static void exynos_map_pmu(void)
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{
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struct device_node *np;
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np = of_find_matching_node(NULL, exynos_dt_pmu_match);
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if (np)
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pmu_base_addr = of_iomap(np, 0);
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}
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static void __init exynos_init_irq(void)
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{
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irqchip_init();
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/*
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* Since platsmp.c needs pmu base address by the time
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* DT is not unflatten so we can't use DT APIs before
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* init_irq
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*/
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exynos_map_pmu();
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}
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static void __init exynos_dt_machine_init(void)
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{
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/*
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* This is called from smp_prepare_cpus if we've built for SMP, but
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* we still need to set it up for PM and firmware ops if not.
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*/
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if (!IS_ENABLED(CONFIG_SMP))
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exynos_sysram_init();
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#if defined(CONFIG_SMP) && defined(CONFIG_ARM_EXYNOS_CPUIDLE)
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if (of_machine_is_compatible("samsung,exynos4210") ||
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of_machine_is_compatible("samsung,exynos3250"))
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exynos_cpuidle.dev.platform_data = &cpuidle_coupled_exynos_data;
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#endif
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if (of_machine_is_compatible("samsung,exynos4210") ||
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(of_machine_is_compatible("samsung,exynos4412") &&
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(of_machine_is_compatible("samsung,trats2") ||
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of_machine_is_compatible("samsung,midas"))) ||
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of_machine_is_compatible("samsung,exynos3250") ||
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of_machine_is_compatible("samsung,exynos5250"))
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platform_device_register(&exynos_cpuidle);
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}
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static char const *const exynos_dt_compat[] __initconst = {
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"samsung,exynos3",
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"samsung,exynos3250",
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"samsung,exynos4",
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"samsung,exynos4210",
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"samsung,exynos4412",
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"samsung,exynos5",
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"samsung,exynos5250",
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"samsung,exynos5260",
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"samsung,exynos5420",
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NULL
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};
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static void __init exynos_dt_fixup(void)
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{
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/*
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* Some versions of uboot pass garbage entries in the memory node,
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* use the old CONFIG_ARM_NR_BANKS
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*/
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of_fdt_limit_memory(8);
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}
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DT_MACHINE_START(EXYNOS_DT, "Samsung Exynos (Flattened Device Tree)")
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.l2c_aux_val = 0x3c400001,
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.l2c_aux_mask = 0xc20fffff,
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.smp = smp_ops(exynos_smp_ops),
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.map_io = exynos_init_io,
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.init_early = exynos_firmware_init,
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.init_irq = exynos_init_irq,
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.init_machine = exynos_dt_machine_init,
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.init_late = exynos_pm_init,
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.dt_compat = exynos_dt_compat,
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.dt_fixup = exynos_dt_fixup,
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MACHINE_END
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