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595 lines
15 KiB
C
595 lines
15 KiB
C
/*
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* i.MX IPUv3 Graphics driver
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*
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* Copyright (C) 2011 Sascha Hauer, Pengutronix
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/component.h>
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#include <linux/module.h>
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#include <linux/export.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <drm/drmP.h>
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#include <drm/drm_crtc_helper.h>
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#include <linux/fb.h>
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#include <linux/clk.h>
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#include <linux/errno.h>
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#include <linux/reservation.h>
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#include <linux/dma-buf.h>
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#include <drm/drm_gem_cma_helper.h>
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#include <drm/drm_fb_cma_helper.h>
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#include <video/imx-ipu-v3.h>
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#include "imx-drm.h"
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#include "ipuv3-plane.h"
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#define DRIVER_DESC "i.MX IPUv3 Graphics"
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enum ipu_flip_status {
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IPU_FLIP_NONE,
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IPU_FLIP_PENDING,
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IPU_FLIP_SUBMITTED,
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};
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struct ipu_flip_work {
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struct work_struct unref_work;
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struct drm_gem_object *bo;
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struct drm_pending_vblank_event *page_flip_event;
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struct work_struct fence_work;
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struct ipu_crtc *crtc;
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struct fence *excl;
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unsigned shared_count;
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struct fence **shared;
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};
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struct ipu_crtc {
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struct device *dev;
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struct drm_crtc base;
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struct imx_drm_crtc *imx_crtc;
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/* plane[0] is the full plane, plane[1] is the partial plane */
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struct ipu_plane *plane[2];
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struct ipu_dc *dc;
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struct ipu_di *di;
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int enabled;
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enum ipu_flip_status flip_state;
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struct workqueue_struct *flip_queue;
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struct ipu_flip_work *flip_work;
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int irq;
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u32 bus_format;
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int di_hsync_pin;
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int di_vsync_pin;
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};
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#define to_ipu_crtc(x) container_of(x, struct ipu_crtc, base)
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static void ipu_fb_enable(struct ipu_crtc *ipu_crtc)
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{
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struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
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if (ipu_crtc->enabled)
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return;
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ipu_dc_enable(ipu);
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ipu_plane_enable(ipu_crtc->plane[0]);
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/* Start DC channel and DI after IDMAC */
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ipu_dc_enable_channel(ipu_crtc->dc);
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ipu_di_enable(ipu_crtc->di);
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drm_crtc_vblank_on(&ipu_crtc->base);
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ipu_crtc->enabled = 1;
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}
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static void ipu_fb_disable(struct ipu_crtc *ipu_crtc)
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{
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struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
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if (!ipu_crtc->enabled)
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return;
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/* Stop DC channel and DI before IDMAC */
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ipu_dc_disable_channel(ipu_crtc->dc);
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ipu_di_disable(ipu_crtc->di);
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ipu_plane_disable(ipu_crtc->plane[0]);
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ipu_dc_disable(ipu);
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drm_crtc_vblank_off(&ipu_crtc->base);
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ipu_crtc->enabled = 0;
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}
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static void ipu_crtc_dpms(struct drm_crtc *crtc, int mode)
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{
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struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
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dev_dbg(ipu_crtc->dev, "%s mode: %d\n", __func__, mode);
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switch (mode) {
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case DRM_MODE_DPMS_ON:
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ipu_fb_enable(ipu_crtc);
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break;
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case DRM_MODE_DPMS_STANDBY:
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case DRM_MODE_DPMS_SUSPEND:
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case DRM_MODE_DPMS_OFF:
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ipu_fb_disable(ipu_crtc);
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break;
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}
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}
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static void ipu_flip_unref_work_func(struct work_struct *__work)
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{
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struct ipu_flip_work *work =
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container_of(__work, struct ipu_flip_work, unref_work);
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drm_gem_object_unreference_unlocked(work->bo);
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kfree(work);
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}
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static void ipu_flip_fence_work_func(struct work_struct *__work)
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{
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struct ipu_flip_work *work =
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container_of(__work, struct ipu_flip_work, fence_work);
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int i;
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/* wait for all fences attached to the FB obj to signal */
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if (work->excl) {
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fence_wait(work->excl, false);
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fence_put(work->excl);
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}
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for (i = 0; i < work->shared_count; i++) {
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fence_wait(work->shared[i], false);
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fence_put(work->shared[i]);
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}
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work->crtc->flip_state = IPU_FLIP_SUBMITTED;
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}
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static int ipu_page_flip(struct drm_crtc *crtc,
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struct drm_framebuffer *fb,
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struct drm_pending_vblank_event *event,
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uint32_t page_flip_flags)
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{
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struct drm_gem_cma_object *cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
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struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
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struct ipu_flip_work *flip_work;
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int ret;
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if (ipu_crtc->flip_state != IPU_FLIP_NONE)
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return -EBUSY;
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ret = imx_drm_crtc_vblank_get(ipu_crtc->imx_crtc);
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if (ret) {
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dev_dbg(ipu_crtc->dev, "failed to acquire vblank counter\n");
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list_del(&event->base.link);
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return ret;
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}
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flip_work = kzalloc(sizeof *flip_work, GFP_KERNEL);
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if (!flip_work) {
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ret = -ENOMEM;
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goto put_vblank;
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}
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INIT_WORK(&flip_work->unref_work, ipu_flip_unref_work_func);
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flip_work->page_flip_event = event;
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/* get BO backing the old framebuffer and take a reference */
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flip_work->bo = &drm_fb_cma_get_gem_obj(crtc->primary->fb, 0)->base;
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drm_gem_object_reference(flip_work->bo);
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ipu_crtc->flip_work = flip_work;
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/*
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* If the object has a DMABUF attached, we need to wait on its fences
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* if there are any.
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*/
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if (cma_obj->base.dma_buf) {
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INIT_WORK(&flip_work->fence_work, ipu_flip_fence_work_func);
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flip_work->crtc = ipu_crtc;
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ret = reservation_object_get_fences_rcu(
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cma_obj->base.dma_buf->resv, &flip_work->excl,
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&flip_work->shared_count, &flip_work->shared);
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if (unlikely(ret)) {
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DRM_ERROR("failed to get fences for buffer\n");
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goto free_flip_work;
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}
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/* No need to queue the worker if the are no fences */
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if (!flip_work->excl && !flip_work->shared_count) {
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ipu_crtc->flip_state = IPU_FLIP_SUBMITTED;
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} else {
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ipu_crtc->flip_state = IPU_FLIP_PENDING;
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queue_work(ipu_crtc->flip_queue,
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&flip_work->fence_work);
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}
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} else {
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ipu_crtc->flip_state = IPU_FLIP_SUBMITTED;
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}
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return 0;
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free_flip_work:
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drm_gem_object_unreference_unlocked(flip_work->bo);
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kfree(flip_work);
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ipu_crtc->flip_work = NULL;
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put_vblank:
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imx_drm_crtc_vblank_put(ipu_crtc->imx_crtc);
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return ret;
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}
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static const struct drm_crtc_funcs ipu_crtc_funcs = {
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.set_config = drm_crtc_helper_set_config,
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.destroy = drm_crtc_cleanup,
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.page_flip = ipu_page_flip,
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};
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static int ipu_crtc_mode_set(struct drm_crtc *crtc,
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struct drm_display_mode *orig_mode,
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struct drm_display_mode *mode,
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int x, int y,
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struct drm_framebuffer *old_fb)
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{
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struct drm_device *dev = crtc->dev;
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struct drm_encoder *encoder;
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struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
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struct ipu_di_signal_cfg sig_cfg = {};
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unsigned long encoder_types = 0;
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int ret;
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dev_dbg(ipu_crtc->dev, "%s: mode->hdisplay: %d\n", __func__,
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mode->hdisplay);
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dev_dbg(ipu_crtc->dev, "%s: mode->vdisplay: %d\n", __func__,
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mode->vdisplay);
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list_for_each_entry(encoder, &dev->mode_config.encoder_list, head)
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if (encoder->crtc == crtc)
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encoder_types |= BIT(encoder->encoder_type);
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dev_dbg(ipu_crtc->dev, "%s: attached to encoder types 0x%lx\n",
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__func__, encoder_types);
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/*
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* If we have DAC or LDB, then we need the IPU DI clock to be
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* the same as the LDB DI clock. For TVDAC, derive the IPU DI
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* clock from 27 MHz TVE_DI clock, but allow to divide it.
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*/
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if (encoder_types & (BIT(DRM_MODE_ENCODER_DAC) |
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BIT(DRM_MODE_ENCODER_LVDS)))
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sig_cfg.clkflags = IPU_DI_CLKMODE_SYNC | IPU_DI_CLKMODE_EXT;
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else if (encoder_types & BIT(DRM_MODE_ENCODER_TVDAC))
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sig_cfg.clkflags = IPU_DI_CLKMODE_EXT;
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else
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sig_cfg.clkflags = 0;
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sig_cfg.enable_pol = 1;
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sig_cfg.clk_pol = 0;
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sig_cfg.bus_format = ipu_crtc->bus_format;
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sig_cfg.v_to_h_sync = 0;
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sig_cfg.hsync_pin = ipu_crtc->di_hsync_pin;
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sig_cfg.vsync_pin = ipu_crtc->di_vsync_pin;
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drm_display_mode_to_videomode(mode, &sig_cfg.mode);
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ret = ipu_dc_init_sync(ipu_crtc->dc, ipu_crtc->di,
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mode->flags & DRM_MODE_FLAG_INTERLACE,
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ipu_crtc->bus_format, mode->hdisplay);
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if (ret) {
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dev_err(ipu_crtc->dev,
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"initializing display controller failed with %d\n",
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ret);
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return ret;
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}
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ret = ipu_di_init_sync_panel(ipu_crtc->di, &sig_cfg);
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if (ret) {
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dev_err(ipu_crtc->dev,
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"initializing panel failed with %d\n", ret);
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return ret;
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}
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return ipu_plane_mode_set(ipu_crtc->plane[0], crtc, mode,
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crtc->primary->fb,
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0, 0, mode->hdisplay, mode->vdisplay,
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x, y, mode->hdisplay, mode->vdisplay,
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mode->flags & DRM_MODE_FLAG_INTERLACE);
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}
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static void ipu_crtc_handle_pageflip(struct ipu_crtc *ipu_crtc)
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{
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unsigned long flags;
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struct drm_device *drm = ipu_crtc->base.dev;
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struct ipu_flip_work *work = ipu_crtc->flip_work;
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spin_lock_irqsave(&drm->event_lock, flags);
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if (work->page_flip_event)
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drm_crtc_send_vblank_event(&ipu_crtc->base,
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work->page_flip_event);
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imx_drm_crtc_vblank_put(ipu_crtc->imx_crtc);
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spin_unlock_irqrestore(&drm->event_lock, flags);
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}
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static irqreturn_t ipu_irq_handler(int irq, void *dev_id)
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{
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struct ipu_crtc *ipu_crtc = dev_id;
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imx_drm_handle_vblank(ipu_crtc->imx_crtc);
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if (ipu_crtc->flip_state == IPU_FLIP_SUBMITTED) {
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struct ipu_plane *plane = ipu_crtc->plane[0];
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ipu_plane_set_base(plane, ipu_crtc->base.primary->fb,
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plane->x, plane->y);
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ipu_crtc_handle_pageflip(ipu_crtc);
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queue_work(ipu_crtc->flip_queue,
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&ipu_crtc->flip_work->unref_work);
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ipu_crtc->flip_state = IPU_FLIP_NONE;
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}
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return IRQ_HANDLED;
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}
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static bool ipu_crtc_mode_fixup(struct drm_crtc *crtc,
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const struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
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struct videomode vm;
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int ret;
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drm_display_mode_to_videomode(adjusted_mode, &vm);
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ret = ipu_di_adjust_videomode(ipu_crtc->di, &vm);
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if (ret)
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return false;
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drm_display_mode_from_videomode(&vm, adjusted_mode);
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return true;
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}
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static void ipu_crtc_prepare(struct drm_crtc *crtc)
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{
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struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
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ipu_fb_disable(ipu_crtc);
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}
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static void ipu_crtc_commit(struct drm_crtc *crtc)
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{
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struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
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ipu_fb_enable(ipu_crtc);
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}
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static const struct drm_crtc_helper_funcs ipu_helper_funcs = {
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.dpms = ipu_crtc_dpms,
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.mode_fixup = ipu_crtc_mode_fixup,
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.mode_set = ipu_crtc_mode_set,
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.prepare = ipu_crtc_prepare,
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.commit = ipu_crtc_commit,
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};
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static int ipu_enable_vblank(struct drm_crtc *crtc)
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{
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struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
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enable_irq(ipu_crtc->irq);
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return 0;
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}
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static void ipu_disable_vblank(struct drm_crtc *crtc)
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{
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struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
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disable_irq_nosync(ipu_crtc->irq);
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}
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static int ipu_set_interface_pix_fmt(struct drm_crtc *crtc,
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u32 bus_format, int hsync_pin, int vsync_pin)
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{
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struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
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ipu_crtc->bus_format = bus_format;
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ipu_crtc->di_hsync_pin = hsync_pin;
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ipu_crtc->di_vsync_pin = vsync_pin;
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return 0;
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}
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static const struct imx_drm_crtc_helper_funcs ipu_crtc_helper_funcs = {
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.enable_vblank = ipu_enable_vblank,
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.disable_vblank = ipu_disable_vblank,
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.set_interface_pix_fmt = ipu_set_interface_pix_fmt,
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.crtc_funcs = &ipu_crtc_funcs,
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.crtc_helper_funcs = &ipu_helper_funcs,
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};
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static void ipu_put_resources(struct ipu_crtc *ipu_crtc)
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{
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if (!IS_ERR_OR_NULL(ipu_crtc->dc))
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ipu_dc_put(ipu_crtc->dc);
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if (!IS_ERR_OR_NULL(ipu_crtc->di))
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ipu_di_put(ipu_crtc->di);
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}
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static int ipu_get_resources(struct ipu_crtc *ipu_crtc,
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struct ipu_client_platformdata *pdata)
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{
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struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
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int ret;
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ipu_crtc->dc = ipu_dc_get(ipu, pdata->dc);
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if (IS_ERR(ipu_crtc->dc)) {
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ret = PTR_ERR(ipu_crtc->dc);
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goto err_out;
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}
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ipu_crtc->di = ipu_di_get(ipu, pdata->di);
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if (IS_ERR(ipu_crtc->di)) {
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ret = PTR_ERR(ipu_crtc->di);
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goto err_out;
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}
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return 0;
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err_out:
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ipu_put_resources(ipu_crtc);
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return ret;
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}
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static int ipu_crtc_init(struct ipu_crtc *ipu_crtc,
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struct ipu_client_platformdata *pdata, struct drm_device *drm)
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{
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struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
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int dp = -EINVAL;
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int ret;
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ret = ipu_get_resources(ipu_crtc, pdata);
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if (ret) {
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dev_err(ipu_crtc->dev, "getting resources failed with %d.\n",
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ret);
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return ret;
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}
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if (pdata->dp >= 0)
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dp = IPU_DP_FLOW_SYNC_BG;
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ipu_crtc->plane[0] = ipu_plane_init(drm, ipu, pdata->dma[0], dp, 0,
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DRM_PLANE_TYPE_PRIMARY);
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if (IS_ERR(ipu_crtc->plane[0])) {
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ret = PTR_ERR(ipu_crtc->plane[0]);
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goto err_put_resources;
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}
|
|
|
|
ret = imx_drm_add_crtc(drm, &ipu_crtc->base, &ipu_crtc->imx_crtc,
|
|
&ipu_crtc->plane[0]->base, &ipu_crtc_helper_funcs,
|
|
ipu_crtc->dev->of_node);
|
|
if (ret) {
|
|
dev_err(ipu_crtc->dev, "adding crtc failed with %d.\n", ret);
|
|
goto err_put_resources;
|
|
}
|
|
|
|
ret = ipu_plane_get_resources(ipu_crtc->plane[0]);
|
|
if (ret) {
|
|
dev_err(ipu_crtc->dev, "getting plane 0 resources failed with %d.\n",
|
|
ret);
|
|
goto err_remove_crtc;
|
|
}
|
|
|
|
/* If this crtc is using the DP, add an overlay plane */
|
|
if (pdata->dp >= 0 && pdata->dma[1] > 0) {
|
|
ipu_crtc->plane[1] = ipu_plane_init(drm, ipu, pdata->dma[1],
|
|
IPU_DP_FLOW_SYNC_FG,
|
|
drm_crtc_mask(&ipu_crtc->base),
|
|
DRM_PLANE_TYPE_OVERLAY);
|
|
if (IS_ERR(ipu_crtc->plane[1]))
|
|
ipu_crtc->plane[1] = NULL;
|
|
}
|
|
|
|
ipu_crtc->irq = ipu_plane_irq(ipu_crtc->plane[0]);
|
|
ret = devm_request_irq(ipu_crtc->dev, ipu_crtc->irq, ipu_irq_handler, 0,
|
|
"imx_drm", ipu_crtc);
|
|
if (ret < 0) {
|
|
dev_err(ipu_crtc->dev, "irq request failed with %d.\n", ret);
|
|
goto err_put_plane_res;
|
|
}
|
|
/* Only enable IRQ when we actually need it to trigger work. */
|
|
disable_irq(ipu_crtc->irq);
|
|
|
|
ipu_crtc->flip_queue = create_singlethread_workqueue("ipu-crtc-flip");
|
|
|
|
return 0;
|
|
|
|
err_put_plane_res:
|
|
ipu_plane_put_resources(ipu_crtc->plane[0]);
|
|
err_remove_crtc:
|
|
imx_drm_remove_crtc(ipu_crtc->imx_crtc);
|
|
err_put_resources:
|
|
ipu_put_resources(ipu_crtc);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int ipu_drm_bind(struct device *dev, struct device *master, void *data)
|
|
{
|
|
struct ipu_client_platformdata *pdata = dev->platform_data;
|
|
struct drm_device *drm = data;
|
|
struct ipu_crtc *ipu_crtc;
|
|
int ret;
|
|
|
|
ipu_crtc = devm_kzalloc(dev, sizeof(*ipu_crtc), GFP_KERNEL);
|
|
if (!ipu_crtc)
|
|
return -ENOMEM;
|
|
|
|
ipu_crtc->dev = dev;
|
|
|
|
ret = ipu_crtc_init(ipu_crtc, pdata, drm);
|
|
if (ret)
|
|
return ret;
|
|
|
|
dev_set_drvdata(dev, ipu_crtc);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void ipu_drm_unbind(struct device *dev, struct device *master,
|
|
void *data)
|
|
{
|
|
struct ipu_crtc *ipu_crtc = dev_get_drvdata(dev);
|
|
|
|
imx_drm_remove_crtc(ipu_crtc->imx_crtc);
|
|
|
|
destroy_workqueue(ipu_crtc->flip_queue);
|
|
ipu_plane_put_resources(ipu_crtc->plane[0]);
|
|
ipu_put_resources(ipu_crtc);
|
|
}
|
|
|
|
static const struct component_ops ipu_crtc_ops = {
|
|
.bind = ipu_drm_bind,
|
|
.unbind = ipu_drm_unbind,
|
|
};
|
|
|
|
static int ipu_drm_probe(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
int ret;
|
|
|
|
if (!dev->platform_data)
|
|
return -EINVAL;
|
|
|
|
ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
|
|
if (ret)
|
|
return ret;
|
|
|
|
return component_add(dev, &ipu_crtc_ops);
|
|
}
|
|
|
|
static int ipu_drm_remove(struct platform_device *pdev)
|
|
{
|
|
component_del(&pdev->dev, &ipu_crtc_ops);
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver ipu_drm_driver = {
|
|
.driver = {
|
|
.name = "imx-ipuv3-crtc",
|
|
},
|
|
.probe = ipu_drm_probe,
|
|
.remove = ipu_drm_remove,
|
|
};
|
|
module_platform_driver(ipu_drm_driver);
|
|
|
|
MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
|
|
MODULE_DESCRIPTION(DRIVER_DESC);
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_ALIAS("platform:imx-ipuv3-crtc");
|