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![Mark Yao](/assets/img/avatar_default.png)
There are two version scale control register found on vop, scale full version found on rk3288, support extension registers. and scale little version found on rk3036, only support common scale. Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
309 lines
7 KiB
C
309 lines
7 KiB
C
/*
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* Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
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* Author:Mark Yao <mark.yao@rock-chips.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _ROCKCHIP_DRM_VOP_H
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#define _ROCKCHIP_DRM_VOP_H
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enum vop_data_format {
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VOP_FMT_ARGB8888 = 0,
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VOP_FMT_RGB888,
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VOP_FMT_RGB565,
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VOP_FMT_YUV420SP = 4,
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VOP_FMT_YUV422SP,
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VOP_FMT_YUV444SP,
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};
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struct vop_reg_data {
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uint32_t offset;
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uint32_t value;
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};
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struct vop_reg {
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uint32_t offset;
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uint32_t shift;
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uint32_t mask;
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};
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struct vop_ctrl {
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struct vop_reg standby;
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struct vop_reg data_blank;
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struct vop_reg gate_en;
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struct vop_reg mmu_en;
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struct vop_reg rgb_en;
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struct vop_reg edp_en;
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struct vop_reg hdmi_en;
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struct vop_reg mipi_en;
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struct vop_reg out_mode;
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struct vop_reg dither_down;
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struct vop_reg dither_up;
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struct vop_reg pin_pol;
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struct vop_reg htotal_pw;
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struct vop_reg hact_st_end;
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struct vop_reg vtotal_pw;
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struct vop_reg vact_st_end;
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struct vop_reg hpost_st_end;
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struct vop_reg vpost_st_end;
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struct vop_reg cfg_done;
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};
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struct vop_intr {
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const int *intrs;
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uint32_t nintrs;
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struct vop_reg enable;
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struct vop_reg clear;
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struct vop_reg status;
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};
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struct vop_scl_extension {
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struct vop_reg cbcr_vsd_mode;
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struct vop_reg cbcr_vsu_mode;
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struct vop_reg cbcr_hsd_mode;
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struct vop_reg cbcr_ver_scl_mode;
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struct vop_reg cbcr_hor_scl_mode;
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struct vop_reg yrgb_vsd_mode;
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struct vop_reg yrgb_vsu_mode;
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struct vop_reg yrgb_hsd_mode;
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struct vop_reg yrgb_ver_scl_mode;
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struct vop_reg yrgb_hor_scl_mode;
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struct vop_reg line_load_mode;
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struct vop_reg cbcr_axi_gather_num;
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struct vop_reg yrgb_axi_gather_num;
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struct vop_reg vsd_cbcr_gt2;
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struct vop_reg vsd_cbcr_gt4;
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struct vop_reg vsd_yrgb_gt2;
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struct vop_reg vsd_yrgb_gt4;
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struct vop_reg bic_coe_sel;
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struct vop_reg cbcr_axi_gather_en;
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struct vop_reg yrgb_axi_gather_en;
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struct vop_reg lb_mode;
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};
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struct vop_scl_regs {
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const struct vop_scl_extension *ext;
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struct vop_reg scale_yrgb_x;
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struct vop_reg scale_yrgb_y;
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struct vop_reg scale_cbcr_x;
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struct vop_reg scale_cbcr_y;
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};
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struct vop_win_phy {
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const struct vop_scl_regs *scl;
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const uint32_t *data_formats;
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uint32_t nformats;
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struct vop_reg enable;
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struct vop_reg format;
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struct vop_reg rb_swap;
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struct vop_reg act_info;
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struct vop_reg dsp_info;
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struct vop_reg dsp_st;
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struct vop_reg yrgb_mst;
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struct vop_reg uv_mst;
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struct vop_reg yrgb_vir;
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struct vop_reg uv_vir;
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struct vop_reg dst_alpha_ctl;
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struct vop_reg src_alpha_ctl;
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};
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struct vop_win_data {
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uint32_t base;
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const struct vop_win_phy *phy;
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enum drm_plane_type type;
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};
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struct vop_data {
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const struct vop_reg_data *init_table;
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unsigned int table_size;
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const struct vop_ctrl *ctrl;
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const struct vop_intr *intr;
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const struct vop_win_data *win;
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unsigned int win_size;
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};
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/* interrupt define */
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#define DSP_HOLD_VALID_INTR (1 << 0)
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#define FS_INTR (1 << 1)
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#define LINE_FLAG_INTR (1 << 2)
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#define BUS_ERROR_INTR (1 << 3)
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#define INTR_MASK (DSP_HOLD_VALID_INTR | FS_INTR | \
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LINE_FLAG_INTR | BUS_ERROR_INTR)
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#define DSP_HOLD_VALID_INTR_EN(x) ((x) << 4)
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#define FS_INTR_EN(x) ((x) << 5)
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#define LINE_FLAG_INTR_EN(x) ((x) << 6)
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#define BUS_ERROR_INTR_EN(x) ((x) << 7)
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#define DSP_HOLD_VALID_INTR_MASK (1 << 4)
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#define FS_INTR_MASK (1 << 5)
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#define LINE_FLAG_INTR_MASK (1 << 6)
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#define BUS_ERROR_INTR_MASK (1 << 7)
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#define INTR_CLR_SHIFT 8
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#define DSP_HOLD_VALID_INTR_CLR (1 << (INTR_CLR_SHIFT + 0))
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#define FS_INTR_CLR (1 << (INTR_CLR_SHIFT + 1))
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#define LINE_FLAG_INTR_CLR (1 << (INTR_CLR_SHIFT + 2))
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#define BUS_ERROR_INTR_CLR (1 << (INTR_CLR_SHIFT + 3))
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#define DSP_LINE_NUM(x) (((x) & 0x1fff) << 12)
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#define DSP_LINE_NUM_MASK (0x1fff << 12)
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/* src alpha ctrl define */
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#define SRC_FADING_VALUE(x) (((x) & 0xff) << 24)
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#define SRC_GLOBAL_ALPHA(x) (((x) & 0xff) << 16)
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#define SRC_FACTOR_M0(x) (((x) & 0x7) << 6)
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#define SRC_ALPHA_CAL_M0(x) (((x) & 0x1) << 5)
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#define SRC_BLEND_M0(x) (((x) & 0x3) << 3)
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#define SRC_ALPHA_M0(x) (((x) & 0x1) << 2)
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#define SRC_COLOR_M0(x) (((x) & 0x1) << 1)
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#define SRC_ALPHA_EN(x) (((x) & 0x1) << 0)
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/* dst alpha ctrl define */
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#define DST_FACTOR_M0(x) (((x) & 0x7) << 6)
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/*
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* display output interface supported by rockchip lcdc
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*/
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#define ROCKCHIP_OUT_MODE_P888 0
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#define ROCKCHIP_OUT_MODE_P666 1
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#define ROCKCHIP_OUT_MODE_P565 2
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/* for use special outface */
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#define ROCKCHIP_OUT_MODE_AAAA 15
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enum alpha_mode {
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ALPHA_STRAIGHT,
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ALPHA_INVERSE,
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};
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enum global_blend_mode {
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ALPHA_GLOBAL,
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ALPHA_PER_PIX,
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ALPHA_PER_PIX_GLOBAL,
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};
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enum alpha_cal_mode {
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ALPHA_SATURATION,
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ALPHA_NO_SATURATION,
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};
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enum color_mode {
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ALPHA_SRC_PRE_MUL,
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ALPHA_SRC_NO_PRE_MUL,
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};
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enum factor_mode {
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ALPHA_ZERO,
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ALPHA_ONE,
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ALPHA_SRC,
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ALPHA_SRC_INVERSE,
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ALPHA_SRC_GLOBAL,
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};
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enum scale_mode {
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SCALE_NONE = 0x0,
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SCALE_UP = 0x1,
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SCALE_DOWN = 0x2
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};
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enum lb_mode {
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LB_YUV_3840X5 = 0x0,
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LB_YUV_2560X8 = 0x1,
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LB_RGB_3840X2 = 0x2,
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LB_RGB_2560X4 = 0x3,
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LB_RGB_1920X5 = 0x4,
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LB_RGB_1280X8 = 0x5
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};
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enum sacle_up_mode {
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SCALE_UP_BIL = 0x0,
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SCALE_UP_BIC = 0x1
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};
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enum scale_down_mode {
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SCALE_DOWN_BIL = 0x0,
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SCALE_DOWN_AVG = 0x1
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};
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#define FRAC_16_16(mult, div) (((mult) << 16) / (div))
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#define SCL_FT_DEFAULT_FIXPOINT_SHIFT 12
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#define SCL_MAX_VSKIPLINES 4
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#define MIN_SCL_FT_AFTER_VSKIP 1
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static inline uint16_t scl_cal_scale(int src, int dst, int shift)
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{
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return ((src * 2 - 3) << (shift - 1)) / (dst - 1);
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}
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static inline uint16_t scl_cal_scale2(int src, int dst)
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{
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return ((src - 1) << 12) / (dst - 1);
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}
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#define GET_SCL_FT_BILI_DN(src, dst) scl_cal_scale(src, dst, 12)
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#define GET_SCL_FT_BILI_UP(src, dst) scl_cal_scale(src, dst, 16)
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#define GET_SCL_FT_BIC(src, dst) scl_cal_scale(src, dst, 16)
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static inline uint16_t scl_get_bili_dn_vskip(int src_h, int dst_h,
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int vskiplines)
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{
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int act_height;
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act_height = (src_h + vskiplines - 1) / vskiplines;
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return GET_SCL_FT_BILI_DN(act_height, dst_h);
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}
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static inline enum scale_mode scl_get_scl_mode(int src, int dst)
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{
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if (src < dst)
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return SCALE_UP;
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else if (src > dst)
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return SCALE_DOWN;
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return SCALE_NONE;
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}
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static inline int scl_get_vskiplines(uint32_t srch, uint32_t dsth)
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{
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uint32_t vskiplines;
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for (vskiplines = SCL_MAX_VSKIPLINES; vskiplines > 1; vskiplines /= 2)
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if (srch >= vskiplines * dsth * MIN_SCL_FT_AFTER_VSKIP)
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break;
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return vskiplines;
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}
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static inline int scl_vop_cal_lb_mode(int width, bool is_yuv)
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{
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int lb_mode;
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if (width > 2560)
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lb_mode = LB_RGB_3840X2;
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else if (width > 1920)
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lb_mode = LB_RGB_2560X4;
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else if (!is_yuv)
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lb_mode = LB_RGB_1920X5;
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else if (width > 1280)
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lb_mode = LB_YUV_3840X5;
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else
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lb_mode = LB_YUV_2560X8;
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return lb_mode;
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}
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extern const struct component_ops vop_component_ops;
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#endif /* _ROCKCHIP_DRM_VOP_H */
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