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![Gustavo A. R. Silva](/assets/img/avatar_default.png)
The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to declare
variable-length types such as these ones is a flexible array member[1][2],
introduced in C99:
struct foo {
int stuff;
struct boo array[];
};
By making use of the mechanism above, we will get a compiler warning
in case the flexible array does not occur last in the structure, which
will help us prevent some kind of undefined behavior bugs from being
inadvertently introduced[3] to the codebase from now on.
Also, notice that, dynamic memory allocations won't be affected by
this change:
"Flexible array members have incomplete type, and so the sizeof operator
may not be applied. As a quirk of the original implementation of
zero-length arrays, sizeof evaluates to zero."[1]
This issue was found with the help of Coccinelle.
[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
[2] https://github.com/KSPP/linux/issues/21
[3] commit 7649773293
("cxgb3/l2t: Fix undefined behaviour")
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
504 lines
13 KiB
C
504 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Driver for ISSI IS31FL32xx family of I2C LED controllers
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*
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* Copyright 2015 Allworx Corp.
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*
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* Datasheets:
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* http://www.issi.com/US/product-analog-fxled-driver.shtml
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* http://www.si-en.com/product.asp?parentid=890
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*/
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#include <linux/device.h>
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#include <linux/i2c.h>
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#include <linux/kernel.h>
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#include <linux/leds.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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/* Used to indicate a device has no such register */
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#define IS31FL32XX_REG_NONE 0xFF
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/* Software Shutdown bit in Shutdown Register */
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#define IS31FL32XX_SHUTDOWN_SSD_ENABLE 0
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#define IS31FL32XX_SHUTDOWN_SSD_DISABLE BIT(0)
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/* IS31FL3216 has a number of unique registers */
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#define IS31FL3216_CONFIG_REG 0x00
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#define IS31FL3216_LIGHTING_EFFECT_REG 0x03
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#define IS31FL3216_CHANNEL_CONFIG_REG 0x04
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/* Software Shutdown bit in 3216 Config Register */
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#define IS31FL3216_CONFIG_SSD_ENABLE BIT(7)
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#define IS31FL3216_CONFIG_SSD_DISABLE 0
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struct is31fl32xx_priv;
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struct is31fl32xx_led_data {
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struct led_classdev cdev;
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u8 channel; /* 1-based, max priv->cdef->channels */
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struct is31fl32xx_priv *priv;
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};
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struct is31fl32xx_priv {
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const struct is31fl32xx_chipdef *cdef;
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struct i2c_client *client;
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unsigned int num_leds;
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struct is31fl32xx_led_data leds[];
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};
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/**
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* struct is31fl32xx_chipdef - chip-specific attributes
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* @channels : Number of LED channels
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* @shutdown_reg : address of Shutdown register (optional)
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* @pwm_update_reg : address of PWM Update register
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* @global_control_reg : address of Global Control register (optional)
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* @reset_reg : address of Reset register (optional)
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* @pwm_register_base : address of first PWM register
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* @pwm_registers_reversed: : true if PWM registers count down instead of up
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* @led_control_register_base : address of first LED control register (optional)
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* @enable_bits_per_led_control_register: number of LEDs enable bits in each
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* @reset_func: : pointer to reset function
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*
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* For all optional register addresses, the sentinel value %IS31FL32XX_REG_NONE
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* indicates that this chip has no such register.
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*
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* If non-NULL, @reset_func will be called during probing to set all
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* necessary registers to a known initialization state. This is needed
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* for chips that do not have a @reset_reg.
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*
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* @enable_bits_per_led_control_register must be >=1 if
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* @led_control_register_base != %IS31FL32XX_REG_NONE.
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*/
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struct is31fl32xx_chipdef {
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u8 channels;
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u8 shutdown_reg;
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u8 pwm_update_reg;
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u8 global_control_reg;
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u8 reset_reg;
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u8 pwm_register_base;
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bool pwm_registers_reversed;
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u8 led_control_register_base;
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u8 enable_bits_per_led_control_register;
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int (*reset_func)(struct is31fl32xx_priv *priv);
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int (*sw_shutdown_func)(struct is31fl32xx_priv *priv, bool enable);
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};
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static const struct is31fl32xx_chipdef is31fl3236_cdef = {
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.channels = 36,
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.shutdown_reg = 0x00,
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.pwm_update_reg = 0x25,
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.global_control_reg = 0x4a,
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.reset_reg = 0x4f,
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.pwm_register_base = 0x01,
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.led_control_register_base = 0x26,
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.enable_bits_per_led_control_register = 1,
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};
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static const struct is31fl32xx_chipdef is31fl3235_cdef = {
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.channels = 28,
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.shutdown_reg = 0x00,
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.pwm_update_reg = 0x25,
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.global_control_reg = 0x4a,
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.reset_reg = 0x4f,
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.pwm_register_base = 0x05,
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.led_control_register_base = 0x2a,
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.enable_bits_per_led_control_register = 1,
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};
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static const struct is31fl32xx_chipdef is31fl3218_cdef = {
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.channels = 18,
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.shutdown_reg = 0x00,
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.pwm_update_reg = 0x16,
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.global_control_reg = IS31FL32XX_REG_NONE,
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.reset_reg = 0x17,
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.pwm_register_base = 0x01,
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.led_control_register_base = 0x13,
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.enable_bits_per_led_control_register = 6,
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};
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static int is31fl3216_reset(struct is31fl32xx_priv *priv);
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static int is31fl3216_software_shutdown(struct is31fl32xx_priv *priv,
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bool enable);
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static const struct is31fl32xx_chipdef is31fl3216_cdef = {
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.channels = 16,
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.shutdown_reg = IS31FL32XX_REG_NONE,
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.pwm_update_reg = 0xB0,
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.global_control_reg = IS31FL32XX_REG_NONE,
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.reset_reg = IS31FL32XX_REG_NONE,
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.pwm_register_base = 0x10,
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.pwm_registers_reversed = true,
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.led_control_register_base = 0x01,
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.enable_bits_per_led_control_register = 8,
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.reset_func = is31fl3216_reset,
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.sw_shutdown_func = is31fl3216_software_shutdown,
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};
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static int is31fl32xx_write(struct is31fl32xx_priv *priv, u8 reg, u8 val)
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{
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int ret;
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dev_dbg(&priv->client->dev, "writing register 0x%02X=0x%02X", reg, val);
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ret = i2c_smbus_write_byte_data(priv->client, reg, val);
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if (ret) {
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dev_err(&priv->client->dev,
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"register write to 0x%02X failed (error %d)",
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reg, ret);
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}
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return ret;
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}
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/*
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* Custom reset function for IS31FL3216 because it does not have a RESET
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* register the way that the other IS31FL32xx chips do. We don't bother
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* writing the GPIO and animation registers, because the registers we
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* do write ensure those will have no effect.
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*/
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static int is31fl3216_reset(struct is31fl32xx_priv *priv)
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{
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unsigned int i;
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int ret;
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ret = is31fl32xx_write(priv, IS31FL3216_CONFIG_REG,
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IS31FL3216_CONFIG_SSD_ENABLE);
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if (ret)
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return ret;
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for (i = 0; i < priv->cdef->channels; i++) {
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ret = is31fl32xx_write(priv, priv->cdef->pwm_register_base+i,
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0x00);
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if (ret)
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return ret;
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}
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ret = is31fl32xx_write(priv, priv->cdef->pwm_update_reg, 0);
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if (ret)
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return ret;
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ret = is31fl32xx_write(priv, IS31FL3216_LIGHTING_EFFECT_REG, 0x00);
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if (ret)
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return ret;
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ret = is31fl32xx_write(priv, IS31FL3216_CHANNEL_CONFIG_REG, 0x00);
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if (ret)
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return ret;
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return 0;
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}
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/*
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* Custom Software-Shutdown function for IS31FL3216 because it does not have
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* a SHUTDOWN register the way that the other IS31FL32xx chips do.
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* We don't bother doing a read/modify/write on the CONFIG register because
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* we only ever use a value of '0' for the other fields in that register.
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*/
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static int is31fl3216_software_shutdown(struct is31fl32xx_priv *priv,
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bool enable)
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{
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u8 value = enable ? IS31FL3216_CONFIG_SSD_ENABLE :
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IS31FL3216_CONFIG_SSD_DISABLE;
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return is31fl32xx_write(priv, IS31FL3216_CONFIG_REG, value);
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}
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/*
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* NOTE: A mutex is not needed in this function because:
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* - All referenced data is read-only after probe()
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* - The I2C core has a mutex on to protect the bus
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* - There are no read/modify/write operations
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* - Intervening operations between the write of the PWM register
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* and the Update register are harmless.
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*
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* Example:
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* PWM_REG_1 write 16
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* UPDATE_REG write 0
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* PWM_REG_2 write 128
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* UPDATE_REG write 0
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* vs:
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* PWM_REG_1 write 16
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* PWM_REG_2 write 128
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* UPDATE_REG write 0
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* UPDATE_REG write 0
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* are equivalent. Poking the Update register merely applies all PWM
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* register writes up to that point.
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*/
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static int is31fl32xx_brightness_set(struct led_classdev *led_cdev,
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enum led_brightness brightness)
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{
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const struct is31fl32xx_led_data *led_data =
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container_of(led_cdev, struct is31fl32xx_led_data, cdev);
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const struct is31fl32xx_chipdef *cdef = led_data->priv->cdef;
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u8 pwm_register_offset;
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int ret;
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dev_dbg(led_cdev->dev, "%s: %d\n", __func__, brightness);
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/* NOTE: led_data->channel is 1-based */
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if (cdef->pwm_registers_reversed)
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pwm_register_offset = cdef->channels - led_data->channel;
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else
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pwm_register_offset = led_data->channel - 1;
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ret = is31fl32xx_write(led_data->priv,
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cdef->pwm_register_base + pwm_register_offset,
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brightness);
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if (ret)
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return ret;
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return is31fl32xx_write(led_data->priv, cdef->pwm_update_reg, 0);
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}
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static int is31fl32xx_reset_regs(struct is31fl32xx_priv *priv)
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{
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const struct is31fl32xx_chipdef *cdef = priv->cdef;
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int ret;
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if (cdef->reset_reg != IS31FL32XX_REG_NONE) {
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ret = is31fl32xx_write(priv, cdef->reset_reg, 0);
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if (ret)
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return ret;
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}
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if (cdef->reset_func)
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return cdef->reset_func(priv);
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return 0;
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}
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static int is31fl32xx_software_shutdown(struct is31fl32xx_priv *priv,
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bool enable)
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{
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const struct is31fl32xx_chipdef *cdef = priv->cdef;
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int ret;
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if (cdef->shutdown_reg != IS31FL32XX_REG_NONE) {
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u8 value = enable ? IS31FL32XX_SHUTDOWN_SSD_ENABLE :
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IS31FL32XX_SHUTDOWN_SSD_DISABLE;
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ret = is31fl32xx_write(priv, cdef->shutdown_reg, value);
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if (ret)
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return ret;
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}
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if (cdef->sw_shutdown_func)
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return cdef->sw_shutdown_func(priv, enable);
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return 0;
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}
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static int is31fl32xx_init_regs(struct is31fl32xx_priv *priv)
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{
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const struct is31fl32xx_chipdef *cdef = priv->cdef;
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int ret;
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ret = is31fl32xx_reset_regs(priv);
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if (ret)
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return ret;
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/*
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* Set enable bit for all channels.
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* We will control state with PWM registers alone.
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*/
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if (cdef->led_control_register_base != IS31FL32XX_REG_NONE) {
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u8 value =
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GENMASK(cdef->enable_bits_per_led_control_register-1, 0);
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u8 num_regs = cdef->channels /
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cdef->enable_bits_per_led_control_register;
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int i;
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for (i = 0; i < num_regs; i++) {
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ret = is31fl32xx_write(priv,
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cdef->led_control_register_base+i,
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value);
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if (ret)
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return ret;
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}
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}
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ret = is31fl32xx_software_shutdown(priv, false);
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if (ret)
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return ret;
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if (cdef->global_control_reg != IS31FL32XX_REG_NONE) {
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ret = is31fl32xx_write(priv, cdef->global_control_reg, 0x00);
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if (ret)
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return ret;
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}
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return 0;
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}
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static int is31fl32xx_parse_child_dt(const struct device *dev,
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const struct device_node *child,
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struct is31fl32xx_led_data *led_data)
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{
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struct led_classdev *cdev = &led_data->cdev;
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int ret = 0;
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u32 reg;
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if (of_property_read_string(child, "label", &cdev->name))
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cdev->name = child->name;
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ret = of_property_read_u32(child, "reg", ®);
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if (ret || reg < 1 || reg > led_data->priv->cdef->channels) {
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dev_err(dev,
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"Child node %pOF does not have a valid reg property\n",
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child);
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return -EINVAL;
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}
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led_data->channel = reg;
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of_property_read_string(child, "linux,default-trigger",
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&cdev->default_trigger);
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cdev->brightness_set_blocking = is31fl32xx_brightness_set;
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return 0;
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}
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static struct is31fl32xx_led_data *is31fl32xx_find_led_data(
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struct is31fl32xx_priv *priv,
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u8 channel)
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{
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size_t i;
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for (i = 0; i < priv->num_leds; i++) {
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if (priv->leds[i].channel == channel)
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return &priv->leds[i];
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}
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return NULL;
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}
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static int is31fl32xx_parse_dt(struct device *dev,
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struct is31fl32xx_priv *priv)
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{
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struct device_node *child;
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int ret = 0;
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for_each_child_of_node(dev->of_node, child) {
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struct is31fl32xx_led_data *led_data =
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&priv->leds[priv->num_leds];
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const struct is31fl32xx_led_data *other_led_data;
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led_data->priv = priv;
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ret = is31fl32xx_parse_child_dt(dev, child, led_data);
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if (ret)
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goto err;
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/* Detect if channel is already in use by another child */
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other_led_data = is31fl32xx_find_led_data(priv,
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led_data->channel);
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if (other_led_data) {
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dev_err(dev,
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"%s and %s both attempting to use channel %d\n",
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led_data->cdev.name,
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other_led_data->cdev.name,
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led_data->channel);
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goto err;
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}
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ret = devm_led_classdev_register(dev, &led_data->cdev);
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if (ret) {
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dev_err(dev, "failed to register PWM led for %s: %d\n",
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led_data->cdev.name, ret);
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goto err;
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}
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priv->num_leds++;
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}
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return 0;
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err:
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of_node_put(child);
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return ret;
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}
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static const struct of_device_id of_is31fl32xx_match[] = {
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{ .compatible = "issi,is31fl3236", .data = &is31fl3236_cdef, },
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{ .compatible = "issi,is31fl3235", .data = &is31fl3235_cdef, },
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{ .compatible = "issi,is31fl3218", .data = &is31fl3218_cdef, },
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{ .compatible = "si-en,sn3218", .data = &is31fl3218_cdef, },
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{ .compatible = "issi,is31fl3216", .data = &is31fl3216_cdef, },
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{ .compatible = "si-en,sn3216", .data = &is31fl3216_cdef, },
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{},
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};
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MODULE_DEVICE_TABLE(of, of_is31fl32xx_match);
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static int is31fl32xx_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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{
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const struct is31fl32xx_chipdef *cdef;
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const struct of_device_id *of_dev_id;
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struct device *dev = &client->dev;
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struct is31fl32xx_priv *priv;
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int count;
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int ret = 0;
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of_dev_id = of_match_device(of_is31fl32xx_match, dev);
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if (!of_dev_id)
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return -EINVAL;
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cdef = of_dev_id->data;
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count = of_get_child_count(dev->of_node);
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if (!count)
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return -EINVAL;
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priv = devm_kzalloc(dev, struct_size(priv, leds, count),
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GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->client = client;
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priv->cdef = cdef;
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i2c_set_clientdata(client, priv);
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ret = is31fl32xx_init_regs(priv);
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if (ret)
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return ret;
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ret = is31fl32xx_parse_dt(dev, priv);
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if (ret)
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return ret;
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return 0;
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}
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static int is31fl32xx_remove(struct i2c_client *client)
|
|
{
|
|
struct is31fl32xx_priv *priv = i2c_get_clientdata(client);
|
|
|
|
return is31fl32xx_reset_regs(priv);
|
|
}
|
|
|
|
/*
|
|
* i2c-core (and modalias) requires that id_table be properly filled,
|
|
* even though it is not used for DeviceTree based instantiation.
|
|
*/
|
|
static const struct i2c_device_id is31fl32xx_id[] = {
|
|
{ "is31fl3236" },
|
|
{ "is31fl3235" },
|
|
{ "is31fl3218" },
|
|
{ "sn3218" },
|
|
{ "is31fl3216" },
|
|
{ "sn3216" },
|
|
{},
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(i2c, is31fl32xx_id);
|
|
|
|
static struct i2c_driver is31fl32xx_driver = {
|
|
.driver = {
|
|
.name = "is31fl32xx",
|
|
.of_match_table = of_is31fl32xx_match,
|
|
},
|
|
.probe = is31fl32xx_probe,
|
|
.remove = is31fl32xx_remove,
|
|
.id_table = is31fl32xx_id,
|
|
};
|
|
|
|
module_i2c_driver(is31fl32xx_driver);
|
|
|
|
MODULE_AUTHOR("David Rivshin <drivshin@allworx.com>");
|
|
MODULE_DESCRIPTION("ISSI IS31FL32xx LED driver");
|
|
MODULE_LICENSE("GPL v2");
|