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![Wolfram Sang](/assets/img/avatar_default.png)
I was about to simplify the call to i2c_unregister_device() when I realized that converting to devm_i2c_new_dummy_device() will simplify the driver a lot. So I took this approach. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20190830133124.21633-2-wsa+renesas@sang-engineering.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
844 lines
21 KiB
C
844 lines
21 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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//
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// RTC driver for Maxim MAX77686 and MAX77802
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//
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// Copyright (C) 2012 Samsung Electronics Co.Ltd
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//
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// based on rtc-max8997.c
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#include <linux/i2c.h>
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#include <linux/slab.h>
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#include <linux/rtc.h>
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#include <linux/delay.h>
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#include <linux/mutex.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/mfd/max77686-private.h>
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#include <linux/irqdomain.h>
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#include <linux/regmap.h>
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#define MAX77686_I2C_ADDR_RTC (0x0C >> 1)
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#define MAX77620_I2C_ADDR_RTC 0x68
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#define MAX77686_INVALID_I2C_ADDR (-1)
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/* Define non existing register */
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#define MAX77686_INVALID_REG (-1)
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/* RTC Control Register */
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#define BCD_EN_SHIFT 0
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#define BCD_EN_MASK BIT(BCD_EN_SHIFT)
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#define MODEL24_SHIFT 1
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#define MODEL24_MASK BIT(MODEL24_SHIFT)
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/* RTC Update Register1 */
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#define RTC_UDR_SHIFT 0
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#define RTC_UDR_MASK BIT(RTC_UDR_SHIFT)
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#define RTC_RBUDR_SHIFT 4
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#define RTC_RBUDR_MASK BIT(RTC_RBUDR_SHIFT)
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/* RTC Hour register */
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#define HOUR_PM_SHIFT 6
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#define HOUR_PM_MASK BIT(HOUR_PM_SHIFT)
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/* RTC Alarm Enable */
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#define ALARM_ENABLE_SHIFT 7
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#define ALARM_ENABLE_MASK BIT(ALARM_ENABLE_SHIFT)
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#define REG_RTC_NONE 0xdeadbeef
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/*
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* MAX77802 has separate register (RTCAE1) for alarm enable instead
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* using 1 bit from registers RTC{SEC,MIN,HOUR,DAY,MONTH,YEAR,DATE}
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* as in done in MAX77686.
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*/
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#define MAX77802_ALARM_ENABLE_VALUE 0x77
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enum {
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RTC_SEC = 0,
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RTC_MIN,
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RTC_HOUR,
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RTC_WEEKDAY,
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RTC_MONTH,
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RTC_YEAR,
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RTC_DATE,
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RTC_NR_TIME
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};
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struct max77686_rtc_driver_data {
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/* Minimum usecs needed for a RTC update */
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unsigned long delay;
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/* Mask used to read RTC registers value */
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u8 mask;
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/* Registers offset to I2C addresses map */
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const unsigned int *map;
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/* Has a separate alarm enable register? */
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bool alarm_enable_reg;
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/* I2C address for RTC block */
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int rtc_i2c_addr;
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/* RTC interrupt via platform resource */
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bool rtc_irq_from_platform;
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/* Pending alarm status register */
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int alarm_pending_status_reg;
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/* RTC IRQ CHIP for regmap */
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const struct regmap_irq_chip *rtc_irq_chip;
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};
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struct max77686_rtc_info {
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struct device *dev;
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struct i2c_client *rtc;
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struct rtc_device *rtc_dev;
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struct mutex lock;
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struct regmap *regmap;
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struct regmap *rtc_regmap;
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const struct max77686_rtc_driver_data *drv_data;
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struct regmap_irq_chip_data *rtc_irq_data;
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int rtc_irq;
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int virq;
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int rtc_24hr_mode;
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};
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enum MAX77686_RTC_OP {
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MAX77686_RTC_WRITE,
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MAX77686_RTC_READ,
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};
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/* These are not registers but just offsets that are mapped to addresses */
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enum max77686_rtc_reg_offset {
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REG_RTC_CONTROLM = 0,
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REG_RTC_CONTROL,
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REG_RTC_UPDATE0,
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REG_WTSR_SMPL_CNTL,
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REG_RTC_SEC,
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REG_RTC_MIN,
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REG_RTC_HOUR,
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REG_RTC_WEEKDAY,
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REG_RTC_MONTH,
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REG_RTC_YEAR,
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REG_RTC_DATE,
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REG_ALARM1_SEC,
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REG_ALARM1_MIN,
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REG_ALARM1_HOUR,
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REG_ALARM1_WEEKDAY,
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REG_ALARM1_MONTH,
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REG_ALARM1_YEAR,
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REG_ALARM1_DATE,
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REG_ALARM2_SEC,
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REG_ALARM2_MIN,
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REG_ALARM2_HOUR,
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REG_ALARM2_WEEKDAY,
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REG_ALARM2_MONTH,
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REG_ALARM2_YEAR,
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REG_ALARM2_DATE,
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REG_RTC_AE1,
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REG_RTC_END,
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};
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/* Maps RTC registers offset to the MAX77686 register addresses */
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static const unsigned int max77686_map[REG_RTC_END] = {
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[REG_RTC_CONTROLM] = MAX77686_RTC_CONTROLM,
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[REG_RTC_CONTROL] = MAX77686_RTC_CONTROL,
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[REG_RTC_UPDATE0] = MAX77686_RTC_UPDATE0,
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[REG_WTSR_SMPL_CNTL] = MAX77686_WTSR_SMPL_CNTL,
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[REG_RTC_SEC] = MAX77686_RTC_SEC,
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[REG_RTC_MIN] = MAX77686_RTC_MIN,
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[REG_RTC_HOUR] = MAX77686_RTC_HOUR,
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[REG_RTC_WEEKDAY] = MAX77686_RTC_WEEKDAY,
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[REG_RTC_MONTH] = MAX77686_RTC_MONTH,
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[REG_RTC_YEAR] = MAX77686_RTC_YEAR,
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[REG_RTC_DATE] = MAX77686_RTC_DATE,
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[REG_ALARM1_SEC] = MAX77686_ALARM1_SEC,
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[REG_ALARM1_MIN] = MAX77686_ALARM1_MIN,
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[REG_ALARM1_HOUR] = MAX77686_ALARM1_HOUR,
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[REG_ALARM1_WEEKDAY] = MAX77686_ALARM1_WEEKDAY,
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[REG_ALARM1_MONTH] = MAX77686_ALARM1_MONTH,
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[REG_ALARM1_YEAR] = MAX77686_ALARM1_YEAR,
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[REG_ALARM1_DATE] = MAX77686_ALARM1_DATE,
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[REG_ALARM2_SEC] = MAX77686_ALARM2_SEC,
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[REG_ALARM2_MIN] = MAX77686_ALARM2_MIN,
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[REG_ALARM2_HOUR] = MAX77686_ALARM2_HOUR,
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[REG_ALARM2_WEEKDAY] = MAX77686_ALARM2_WEEKDAY,
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[REG_ALARM2_MONTH] = MAX77686_ALARM2_MONTH,
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[REG_ALARM2_YEAR] = MAX77686_ALARM2_YEAR,
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[REG_ALARM2_DATE] = MAX77686_ALARM2_DATE,
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[REG_RTC_AE1] = REG_RTC_NONE,
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};
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static const struct regmap_irq max77686_rtc_irqs[] = {
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/* RTC interrupts */
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REGMAP_IRQ_REG(0, 0, MAX77686_RTCINT_RTC60S_MSK),
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REGMAP_IRQ_REG(1, 0, MAX77686_RTCINT_RTCA1_MSK),
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REGMAP_IRQ_REG(2, 0, MAX77686_RTCINT_RTCA2_MSK),
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REGMAP_IRQ_REG(3, 0, MAX77686_RTCINT_SMPL_MSK),
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REGMAP_IRQ_REG(4, 0, MAX77686_RTCINT_RTC1S_MSK),
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REGMAP_IRQ_REG(5, 0, MAX77686_RTCINT_WTSR_MSK),
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};
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static const struct regmap_irq_chip max77686_rtc_irq_chip = {
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.name = "max77686-rtc",
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.status_base = MAX77686_RTC_INT,
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.mask_base = MAX77686_RTC_INTM,
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.num_regs = 1,
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.irqs = max77686_rtc_irqs,
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.num_irqs = ARRAY_SIZE(max77686_rtc_irqs),
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};
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static const struct max77686_rtc_driver_data max77686_drv_data = {
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.delay = 16000,
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.mask = 0x7f,
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.map = max77686_map,
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.alarm_enable_reg = false,
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.rtc_irq_from_platform = false,
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.alarm_pending_status_reg = MAX77686_REG_STATUS2,
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.rtc_i2c_addr = MAX77686_I2C_ADDR_RTC,
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.rtc_irq_chip = &max77686_rtc_irq_chip,
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};
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static const struct max77686_rtc_driver_data max77620_drv_data = {
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.delay = 16000,
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.mask = 0x7f,
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.map = max77686_map,
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.alarm_enable_reg = false,
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.rtc_irq_from_platform = true,
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.alarm_pending_status_reg = MAX77686_INVALID_REG,
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.rtc_i2c_addr = MAX77620_I2C_ADDR_RTC,
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.rtc_irq_chip = &max77686_rtc_irq_chip,
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};
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static const unsigned int max77802_map[REG_RTC_END] = {
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[REG_RTC_CONTROLM] = MAX77802_RTC_CONTROLM,
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[REG_RTC_CONTROL] = MAX77802_RTC_CONTROL,
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[REG_RTC_UPDATE0] = MAX77802_RTC_UPDATE0,
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[REG_WTSR_SMPL_CNTL] = MAX77802_WTSR_SMPL_CNTL,
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[REG_RTC_SEC] = MAX77802_RTC_SEC,
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[REG_RTC_MIN] = MAX77802_RTC_MIN,
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[REG_RTC_HOUR] = MAX77802_RTC_HOUR,
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[REG_RTC_WEEKDAY] = MAX77802_RTC_WEEKDAY,
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[REG_RTC_MONTH] = MAX77802_RTC_MONTH,
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[REG_RTC_YEAR] = MAX77802_RTC_YEAR,
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[REG_RTC_DATE] = MAX77802_RTC_DATE,
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[REG_ALARM1_SEC] = MAX77802_ALARM1_SEC,
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[REG_ALARM1_MIN] = MAX77802_ALARM1_MIN,
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[REG_ALARM1_HOUR] = MAX77802_ALARM1_HOUR,
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[REG_ALARM1_WEEKDAY] = MAX77802_ALARM1_WEEKDAY,
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[REG_ALARM1_MONTH] = MAX77802_ALARM1_MONTH,
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[REG_ALARM1_YEAR] = MAX77802_ALARM1_YEAR,
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[REG_ALARM1_DATE] = MAX77802_ALARM1_DATE,
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[REG_ALARM2_SEC] = MAX77802_ALARM2_SEC,
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[REG_ALARM2_MIN] = MAX77802_ALARM2_MIN,
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[REG_ALARM2_HOUR] = MAX77802_ALARM2_HOUR,
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[REG_ALARM2_WEEKDAY] = MAX77802_ALARM2_WEEKDAY,
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[REG_ALARM2_MONTH] = MAX77802_ALARM2_MONTH,
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[REG_ALARM2_YEAR] = MAX77802_ALARM2_YEAR,
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[REG_ALARM2_DATE] = MAX77802_ALARM2_DATE,
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[REG_RTC_AE1] = MAX77802_RTC_AE1,
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};
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static const struct regmap_irq_chip max77802_rtc_irq_chip = {
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.name = "max77802-rtc",
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.status_base = MAX77802_RTC_INT,
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.mask_base = MAX77802_RTC_INTM,
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.num_regs = 1,
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.irqs = max77686_rtc_irqs, /* same masks as 77686 */
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.num_irqs = ARRAY_SIZE(max77686_rtc_irqs),
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};
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static const struct max77686_rtc_driver_data max77802_drv_data = {
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.delay = 200,
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.mask = 0xff,
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.map = max77802_map,
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.alarm_enable_reg = true,
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.rtc_irq_from_platform = false,
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.alarm_pending_status_reg = MAX77686_REG_STATUS2,
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.rtc_i2c_addr = MAX77686_INVALID_I2C_ADDR,
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.rtc_irq_chip = &max77802_rtc_irq_chip,
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};
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static void max77686_rtc_data_to_tm(u8 *data, struct rtc_time *tm,
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struct max77686_rtc_info *info)
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{
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u8 mask = info->drv_data->mask;
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tm->tm_sec = data[RTC_SEC] & mask;
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tm->tm_min = data[RTC_MIN] & mask;
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if (info->rtc_24hr_mode) {
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tm->tm_hour = data[RTC_HOUR] & 0x1f;
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} else {
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tm->tm_hour = data[RTC_HOUR] & 0x0f;
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if (data[RTC_HOUR] & HOUR_PM_MASK)
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tm->tm_hour += 12;
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}
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/* Only a single bit is set in data[], so fls() would be equivalent */
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tm->tm_wday = ffs(data[RTC_WEEKDAY] & mask) - 1;
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tm->tm_mday = data[RTC_DATE] & 0x1f;
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tm->tm_mon = (data[RTC_MONTH] & 0x0f) - 1;
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tm->tm_year = data[RTC_YEAR] & mask;
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tm->tm_yday = 0;
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tm->tm_isdst = 0;
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/*
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* MAX77686 uses 1 bit from sec/min/hour/etc RTC registers and the
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* year values are just 0..99 so add 100 to support up to 2099.
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*/
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if (!info->drv_data->alarm_enable_reg)
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tm->tm_year += 100;
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}
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static int max77686_rtc_tm_to_data(struct rtc_time *tm, u8 *data,
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struct max77686_rtc_info *info)
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{
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data[RTC_SEC] = tm->tm_sec;
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data[RTC_MIN] = tm->tm_min;
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data[RTC_HOUR] = tm->tm_hour;
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data[RTC_WEEKDAY] = 1 << tm->tm_wday;
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data[RTC_DATE] = tm->tm_mday;
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data[RTC_MONTH] = tm->tm_mon + 1;
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if (info->drv_data->alarm_enable_reg) {
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data[RTC_YEAR] = tm->tm_year;
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return 0;
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}
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data[RTC_YEAR] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0;
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if (tm->tm_year < 100) {
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dev_err(info->dev, "RTC cannot handle the year %d.\n",
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1900 + tm->tm_year);
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return -EINVAL;
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}
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return 0;
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}
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static int max77686_rtc_update(struct max77686_rtc_info *info,
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enum MAX77686_RTC_OP op)
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{
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int ret;
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unsigned int data;
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unsigned long delay = info->drv_data->delay;
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if (op == MAX77686_RTC_WRITE)
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data = 1 << RTC_UDR_SHIFT;
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else
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data = 1 << RTC_RBUDR_SHIFT;
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ret = regmap_update_bits(info->rtc_regmap,
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info->drv_data->map[REG_RTC_UPDATE0],
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data, data);
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if (ret < 0)
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dev_err(info->dev, "Fail to write update reg(ret=%d, data=0x%x)\n",
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ret, data);
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else {
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/* Minimum delay required before RTC update. */
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usleep_range(delay, delay * 2);
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}
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return ret;
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}
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static int max77686_rtc_read_time(struct device *dev, struct rtc_time *tm)
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{
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struct max77686_rtc_info *info = dev_get_drvdata(dev);
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u8 data[RTC_NR_TIME];
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int ret;
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mutex_lock(&info->lock);
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ret = max77686_rtc_update(info, MAX77686_RTC_READ);
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if (ret < 0)
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goto out;
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ret = regmap_bulk_read(info->rtc_regmap,
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info->drv_data->map[REG_RTC_SEC],
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data, ARRAY_SIZE(data));
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if (ret < 0) {
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dev_err(info->dev, "Fail to read time reg(%d)\n", ret);
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goto out;
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}
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max77686_rtc_data_to_tm(data, tm, info);
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out:
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mutex_unlock(&info->lock);
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return ret;
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}
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static int max77686_rtc_set_time(struct device *dev, struct rtc_time *tm)
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{
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struct max77686_rtc_info *info = dev_get_drvdata(dev);
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u8 data[RTC_NR_TIME];
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int ret;
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ret = max77686_rtc_tm_to_data(tm, data, info);
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if (ret < 0)
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return ret;
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mutex_lock(&info->lock);
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ret = regmap_bulk_write(info->rtc_regmap,
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info->drv_data->map[REG_RTC_SEC],
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data, ARRAY_SIZE(data));
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if (ret < 0) {
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dev_err(info->dev, "Fail to write time reg(%d)\n", ret);
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goto out;
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}
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ret = max77686_rtc_update(info, MAX77686_RTC_WRITE);
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out:
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mutex_unlock(&info->lock);
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return ret;
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}
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static int max77686_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
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{
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struct max77686_rtc_info *info = dev_get_drvdata(dev);
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u8 data[RTC_NR_TIME];
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unsigned int val;
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const unsigned int *map = info->drv_data->map;
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int i, ret;
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mutex_lock(&info->lock);
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ret = max77686_rtc_update(info, MAX77686_RTC_READ);
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if (ret < 0)
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goto out;
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ret = regmap_bulk_read(info->rtc_regmap, map[REG_ALARM1_SEC],
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data, ARRAY_SIZE(data));
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if (ret < 0) {
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dev_err(info->dev, "Fail to read alarm reg(%d)\n", ret);
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goto out;
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}
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max77686_rtc_data_to_tm(data, &alrm->time, info);
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alrm->enabled = 0;
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|
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if (info->drv_data->alarm_enable_reg) {
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if (map[REG_RTC_AE1] == REG_RTC_NONE) {
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ret = -EINVAL;
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dev_err(info->dev,
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"alarm enable register not set(%d)\n", ret);
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goto out;
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}
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ret = regmap_read(info->rtc_regmap, map[REG_RTC_AE1], &val);
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if (ret < 0) {
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dev_err(info->dev,
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"fail to read alarm enable(%d)\n", ret);
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goto out;
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}
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if (val)
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alrm->enabled = 1;
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} else {
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for (i = 0; i < ARRAY_SIZE(data); i++) {
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if (data[i] & ALARM_ENABLE_MASK) {
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alrm->enabled = 1;
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break;
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}
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}
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}
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|
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alrm->pending = 0;
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|
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if (info->drv_data->alarm_pending_status_reg == MAX77686_INVALID_REG)
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goto out;
|
|
|
|
ret = regmap_read(info->regmap,
|
|
info->drv_data->alarm_pending_status_reg, &val);
|
|
if (ret < 0) {
|
|
dev_err(info->dev,
|
|
"Fail to read alarm pending status reg(%d)\n", ret);
|
|
goto out;
|
|
}
|
|
|
|
if (val & (1 << 4)) /* RTCA1 */
|
|
alrm->pending = 1;
|
|
|
|
out:
|
|
mutex_unlock(&info->lock);
|
|
return ret;
|
|
}
|
|
|
|
static int max77686_rtc_stop_alarm(struct max77686_rtc_info *info)
|
|
{
|
|
u8 data[RTC_NR_TIME];
|
|
int ret, i;
|
|
struct rtc_time tm;
|
|
const unsigned int *map = info->drv_data->map;
|
|
|
|
if (!mutex_is_locked(&info->lock))
|
|
dev_warn(info->dev, "%s: should have mutex locked\n", __func__);
|
|
|
|
ret = max77686_rtc_update(info, MAX77686_RTC_READ);
|
|
if (ret < 0)
|
|
goto out;
|
|
|
|
if (info->drv_data->alarm_enable_reg) {
|
|
if (map[REG_RTC_AE1] == REG_RTC_NONE) {
|
|
ret = -EINVAL;
|
|
dev_err(info->dev,
|
|
"alarm enable register not set(%d)\n", ret);
|
|
goto out;
|
|
}
|
|
|
|
ret = regmap_write(info->rtc_regmap, map[REG_RTC_AE1], 0);
|
|
} else {
|
|
ret = regmap_bulk_read(info->rtc_regmap, map[REG_ALARM1_SEC],
|
|
data, ARRAY_SIZE(data));
|
|
if (ret < 0) {
|
|
dev_err(info->dev, "Fail to read alarm reg(%d)\n", ret);
|
|
goto out;
|
|
}
|
|
|
|
max77686_rtc_data_to_tm(data, &tm, info);
|
|
|
|
for (i = 0; i < ARRAY_SIZE(data); i++)
|
|
data[i] &= ~ALARM_ENABLE_MASK;
|
|
|
|
ret = regmap_bulk_write(info->rtc_regmap, map[REG_ALARM1_SEC],
|
|
data, ARRAY_SIZE(data));
|
|
}
|
|
|
|
if (ret < 0) {
|
|
dev_err(info->dev, "Fail to write alarm reg(%d)\n", ret);
|
|
goto out;
|
|
}
|
|
|
|
ret = max77686_rtc_update(info, MAX77686_RTC_WRITE);
|
|
out:
|
|
return ret;
|
|
}
|
|
|
|
static int max77686_rtc_start_alarm(struct max77686_rtc_info *info)
|
|
{
|
|
u8 data[RTC_NR_TIME];
|
|
int ret;
|
|
struct rtc_time tm;
|
|
const unsigned int *map = info->drv_data->map;
|
|
|
|
if (!mutex_is_locked(&info->lock))
|
|
dev_warn(info->dev, "%s: should have mutex locked\n", __func__);
|
|
|
|
ret = max77686_rtc_update(info, MAX77686_RTC_READ);
|
|
if (ret < 0)
|
|
goto out;
|
|
|
|
if (info->drv_data->alarm_enable_reg) {
|
|
ret = regmap_write(info->rtc_regmap, map[REG_RTC_AE1],
|
|
MAX77802_ALARM_ENABLE_VALUE);
|
|
} else {
|
|
ret = regmap_bulk_read(info->rtc_regmap, map[REG_ALARM1_SEC],
|
|
data, ARRAY_SIZE(data));
|
|
if (ret < 0) {
|
|
dev_err(info->dev, "Fail to read alarm reg(%d)\n", ret);
|
|
goto out;
|
|
}
|
|
|
|
max77686_rtc_data_to_tm(data, &tm, info);
|
|
|
|
data[RTC_SEC] |= (1 << ALARM_ENABLE_SHIFT);
|
|
data[RTC_MIN] |= (1 << ALARM_ENABLE_SHIFT);
|
|
data[RTC_HOUR] |= (1 << ALARM_ENABLE_SHIFT);
|
|
data[RTC_WEEKDAY] &= ~ALARM_ENABLE_MASK;
|
|
if (data[RTC_MONTH] & 0xf)
|
|
data[RTC_MONTH] |= (1 << ALARM_ENABLE_SHIFT);
|
|
if (data[RTC_YEAR] & info->drv_data->mask)
|
|
data[RTC_YEAR] |= (1 << ALARM_ENABLE_SHIFT);
|
|
if (data[RTC_DATE] & 0x1f)
|
|
data[RTC_DATE] |= (1 << ALARM_ENABLE_SHIFT);
|
|
|
|
ret = regmap_bulk_write(info->rtc_regmap, map[REG_ALARM1_SEC],
|
|
data, ARRAY_SIZE(data));
|
|
}
|
|
|
|
if (ret < 0) {
|
|
dev_err(info->dev, "Fail to write alarm reg(%d)\n", ret);
|
|
goto out;
|
|
}
|
|
|
|
ret = max77686_rtc_update(info, MAX77686_RTC_WRITE);
|
|
out:
|
|
return ret;
|
|
}
|
|
|
|
static int max77686_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
|
|
{
|
|
struct max77686_rtc_info *info = dev_get_drvdata(dev);
|
|
u8 data[RTC_NR_TIME];
|
|
int ret;
|
|
|
|
ret = max77686_rtc_tm_to_data(&alrm->time, data, info);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
mutex_lock(&info->lock);
|
|
|
|
ret = max77686_rtc_stop_alarm(info);
|
|
if (ret < 0)
|
|
goto out;
|
|
|
|
ret = regmap_bulk_write(info->rtc_regmap,
|
|
info->drv_data->map[REG_ALARM1_SEC],
|
|
data, ARRAY_SIZE(data));
|
|
|
|
if (ret < 0) {
|
|
dev_err(info->dev, "Fail to write alarm reg(%d)\n", ret);
|
|
goto out;
|
|
}
|
|
|
|
ret = max77686_rtc_update(info, MAX77686_RTC_WRITE);
|
|
if (ret < 0)
|
|
goto out;
|
|
|
|
if (alrm->enabled)
|
|
ret = max77686_rtc_start_alarm(info);
|
|
out:
|
|
mutex_unlock(&info->lock);
|
|
return ret;
|
|
}
|
|
|
|
static int max77686_rtc_alarm_irq_enable(struct device *dev,
|
|
unsigned int enabled)
|
|
{
|
|
struct max77686_rtc_info *info = dev_get_drvdata(dev);
|
|
int ret;
|
|
|
|
mutex_lock(&info->lock);
|
|
if (enabled)
|
|
ret = max77686_rtc_start_alarm(info);
|
|
else
|
|
ret = max77686_rtc_stop_alarm(info);
|
|
mutex_unlock(&info->lock);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static irqreturn_t max77686_rtc_alarm_irq(int irq, void *data)
|
|
{
|
|
struct max77686_rtc_info *info = data;
|
|
|
|
dev_dbg(info->dev, "RTC alarm IRQ: %d\n", irq);
|
|
|
|
rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static const struct rtc_class_ops max77686_rtc_ops = {
|
|
.read_time = max77686_rtc_read_time,
|
|
.set_time = max77686_rtc_set_time,
|
|
.read_alarm = max77686_rtc_read_alarm,
|
|
.set_alarm = max77686_rtc_set_alarm,
|
|
.alarm_irq_enable = max77686_rtc_alarm_irq_enable,
|
|
};
|
|
|
|
static int max77686_rtc_init_reg(struct max77686_rtc_info *info)
|
|
{
|
|
u8 data[2];
|
|
int ret;
|
|
|
|
/* Set RTC control register : Binary mode, 24hour mdoe */
|
|
data[0] = (1 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
|
|
data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
|
|
|
|
info->rtc_24hr_mode = 1;
|
|
|
|
ret = regmap_bulk_write(info->rtc_regmap,
|
|
info->drv_data->map[REG_RTC_CONTROLM],
|
|
data, ARRAY_SIZE(data));
|
|
if (ret < 0) {
|
|
dev_err(info->dev, "Fail to write controlm reg(%d)\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
ret = max77686_rtc_update(info, MAX77686_RTC_WRITE);
|
|
return ret;
|
|
}
|
|
|
|
static const struct regmap_config max77686_rtc_regmap_config = {
|
|
.reg_bits = 8,
|
|
.val_bits = 8,
|
|
};
|
|
|
|
static int max77686_init_rtc_regmap(struct max77686_rtc_info *info)
|
|
{
|
|
struct device *parent = info->dev->parent;
|
|
struct i2c_client *parent_i2c = to_i2c_client(parent);
|
|
int ret;
|
|
|
|
if (info->drv_data->rtc_irq_from_platform) {
|
|
struct platform_device *pdev = to_platform_device(info->dev);
|
|
|
|
info->rtc_irq = platform_get_irq(pdev, 0);
|
|
if (info->rtc_irq < 0)
|
|
return info->rtc_irq;
|
|
} else {
|
|
info->rtc_irq = parent_i2c->irq;
|
|
}
|
|
|
|
info->regmap = dev_get_regmap(parent, NULL);
|
|
if (!info->regmap) {
|
|
dev_err(info->dev, "Failed to get rtc regmap\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
if (info->drv_data->rtc_i2c_addr == MAX77686_INVALID_I2C_ADDR) {
|
|
info->rtc_regmap = info->regmap;
|
|
goto add_rtc_irq;
|
|
}
|
|
|
|
info->rtc = devm_i2c_new_dummy_device(info->dev, parent_i2c->adapter,
|
|
info->drv_data->rtc_i2c_addr);
|
|
if (IS_ERR(info->rtc)) {
|
|
dev_err(info->dev, "Failed to allocate I2C device for RTC\n");
|
|
return PTR_ERR(info->rtc);
|
|
}
|
|
|
|
info->rtc_regmap = devm_regmap_init_i2c(info->rtc,
|
|
&max77686_rtc_regmap_config);
|
|
if (IS_ERR(info->rtc_regmap)) {
|
|
ret = PTR_ERR(info->rtc_regmap);
|
|
dev_err(info->dev, "Failed to allocate RTC regmap: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
add_rtc_irq:
|
|
ret = regmap_add_irq_chip(info->rtc_regmap, info->rtc_irq,
|
|
IRQF_TRIGGER_FALLING | IRQF_ONESHOT |
|
|
IRQF_SHARED, 0, info->drv_data->rtc_irq_chip,
|
|
&info->rtc_irq_data);
|
|
if (ret < 0) {
|
|
dev_err(info->dev, "Failed to add RTC irq chip: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int max77686_rtc_probe(struct platform_device *pdev)
|
|
{
|
|
struct max77686_rtc_info *info;
|
|
const struct platform_device_id *id = platform_get_device_id(pdev);
|
|
int ret;
|
|
|
|
info = devm_kzalloc(&pdev->dev, sizeof(struct max77686_rtc_info),
|
|
GFP_KERNEL);
|
|
if (!info)
|
|
return -ENOMEM;
|
|
|
|
mutex_init(&info->lock);
|
|
info->dev = &pdev->dev;
|
|
info->drv_data = (const struct max77686_rtc_driver_data *)
|
|
id->driver_data;
|
|
|
|
ret = max77686_init_rtc_regmap(info);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
platform_set_drvdata(pdev, info);
|
|
|
|
ret = max77686_rtc_init_reg(info);
|
|
if (ret < 0) {
|
|
dev_err(&pdev->dev, "Failed to initialize RTC reg:%d\n", ret);
|
|
goto err_rtc;
|
|
}
|
|
|
|
device_init_wakeup(&pdev->dev, 1);
|
|
|
|
info->rtc_dev = devm_rtc_device_register(&pdev->dev, id->name,
|
|
&max77686_rtc_ops, THIS_MODULE);
|
|
|
|
if (IS_ERR(info->rtc_dev)) {
|
|
ret = PTR_ERR(info->rtc_dev);
|
|
dev_err(&pdev->dev, "Failed to register RTC device: %d\n", ret);
|
|
if (ret == 0)
|
|
ret = -EINVAL;
|
|
goto err_rtc;
|
|
}
|
|
|
|
info->virq = regmap_irq_get_virq(info->rtc_irq_data,
|
|
MAX77686_RTCIRQ_RTCA1);
|
|
if (info->virq <= 0) {
|
|
ret = -ENXIO;
|
|
goto err_rtc;
|
|
}
|
|
|
|
ret = request_threaded_irq(info->virq, NULL, max77686_rtc_alarm_irq, 0,
|
|
"rtc-alarm1", info);
|
|
if (ret < 0) {
|
|
dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
|
|
info->virq, ret);
|
|
goto err_rtc;
|
|
}
|
|
|
|
return 0;
|
|
|
|
err_rtc:
|
|
regmap_del_irq_chip(info->rtc_irq, info->rtc_irq_data);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int max77686_rtc_remove(struct platform_device *pdev)
|
|
{
|
|
struct max77686_rtc_info *info = platform_get_drvdata(pdev);
|
|
|
|
free_irq(info->virq, info);
|
|
regmap_del_irq_chip(info->rtc_irq, info->rtc_irq_data);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static int max77686_rtc_suspend(struct device *dev)
|
|
{
|
|
if (device_may_wakeup(dev)) {
|
|
struct max77686_rtc_info *info = dev_get_drvdata(dev);
|
|
|
|
return enable_irq_wake(info->virq);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int max77686_rtc_resume(struct device *dev)
|
|
{
|
|
if (device_may_wakeup(dev)) {
|
|
struct max77686_rtc_info *info = dev_get_drvdata(dev);
|
|
|
|
return disable_irq_wake(info->virq);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static SIMPLE_DEV_PM_OPS(max77686_rtc_pm_ops,
|
|
max77686_rtc_suspend, max77686_rtc_resume);
|
|
|
|
static const struct platform_device_id rtc_id[] = {
|
|
{ "max77686-rtc", .driver_data = (kernel_ulong_t)&max77686_drv_data, },
|
|
{ "max77802-rtc", .driver_data = (kernel_ulong_t)&max77802_drv_data, },
|
|
{ "max77620-rtc", .driver_data = (kernel_ulong_t)&max77620_drv_data, },
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(platform, rtc_id);
|
|
|
|
static struct platform_driver max77686_rtc_driver = {
|
|
.driver = {
|
|
.name = "max77686-rtc",
|
|
.pm = &max77686_rtc_pm_ops,
|
|
},
|
|
.probe = max77686_rtc_probe,
|
|
.remove = max77686_rtc_remove,
|
|
.id_table = rtc_id,
|
|
};
|
|
|
|
module_platform_driver(max77686_rtc_driver);
|
|
|
|
MODULE_DESCRIPTION("Maxim MAX77686 RTC driver");
|
|
MODULE_AUTHOR("Chiwoong Byun <woong.byun@samsung.com>");
|
|
MODULE_LICENSE("GPL");
|