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![Mika Westerberg](/assets/img/avatar_default.png)
Two functions that were added for USB4 support miss kernel-doc parameter descriptions so add them now. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20200214121638.75589-1-mika.westerberg@linux.intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
768 lines
18 KiB
C
768 lines
18 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* USB4 specific functionality
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*
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* Copyright (C) 2019, Intel Corporation
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* Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
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* Rajmohan Mani <rajmohan.mani@intel.com>
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*/
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#include <linux/delay.h>
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#include <linux/ktime.h>
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#include "tb.h"
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#define USB4_DATA_DWORDS 16
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#define USB4_DATA_RETRIES 3
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enum usb4_switch_op {
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USB4_SWITCH_OP_QUERY_DP_RESOURCE = 0x10,
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USB4_SWITCH_OP_ALLOC_DP_RESOURCE = 0x11,
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USB4_SWITCH_OP_DEALLOC_DP_RESOURCE = 0x12,
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USB4_SWITCH_OP_NVM_WRITE = 0x20,
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USB4_SWITCH_OP_NVM_AUTH = 0x21,
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USB4_SWITCH_OP_NVM_READ = 0x22,
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USB4_SWITCH_OP_NVM_SET_OFFSET = 0x23,
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USB4_SWITCH_OP_DROM_READ = 0x24,
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USB4_SWITCH_OP_NVM_SECTOR_SIZE = 0x25,
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};
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#define USB4_NVM_READ_OFFSET_MASK GENMASK(23, 2)
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#define USB4_NVM_READ_OFFSET_SHIFT 2
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#define USB4_NVM_READ_LENGTH_MASK GENMASK(27, 24)
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#define USB4_NVM_READ_LENGTH_SHIFT 24
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#define USB4_NVM_SET_OFFSET_MASK USB4_NVM_READ_OFFSET_MASK
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#define USB4_NVM_SET_OFFSET_SHIFT USB4_NVM_READ_OFFSET_SHIFT
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#define USB4_DROM_ADDRESS_MASK GENMASK(14, 2)
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#define USB4_DROM_ADDRESS_SHIFT 2
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#define USB4_DROM_SIZE_MASK GENMASK(19, 15)
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#define USB4_DROM_SIZE_SHIFT 15
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#define USB4_NVM_SECTOR_SIZE_MASK GENMASK(23, 0)
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typedef int (*read_block_fn)(struct tb_switch *, unsigned int, void *, size_t);
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typedef int (*write_block_fn)(struct tb_switch *, const void *, size_t);
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static int usb4_switch_wait_for_bit(struct tb_switch *sw, u32 offset, u32 bit,
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u32 value, int timeout_msec)
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{
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ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec);
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do {
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u32 val;
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int ret;
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ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, offset, 1);
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if (ret)
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return ret;
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if ((val & bit) == value)
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return 0;
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usleep_range(50, 100);
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} while (ktime_before(ktime_get(), timeout));
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return -ETIMEDOUT;
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}
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static int usb4_switch_op_read_data(struct tb_switch *sw, void *data,
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size_t dwords)
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{
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if (dwords > USB4_DATA_DWORDS)
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return -EINVAL;
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return tb_sw_read(sw, data, TB_CFG_SWITCH, ROUTER_CS_9, dwords);
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}
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static int usb4_switch_op_write_data(struct tb_switch *sw, const void *data,
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size_t dwords)
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{
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if (dwords > USB4_DATA_DWORDS)
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return -EINVAL;
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return tb_sw_write(sw, data, TB_CFG_SWITCH, ROUTER_CS_9, dwords);
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}
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static int usb4_switch_op_read_metadata(struct tb_switch *sw, u32 *metadata)
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{
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return tb_sw_read(sw, metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1);
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}
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static int usb4_switch_op_write_metadata(struct tb_switch *sw, u32 metadata)
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{
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return tb_sw_write(sw, &metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1);
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}
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static int usb4_switch_do_read_data(struct tb_switch *sw, u16 address,
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void *buf, size_t size, read_block_fn read_block)
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{
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unsigned int retries = USB4_DATA_RETRIES;
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unsigned int offset;
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offset = address & 3;
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address = address & ~3;
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do {
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size_t nbytes = min_t(size_t, size, USB4_DATA_DWORDS * 4);
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unsigned int dwaddress, dwords;
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u8 data[USB4_DATA_DWORDS * 4];
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int ret;
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dwaddress = address / 4;
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dwords = ALIGN(nbytes, 4) / 4;
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ret = read_block(sw, dwaddress, data, dwords);
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if (ret) {
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if (ret == -ETIMEDOUT) {
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if (retries--)
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continue;
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ret = -EIO;
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}
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return ret;
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}
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memcpy(buf, data + offset, nbytes);
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size -= nbytes;
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address += nbytes;
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buf += nbytes;
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} while (size > 0);
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return 0;
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}
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static int usb4_switch_do_write_data(struct tb_switch *sw, u16 address,
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const void *buf, size_t size, write_block_fn write_next_block)
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{
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unsigned int retries = USB4_DATA_RETRIES;
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unsigned int offset;
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offset = address & 3;
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address = address & ~3;
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do {
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u32 nbytes = min_t(u32, size, USB4_DATA_DWORDS * 4);
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u8 data[USB4_DATA_DWORDS * 4];
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int ret;
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memcpy(data + offset, buf, nbytes);
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ret = write_next_block(sw, data, nbytes / 4);
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if (ret) {
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if (ret == -ETIMEDOUT) {
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if (retries--)
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continue;
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ret = -EIO;
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}
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return ret;
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}
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size -= nbytes;
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address += nbytes;
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buf += nbytes;
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} while (size > 0);
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return 0;
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}
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static int usb4_switch_op(struct tb_switch *sw, u16 opcode, u8 *status)
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{
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u32 val;
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int ret;
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val = opcode | ROUTER_CS_26_OV;
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ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
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if (ret)
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return ret;
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ret = usb4_switch_wait_for_bit(sw, ROUTER_CS_26, ROUTER_CS_26_OV, 0, 500);
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if (ret)
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return ret;
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ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
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if (val & ROUTER_CS_26_ONS)
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return -EOPNOTSUPP;
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*status = (val & ROUTER_CS_26_STATUS_MASK) >> ROUTER_CS_26_STATUS_SHIFT;
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return 0;
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}
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/**
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* usb4_switch_setup() - Additional setup for USB4 device
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* @sw: USB4 router to setup
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*
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* USB4 routers need additional settings in order to enable all the
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* tunneling. This function enables USB and PCIe tunneling if it can be
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* enabled (e.g the parent switch also supports them). If USB tunneling
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* is not available for some reason (like that there is Thunderbolt 3
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* switch upstream) then the internal xHCI controller is enabled
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* instead.
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*/
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int usb4_switch_setup(struct tb_switch *sw)
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{
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struct tb_switch *parent;
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bool tbt3, xhci;
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u32 val = 0;
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int ret;
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if (!tb_route(sw))
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return 0;
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ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1);
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if (ret)
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return ret;
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xhci = val & ROUTER_CS_6_HCI;
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tbt3 = !(val & ROUTER_CS_6_TNS);
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tb_sw_dbg(sw, "TBT3 support: %s, xHCI: %s\n",
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tbt3 ? "yes" : "no", xhci ? "yes" : "no");
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ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
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if (ret)
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return ret;
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parent = tb_switch_parent(sw);
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if (tb_switch_find_port(parent, TB_TYPE_USB3_DOWN)) {
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val |= ROUTER_CS_5_UTO;
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xhci = false;
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}
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/* Only enable PCIe tunneling if the parent router supports it */
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if (tb_switch_find_port(parent, TB_TYPE_PCIE_DOWN)) {
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val |= ROUTER_CS_5_PTO;
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/*
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* xHCI can be enabled if PCIe tunneling is supported
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* and the parent does not have any USB3 dowstream
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* adapters (so we cannot do USB 3.x tunneling).
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*/
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if (xhci)
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val |= ROUTER_CS_5_HCO;
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}
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/* TBT3 supported by the CM */
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val |= ROUTER_CS_5_C3S;
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/* Tunneling configuration is ready now */
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val |= ROUTER_CS_5_CV;
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ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
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if (ret)
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return ret;
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return usb4_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_CR,
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ROUTER_CS_6_CR, 50);
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}
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/**
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* usb4_switch_read_uid() - Read UID from USB4 router
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* @sw: USB4 router
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* @uid: UID is stored here
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*
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* Reads 64-bit UID from USB4 router config space.
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*/
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int usb4_switch_read_uid(struct tb_switch *sw, u64 *uid)
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{
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return tb_sw_read(sw, uid, TB_CFG_SWITCH, ROUTER_CS_7, 2);
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}
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static int usb4_switch_drom_read_block(struct tb_switch *sw,
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unsigned int dwaddress, void *buf,
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size_t dwords)
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{
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u8 status = 0;
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u32 metadata;
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int ret;
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metadata = (dwords << USB4_DROM_SIZE_SHIFT) & USB4_DROM_SIZE_MASK;
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metadata |= (dwaddress << USB4_DROM_ADDRESS_SHIFT) &
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USB4_DROM_ADDRESS_MASK;
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ret = usb4_switch_op_write_metadata(sw, metadata);
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if (ret)
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return ret;
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ret = usb4_switch_op(sw, USB4_SWITCH_OP_DROM_READ, &status);
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if (ret)
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return ret;
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if (status)
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return -EIO;
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return usb4_switch_op_read_data(sw, buf, dwords);
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}
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/**
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* usb4_switch_drom_read() - Read arbitrary bytes from USB4 router DROM
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* @sw: USB4 router
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* @address: Byte address inside DROM to start reading
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* @buf: Buffer where the DROM content is stored
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* @size: Number of bytes to read from DROM
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*
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* Uses USB4 router operations to read router DROM. For devices this
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* should always work but for hosts it may return %-EOPNOTSUPP in which
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* case the host router does not have DROM.
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*/
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int usb4_switch_drom_read(struct tb_switch *sw, unsigned int address, void *buf,
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size_t size)
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{
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return usb4_switch_do_read_data(sw, address, buf, size,
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usb4_switch_drom_read_block);
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}
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static int usb4_set_port_configured(struct tb_port *port, bool configured)
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{
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int ret;
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u32 val;
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ret = tb_port_read(port, &val, TB_CFG_PORT,
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port->cap_usb4 + PORT_CS_19, 1);
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if (ret)
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return ret;
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if (configured)
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val |= PORT_CS_19_PC;
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else
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val &= ~PORT_CS_19_PC;
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return tb_port_write(port, &val, TB_CFG_PORT,
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port->cap_usb4 + PORT_CS_19, 1);
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}
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/**
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* usb4_switch_configure_link() - Set upstream USB4 link configured
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* @sw: USB4 router
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*
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* Sets the upstream USB4 link to be configured for power management
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* purposes.
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*/
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int usb4_switch_configure_link(struct tb_switch *sw)
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{
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struct tb_port *up;
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if (!tb_route(sw))
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return 0;
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up = tb_upstream_port(sw);
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return usb4_set_port_configured(up, true);
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}
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/**
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* usb4_switch_unconfigure_link() - Un-set upstream USB4 link configuration
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* @sw: USB4 router
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*
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* Reverse of usb4_switch_configure_link().
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*/
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void usb4_switch_unconfigure_link(struct tb_switch *sw)
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{
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struct tb_port *up;
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if (sw->is_unplugged || !tb_route(sw))
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return;
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up = tb_upstream_port(sw);
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usb4_set_port_configured(up, false);
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}
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/**
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* usb4_switch_lane_bonding_possible() - Are conditions met for lane bonding
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* @sw: USB4 router
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*
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* Checks whether conditions are met so that lane bonding can be
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* established with the upstream router. Call only for device routers.
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*/
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bool usb4_switch_lane_bonding_possible(struct tb_switch *sw)
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{
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struct tb_port *up;
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int ret;
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u32 val;
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up = tb_upstream_port(sw);
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ret = tb_port_read(up, &val, TB_CFG_PORT, up->cap_usb4 + PORT_CS_18, 1);
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if (ret)
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return false;
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return !!(val & PORT_CS_18_BE);
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}
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/**
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* usb4_switch_set_sleep() - Prepare the router to enter sleep
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* @sw: USB4 router
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*
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* Enables wakes and sets sleep bit for the router. Returns when the
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* router sleep ready bit has been asserted.
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*/
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int usb4_switch_set_sleep(struct tb_switch *sw)
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{
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int ret;
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u32 val;
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/* Set sleep bit and wait for sleep ready to be asserted */
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ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
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if (ret)
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return ret;
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val |= ROUTER_CS_5_SLP;
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ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
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if (ret)
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return ret;
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return usb4_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_SLPR,
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ROUTER_CS_6_SLPR, 500);
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}
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/**
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* usb4_switch_nvm_sector_size() - Return router NVM sector size
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* @sw: USB4 router
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*
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* If the router supports NVM operations this function returns the NVM
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* sector size in bytes. If NVM operations are not supported returns
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* %-EOPNOTSUPP.
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*/
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int usb4_switch_nvm_sector_size(struct tb_switch *sw)
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{
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u32 metadata;
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u8 status;
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int ret;
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ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_SECTOR_SIZE, &status);
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if (ret)
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return ret;
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if (status)
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return status == 0x2 ? -EOPNOTSUPP : -EIO;
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ret = usb4_switch_op_read_metadata(sw, &metadata);
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if (ret)
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return ret;
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return metadata & USB4_NVM_SECTOR_SIZE_MASK;
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}
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static int usb4_switch_nvm_read_block(struct tb_switch *sw,
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unsigned int dwaddress, void *buf, size_t dwords)
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{
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u8 status = 0;
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u32 metadata;
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int ret;
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metadata = (dwords << USB4_NVM_READ_LENGTH_SHIFT) &
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USB4_NVM_READ_LENGTH_MASK;
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metadata |= (dwaddress << USB4_NVM_READ_OFFSET_SHIFT) &
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USB4_NVM_READ_OFFSET_MASK;
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ret = usb4_switch_op_write_metadata(sw, metadata);
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if (ret)
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return ret;
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ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_READ, &status);
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if (ret)
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return ret;
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if (status)
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return -EIO;
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return usb4_switch_op_read_data(sw, buf, dwords);
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}
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/**
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* usb4_switch_nvm_read() - Read arbitrary bytes from router NVM
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* @sw: USB4 router
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* @address: Starting address in bytes
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* @buf: Read data is placed here
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* @size: How many bytes to read
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*
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* Reads NVM contents of the router. If NVM is not supported returns
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* %-EOPNOTSUPP.
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*/
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int usb4_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf,
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size_t size)
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{
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return usb4_switch_do_read_data(sw, address, buf, size,
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usb4_switch_nvm_read_block);
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}
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static int usb4_switch_nvm_set_offset(struct tb_switch *sw,
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unsigned int address)
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{
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u32 metadata, dwaddress;
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u8 status = 0;
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int ret;
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dwaddress = address / 4;
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metadata = (dwaddress << USB4_NVM_SET_OFFSET_SHIFT) &
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USB4_NVM_SET_OFFSET_MASK;
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ret = usb4_switch_op_write_metadata(sw, metadata);
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if (ret)
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return ret;
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ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_SET_OFFSET, &status);
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if (ret)
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return ret;
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return status ? -EIO : 0;
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}
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|
|
|
static int usb4_switch_nvm_write_next_block(struct tb_switch *sw,
|
|
const void *buf, size_t dwords)
|
|
{
|
|
u8 status;
|
|
int ret;
|
|
|
|
ret = usb4_switch_op_write_data(sw, buf, dwords);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_WRITE, &status);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return status ? -EIO : 0;
|
|
}
|
|
|
|
/**
|
|
* usb4_switch_nvm_write() - Write to the router NVM
|
|
* @sw: USB4 router
|
|
* @address: Start address where to write in bytes
|
|
* @buf: Pointer to the data to write
|
|
* @size: Size of @buf in bytes
|
|
*
|
|
* Writes @buf to the router NVM using USB4 router operations. If NVM
|
|
* write is not supported returns %-EOPNOTSUPP.
|
|
*/
|
|
int usb4_switch_nvm_write(struct tb_switch *sw, unsigned int address,
|
|
const void *buf, size_t size)
|
|
{
|
|
int ret;
|
|
|
|
ret = usb4_switch_nvm_set_offset(sw, address);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return usb4_switch_do_write_data(sw, address, buf, size,
|
|
usb4_switch_nvm_write_next_block);
|
|
}
|
|
|
|
/**
|
|
* usb4_switch_nvm_authenticate() - Authenticate new NVM
|
|
* @sw: USB4 router
|
|
*
|
|
* After the new NVM has been written via usb4_switch_nvm_write(), this
|
|
* function triggers NVM authentication process. If the authentication
|
|
* is successful the router is power cycled and the new NVM starts
|
|
* running. In case of failure returns negative errno.
|
|
*/
|
|
int usb4_switch_nvm_authenticate(struct tb_switch *sw)
|
|
{
|
|
u8 status = 0;
|
|
int ret;
|
|
|
|
ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_AUTH, &status);
|
|
if (ret)
|
|
return ret;
|
|
|
|
switch (status) {
|
|
case 0x0:
|
|
tb_sw_dbg(sw, "NVM authentication successful\n");
|
|
return 0;
|
|
case 0x1:
|
|
return -EINVAL;
|
|
case 0x2:
|
|
return -EAGAIN;
|
|
case 0x3:
|
|
return -EOPNOTSUPP;
|
|
default:
|
|
return -EIO;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* usb4_switch_query_dp_resource() - Query availability of DP IN resource
|
|
* @sw: USB4 router
|
|
* @in: DP IN adapter
|
|
*
|
|
* For DP tunneling this function can be used to query availability of
|
|
* DP IN resource. Returns true if the resource is available for DP
|
|
* tunneling, false otherwise.
|
|
*/
|
|
bool usb4_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in)
|
|
{
|
|
u8 status;
|
|
int ret;
|
|
|
|
ret = usb4_switch_op_write_metadata(sw, in->port);
|
|
if (ret)
|
|
return false;
|
|
|
|
ret = usb4_switch_op(sw, USB4_SWITCH_OP_QUERY_DP_RESOURCE, &status);
|
|
/*
|
|
* If DP resource allocation is not supported assume it is
|
|
* always available.
|
|
*/
|
|
if (ret == -EOPNOTSUPP)
|
|
return true;
|
|
else if (ret)
|
|
return false;
|
|
|
|
return !status;
|
|
}
|
|
|
|
/**
|
|
* usb4_switch_alloc_dp_resource() - Allocate DP IN resource
|
|
* @sw: USB4 router
|
|
* @in: DP IN adapter
|
|
*
|
|
* Allocates DP IN resource for DP tunneling using USB4 router
|
|
* operations. If the resource was allocated returns %0. Otherwise
|
|
* returns negative errno, in particular %-EBUSY if the resource is
|
|
* already allocated.
|
|
*/
|
|
int usb4_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in)
|
|
{
|
|
u8 status;
|
|
int ret;
|
|
|
|
ret = usb4_switch_op_write_metadata(sw, in->port);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = usb4_switch_op(sw, USB4_SWITCH_OP_ALLOC_DP_RESOURCE, &status);
|
|
if (ret == -EOPNOTSUPP)
|
|
return 0;
|
|
else if (ret)
|
|
return ret;
|
|
|
|
return status ? -EBUSY : 0;
|
|
}
|
|
|
|
/**
|
|
* usb4_switch_dealloc_dp_resource() - Releases allocated DP IN resource
|
|
* @sw: USB4 router
|
|
* @in: DP IN adapter
|
|
*
|
|
* Releases the previously allocated DP IN resource.
|
|
*/
|
|
int usb4_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in)
|
|
{
|
|
u8 status;
|
|
int ret;
|
|
|
|
ret = usb4_switch_op_write_metadata(sw, in->port);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = usb4_switch_op(sw, USB4_SWITCH_OP_DEALLOC_DP_RESOURCE, &status);
|
|
if (ret == -EOPNOTSUPP)
|
|
return 0;
|
|
else if (ret)
|
|
return ret;
|
|
|
|
return status ? -EIO : 0;
|
|
}
|
|
|
|
static int usb4_port_idx(const struct tb_switch *sw, const struct tb_port *port)
|
|
{
|
|
struct tb_port *p;
|
|
int usb4_idx = 0;
|
|
|
|
/* Assume port is primary */
|
|
tb_switch_for_each_port(sw, p) {
|
|
if (!tb_port_is_null(p))
|
|
continue;
|
|
if (tb_is_upstream_port(p))
|
|
continue;
|
|
if (!p->link_nr) {
|
|
if (p == port)
|
|
break;
|
|
usb4_idx++;
|
|
}
|
|
}
|
|
|
|
return usb4_idx;
|
|
}
|
|
|
|
/**
|
|
* usb4_switch_map_pcie_down() - Map USB4 port to a PCIe downstream adapter
|
|
* @sw: USB4 router
|
|
* @port: USB4 port
|
|
*
|
|
* USB4 routers have direct mapping between USB4 ports and PCIe
|
|
* downstream adapters where the PCIe topology is extended. This
|
|
* function returns the corresponding downstream PCIe adapter or %NULL
|
|
* if no such mapping was possible.
|
|
*/
|
|
struct tb_port *usb4_switch_map_pcie_down(struct tb_switch *sw,
|
|
const struct tb_port *port)
|
|
{
|
|
int usb4_idx = usb4_port_idx(sw, port);
|
|
struct tb_port *p;
|
|
int pcie_idx = 0;
|
|
|
|
/* Find PCIe down port matching usb4_port */
|
|
tb_switch_for_each_port(sw, p) {
|
|
if (!tb_port_is_pcie_down(p))
|
|
continue;
|
|
|
|
if (pcie_idx == usb4_idx && !tb_pci_port_is_enabled(p))
|
|
return p;
|
|
|
|
pcie_idx++;
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
|
|
/**
|
|
* usb4_switch_map_usb3_down() - Map USB4 port to a USB3 downstream adapter
|
|
* @sw: USB4 router
|
|
* @port: USB4 port
|
|
*
|
|
* USB4 routers have direct mapping between USB4 ports and USB 3.x
|
|
* downstream adapters where the USB 3.x topology is extended. This
|
|
* function returns the corresponding downstream USB 3.x adapter or
|
|
* %NULL if no such mapping was possible.
|
|
*/
|
|
struct tb_port *usb4_switch_map_usb3_down(struct tb_switch *sw,
|
|
const struct tb_port *port)
|
|
{
|
|
int usb4_idx = usb4_port_idx(sw, port);
|
|
struct tb_port *p;
|
|
int usb_idx = 0;
|
|
|
|
/* Find USB3 down port matching usb4_port */
|
|
tb_switch_for_each_port(sw, p) {
|
|
if (!tb_port_is_usb3_down(p))
|
|
continue;
|
|
|
|
if (usb_idx == usb4_idx && !tb_usb3_port_is_enabled(p))
|
|
return p;
|
|
|
|
usb_idx++;
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
|
|
/**
|
|
* usb4_port_unlock() - Unlock USB4 downstream port
|
|
* @port: USB4 port to unlock
|
|
*
|
|
* Unlocks USB4 downstream port so that the connection manager can
|
|
* access the router below this port.
|
|
*/
|
|
int usb4_port_unlock(struct tb_port *port)
|
|
{
|
|
int ret;
|
|
u32 val;
|
|
|
|
ret = tb_port_read(port, &val, TB_CFG_PORT, ADP_CS_4, 1);
|
|
if (ret)
|
|
return ret;
|
|
|
|
val &= ~ADP_CS_4_LCK;
|
|
return tb_port_write(port, &val, TB_CFG_PORT, ADP_CS_4, 1);
|
|
}
|