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0953fb2637
Now that entry code handles IRQ entry (including setting the IRQ regs)
before calling irqchip code, irqchip code can safely call
generic_handle_domain_irq(), and there's no functional reason for it to
call handle_domain_irq().
Let's cement this split of responsibility and remove handle_domain_irq()
entirely, updating irqchip drivers to call generic_handle_domain_irq().
For consistency, handle_domain_nmi() is similarly removed and replaced
with a generic_handle_domain_nmi() function which also does not perform
any entry logic.
Previously handle_domain_{irq,nmi}() had a WARN_ON() which would fire
when they were called in an inappropriate context. So that we can
identify similar issues going forward, similar WARN_ON_ONCE() logic is
added to the generic_handle_*() functions, and comments are updated for
clarity and consistency.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
143 lines
3 KiB
Text
143 lines
3 KiB
Text
# SPDX-License-Identifier: GPL-2.0-only
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menu "IRQ subsystem"
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# Options selectable by the architecture code
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# Make sparse irq Kconfig switch below available
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config MAY_HAVE_SPARSE_IRQ
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bool
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# Legacy support, required for itanic
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config GENERIC_IRQ_LEGACY
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bool
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# Enable the generic irq autoprobe mechanism
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config GENERIC_IRQ_PROBE
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bool
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# Use the generic /proc/interrupts implementation
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config GENERIC_IRQ_SHOW
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bool
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# Print level/edge extra information
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config GENERIC_IRQ_SHOW_LEVEL
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bool
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# Supports effective affinity mask
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config GENERIC_IRQ_EFFECTIVE_AFF_MASK
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bool
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# Support for delayed migration from interrupt context
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config GENERIC_PENDING_IRQ
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bool
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# Support for generic irq migrating off cpu before the cpu is offline.
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config GENERIC_IRQ_MIGRATION
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bool
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# Alpha specific irq affinity mechanism
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config AUTO_IRQ_AFFINITY
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bool
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# Interrupt injection mechanism
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config GENERIC_IRQ_INJECTION
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bool
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# Tasklet based software resend for pending interrupts on enable_irq()
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config HARDIRQS_SW_RESEND
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bool
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# Edge style eoi based handler (cell)
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config IRQ_EDGE_EOI_HANDLER
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bool
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# Generic configurable interrupt chip implementation
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config GENERIC_IRQ_CHIP
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bool
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select IRQ_DOMAIN
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# Generic irq_domain hw <--> linux irq number translation
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config IRQ_DOMAIN
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bool
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# Support for simulated interrupts
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config IRQ_SIM
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bool
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select IRQ_WORK
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select IRQ_DOMAIN
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# Support for hierarchical irq domains
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config IRQ_DOMAIN_HIERARCHY
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bool
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select IRQ_DOMAIN
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# Support for obsolete non-mapping irq domains
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config IRQ_DOMAIN_NOMAP
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bool
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select IRQ_DOMAIN
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# Support for hierarchical fasteoi+edge and fasteoi+level handlers
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config IRQ_FASTEOI_HIERARCHY_HANDLERS
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bool
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# Generic IRQ IPI support
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config GENERIC_IRQ_IPI
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bool
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select IRQ_DOMAIN_HIERARCHY
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# Generic MSI interrupt support
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config GENERIC_MSI_IRQ
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bool
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# Generic MSI hierarchical interrupt domain support
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config GENERIC_MSI_IRQ_DOMAIN
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bool
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select IRQ_DOMAIN_HIERARCHY
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select GENERIC_MSI_IRQ
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config IRQ_MSI_IOMMU
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bool
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config IRQ_TIMINGS
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bool
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config GENERIC_IRQ_MATRIX_ALLOCATOR
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bool
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config GENERIC_IRQ_RESERVATION_MODE
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bool
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# Support forced irq threading
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config IRQ_FORCED_THREADING
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bool
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config SPARSE_IRQ
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bool "Support sparse irq numbering" if MAY_HAVE_SPARSE_IRQ
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help
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Sparse irq numbering is useful for distro kernels that want
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to define a high CONFIG_NR_CPUS value but still want to have
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low kernel memory footprint on smaller machines.
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( Sparse irqs can also be beneficial on NUMA boxes, as they spread
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out the interrupt descriptors in a more NUMA-friendly way. )
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If you don't know what to do here, say N.
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config GENERIC_IRQ_DEBUGFS
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bool "Expose irq internals in debugfs"
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depends on DEBUG_FS
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select GENERIC_IRQ_INJECTION
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default n
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help
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Exposes internal state information through debugfs. Mostly for
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developers and debugging of hard to diagnose interrupt problems.
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If you don't know what to do here, say N.
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endmenu
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config GENERIC_IRQ_MULTI_HANDLER
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bool
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help
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Allow to specify the low level IRQ handler at run time.
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