linux-stable/arch/x86/events
Stephane Eranian fc17db8aa4 perf/x86/intel: Check PEBS status correctly
The kernel cannot disambiguate when 2+ PEBS counters overflow at the
same time. This is what the comment for this code suggests.  However,
I see the comparison is done with the unfiltered p->status which is a
copy of IA32_PERF_GLOBAL_STATUS at the time of the sample. This
register contains more than the PEBS counter overflow bits. It also
includes many other bits which could also be set.

Signed-off-by: Namhyung Kim <namhyung@kernel.org>
Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20201126110922.317681-2-namhyung@kernel.org
2020-12-03 10:00:26 +01:00
..
amd x86/events/amd/iommu: Fix sizeof mismatch 2020-10-03 16:30:56 +02:00
intel perf/x86/intel: Check PEBS status correctly 2020-12-03 10:00:26 +01:00
zhaoxin x86/perf: Fix a typo 2020-07-22 10:22:08 +02:00
core.c These are the performance events changes for v5.10: 2020-10-12 14:14:35 -07:00
Kconfig treewide: replace '---help---' in Kconfig files with 'help' 2020-06-14 01:57:21 +09:00
Makefile perf/x86/rapl: Fix RAPL config variable bug 2020-06-02 11:52:56 +02:00
msr.c perf/x86/msr: Add Jasper Lake support 2020-09-29 09:57:02 +02:00
perf_event.h perf/x86/intel: Make anythread filter support conditional 2020-11-09 18:12:36 +01:00
probe.c perf/x86/rapl: Make perf_probe_msr() more robust and flexible 2020-05-28 07:58:55 +02:00
probe.h perf/x86: Add MSR probe interface 2019-06-24 19:28:31 +02:00
rapl.c perf/x86: fix sysfs type mismatches 2020-11-17 13:15:38 +01:00