1475 lines
31 KiB
Plaintext
1475 lines
31 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (C) 2020 MediaTek Inc.
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* Author: Seiya Wang <seiya.wang@mediatek.com>
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*/
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/dts-v1/;
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#include "mt8192.dtsi"
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#include "mt6359.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/spmi/spmi.h>
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/ {
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aliases {
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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i2c3 = &i2c3;
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i2c7 = &i2c7;
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mmc0 = &mmc0;
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mmc1 = &mmc1;
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0 0x40000000 0 0x80000000>;
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};
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backlight_lcd0: backlight-lcd0 {
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compatible = "pwm-backlight";
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pwms = <&pwm0 0 500000>;
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power-supply = <&ppvar_sys>;
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enable-gpios = <&pio 152 0>;
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brightness-levels = <0 1023>;
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num-interpolated-steps = <1023>;
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default-brightness-level = <576>;
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};
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dmic_codec: dmic-codec {
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compatible = "dmic-codec";
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num-channels = <2>;
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wakeup-delay-ms = <50>;
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};
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pp1000_dpbrdg: regulator-1v0-dpbrdg {
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compatible = "regulator-fixed";
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regulator-name = "pp1000_dpbrdg";
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pinctrl-names = "default";
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pinctrl-0 = <&pp1000_dpbrdg_en_pins>;
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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enable-active-high;
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regulator-boot-on;
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gpio = <&pio 19 GPIO_ACTIVE_HIGH>;
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vin-supply = <&mt6359_vs2_buck_reg>;
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};
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pp1000_mipibrdg: regulator-1v0-mipibrdg {
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compatible = "regulator-fixed";
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regulator-name = "pp1000_mipibrdg";
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pinctrl-names = "default";
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pinctrl-0 = <&pp1000_mipibrdg_en_pins>;
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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enable-active-high;
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regulator-boot-on;
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gpio = <&pio 129 GPIO_ACTIVE_HIGH>;
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vin-supply = <&mt6359_vs2_buck_reg>;
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};
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pp1800_dpbrdg: regulator-1v8-dpbrdg {
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compatible = "regulator-fixed";
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regulator-name = "pp1800_dpbrdg";
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pinctrl-names = "default";
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pinctrl-0 = <&pp1800_dpbrdg_en_pins>;
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enable-active-high;
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regulator-boot-on;
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gpio = <&pio 126 GPIO_ACTIVE_HIGH>;
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vin-supply = <&mt6359_vio18_ldo_reg>;
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};
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/* system wide LDO 1.8V power rail */
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pp1800_ldo_g: regulator-1v8-g {
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compatible = "regulator-fixed";
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regulator-name = "pp1800_ldo_g";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&pp3300_g>;
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};
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pp1800_mipibrdg: regulator-1v8-mipibrdg {
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compatible = "regulator-fixed";
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regulator-name = "pp1800_mipibrdg";
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pinctrl-names = "default";
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pinctrl-0 = <&pp1800_mipibrdg_en_pins>;
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enable-active-high;
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regulator-boot-on;
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gpio = <&pio 128 GPIO_ACTIVE_HIGH>;
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vin-supply = <&mt6359_vio18_ldo_reg>;
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};
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pp3300_dpbrdg: regulator-3v3-dpbrdg {
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compatible = "regulator-fixed";
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regulator-name = "pp3300_dpbrdg";
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pinctrl-names = "default";
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pinctrl-0 = <&pp3300_dpbrdg_en_pins>;
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enable-active-high;
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regulator-boot-on;
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gpio = <&pio 26 GPIO_ACTIVE_HIGH>;
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vin-supply = <&pp3300_g>;
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};
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/* system wide switching 3.3V power rail */
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pp3300_g: regulator-3v3-g {
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compatible = "regulator-fixed";
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regulator-name = "pp3300_g";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&ppvar_sys>;
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};
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/* system wide LDO 3.3V power rail */
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pp3300_ldo_z: regulator-3v3-z {
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compatible = "regulator-fixed";
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regulator-name = "pp3300_ldo_z";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&ppvar_sys>;
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};
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pp3300_mipibrdg: regulator-3v3-mipibrdg {
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compatible = "regulator-fixed";
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regulator-name = "pp3300_mipibrdg";
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pinctrl-names = "default";
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pinctrl-0 = <&pp3300_mipibrdg_en_pins>;
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enable-active-high;
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regulator-boot-on;
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gpio = <&pio 127 GPIO_ACTIVE_HIGH>;
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vin-supply = <&pp3300_g>;
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};
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/* separately switched 3.3V power rail */
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pp3300_u: regulator-3v3-u {
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compatible = "regulator-fixed";
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regulator-name = "pp3300_u";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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/* enable pin wired to GPIO controlled by EC */
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vin-supply = <&pp3300_g>;
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};
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pp3300_wlan: regulator-3v3-wlan {
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compatible = "regulator-fixed";
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regulator-name = "pp3300_wlan";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pp3300_wlan_pins>;
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enable-active-high;
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gpio = <&pio 143 GPIO_ACTIVE_HIGH>;
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};
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/* system wide switching 5.0V power rail */
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pp5000_a: regulator-5v0-a {
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compatible = "regulator-fixed";
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regulator-name = "pp5000_a";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&ppvar_sys>;
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};
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/* system wide semi-regulated power rail from battery or USB */
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ppvar_sys: regulator-var-sys {
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compatible = "regulator-fixed";
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regulator-name = "ppvar_sys";
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regulator-always-on;
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regulator-boot-on;
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};
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reserved_memory: reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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scp_mem_reserved: scp@50000000 {
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compatible = "shared-dma-pool";
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reg = <0 0x50000000 0 0x2900000>;
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no-map;
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};
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wifi_restricted_dma_region: wifi@c0000000 {
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compatible = "restricted-dma-pool";
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reg = <0 0xc0000000 0 0x4000000>;
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};
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};
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rt1015p: audio-codec {
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compatible = "realtek,rt1015p";
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pinctrl-names = "default";
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pinctrl-0 = <&rt1015p_pins>;
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sdb-gpios = <&pio 147 GPIO_ACTIVE_HIGH>;
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#sound-dai-cells = <0>;
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};
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sound: sound {
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mediatek,platform = <&afe>;
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pinctrl-names = "aud_clk_mosi_off",
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"aud_clk_mosi_on",
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"aud_dat_mosi_off",
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"aud_dat_mosi_on",
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"aud_dat_miso_off",
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"aud_dat_miso_on",
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"vow_dat_miso_off",
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"vow_dat_miso_on",
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"vow_clk_miso_off",
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"vow_clk_miso_on",
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"aud_nle_mosi_off",
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"aud_nle_mosi_on",
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"aud_dat_miso2_off",
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"aud_dat_miso2_on",
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"aud_gpio_i2s3_off",
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"aud_gpio_i2s3_on",
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"aud_gpio_i2s8_off",
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"aud_gpio_i2s8_on",
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"aud_gpio_i2s9_off",
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"aud_gpio_i2s9_on",
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"aud_dat_mosi_ch34_off",
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"aud_dat_mosi_ch34_on",
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"aud_dat_miso_ch34_off",
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"aud_dat_miso_ch34_on",
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"aud_gpio_tdm_off",
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"aud_gpio_tdm_on";
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pinctrl-0 = <&aud_clk_mosi_off_pins>;
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pinctrl-1 = <&aud_clk_mosi_on_pins>;
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pinctrl-2 = <&aud_dat_mosi_off_pins>;
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pinctrl-3 = <&aud_dat_mosi_on_pins>;
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pinctrl-4 = <&aud_dat_miso_off_pins>;
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pinctrl-5 = <&aud_dat_miso_on_pins>;
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pinctrl-6 = <&vow_dat_miso_off_pins>;
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pinctrl-7 = <&vow_dat_miso_on_pins>;
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pinctrl-8 = <&vow_clk_miso_off_pins>;
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pinctrl-9 = <&vow_clk_miso_on_pins>;
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pinctrl-10 = <&aud_nle_mosi_off_pins>;
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pinctrl-11 = <&aud_nle_mosi_on_pins>;
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pinctrl-12 = <&aud_dat_miso2_off_pins>;
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pinctrl-13 = <&aud_dat_miso2_on_pins>;
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pinctrl-14 = <&aud_gpio_i2s3_off_pins>;
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pinctrl-15 = <&aud_gpio_i2s3_on_pins>;
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pinctrl-16 = <&aud_gpio_i2s8_off_pins>;
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pinctrl-17 = <&aud_gpio_i2s8_on_pins>;
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pinctrl-18 = <&aud_gpio_i2s9_off_pins>;
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pinctrl-19 = <&aud_gpio_i2s9_on_pins>;
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pinctrl-20 = <&aud_dat_mosi_ch34_off_pins>;
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pinctrl-21 = <&aud_dat_mosi_ch34_on_pins>;
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pinctrl-22 = <&aud_dat_miso_ch34_off_pins>;
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pinctrl-23 = <&aud_dat_miso_ch34_on_pins>;
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pinctrl-24 = <&aud_gpio_tdm_off_pins>;
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pinctrl-25 = <&aud_gpio_tdm_on_pins>;
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};
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};
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&dsi0 {
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status = "okay";
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};
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&dsi_out {
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remote-endpoint = <&anx7625_in>;
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};
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&gic {
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mediatek,broken-save-restore-fw;
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};
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&gpu {
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mali-supply = <&mt6315_7_vbuck1>;
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins>;
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touchscreen: touchscreen@10 {
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reg = <0x10>;
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interrupts-extended = <&pio 21 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&touchscreen_pins>;
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};
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};
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&i2c1 {
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status = "okay";
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pins>;
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rt5682: audio-codec@1a {
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/* Realtek RT5682i or RT5682s, sharing the same configuration */
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reg = <0x1a>;
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interrupts-extended = <&pio 18 IRQ_TYPE_LEVEL_LOW>;
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realtek,jd-src = <1>;
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#sound-dai-cells = <1>;
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AVDD-supply = <&mt6359_vio18_ldo_reg>;
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DBVDD-supply = <&mt6359_vio18_ldo_reg>;
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LDO1-IN-supply = <&mt6359_vio18_ldo_reg>;
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MICVDD-supply = <&pp3300_g>;
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};
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};
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&i2c2 {
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status = "okay";
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clock-frequency = <400000>;
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clock-stretch-ns = <12600>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_pins>;
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trackpad@15 {
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compatible = "elan,ekth3000";
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reg = <0x15>;
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interrupts-extended = <&pio 15 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&trackpad_pins>;
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vcc-supply = <&pp3300_u>;
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wakeup-source;
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};
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};
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&i2c3 {
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status = "okay";
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c3_pins>;
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anx_bridge: anx7625@58 {
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compatible = "analogix,anx7625";
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reg = <0x58>;
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pinctrl-names = "default";
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pinctrl-0 = <&anx7625_pins>;
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enable-gpios = <&pio 41 GPIO_ACTIVE_HIGH>;
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reset-gpios = <&pio 42 GPIO_ACTIVE_HIGH>;
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vdd10-supply = <&pp1000_mipibrdg>;
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vdd18-supply = <&pp1800_mipibrdg>;
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vdd33-supply = <&pp3300_mipibrdg>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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anx7625_in: endpoint {
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remote-endpoint = <&dsi_out>;
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};
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};
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port@1 {
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reg = <1>;
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anx7625_out: endpoint {
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remote-endpoint = <&panel_in>;
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};
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};
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};
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aux-bus {
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panel: panel {
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compatible = "edp-panel";
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power-supply = <&pp3300_mipibrdg>;
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backlight = <&backlight_lcd0>;
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port {
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panel_in: endpoint {
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remote-endpoint = <&anx7625_out>;
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};
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};
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};
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};
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};
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};
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&i2c7 {
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status = "okay";
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c7_pins>;
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};
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&mfg0 {
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domain-supply = <&mt6315_7_vbuck1>;
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};
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&mfg1 {
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domain-supply = <&mt6359_vsram_others_ldo_reg>;
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};
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&mipi_tx0 {
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status = "okay";
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};
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&mmc0 {
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status = "okay";
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&mmc0_default_pins>;
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pinctrl-1 = <&mmc0_uhs_pins>;
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bus-width = <8>;
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max-frequency = <200000000>;
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vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
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vqmmc-supply = <&mt6359_vufs_ldo_reg>;
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cap-mmc-highspeed;
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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supports-cqe;
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cap-mmc-hw-reset;
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mmc-hs400-enhanced-strobe;
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hs400-ds-delay = <0x12814>;
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no-sdio;
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no-sd;
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non-removable;
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};
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&mmc1 {
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status = "okay";
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&mmc1_default_pins>;
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pinctrl-1 = <&mmc1_uhs_pins>;
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bus-width = <4>;
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max-frequency = <200000000>;
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cd-gpios = <&pio 17 GPIO_ACTIVE_LOW>;
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vmmc-supply = <&mt6360_ldo5_reg>;
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vqmmc-supply = <&mt6360_ldo3_reg>;
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cap-sd-highspeed;
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sd-uhs-sdr50;
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sd-uhs-sdr104;
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no-sdio;
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no-mmc;
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};
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/* for CORE */
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&mt6359_vgpu11_buck_reg {
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regulator-always-on;
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};
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&mt6359_vgpu11_sshub_buck_reg {
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regulator-always-on;
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regulator-min-microvolt = <575000>;
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regulator-max-microvolt = <575000>;
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};
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&mt6359_vrf12_ldo_reg {
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regulator-always-on;
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};
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&mt6359_vsram_others_ldo_reg {
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regulator-min-microvolt = <750000>;
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regulator-max-microvolt = <800000>;
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regulator-coupled-with = <&mt6315_7_vbuck1>;
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regulator-coupled-max-spread = <10000>;
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};
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&mt6359_vufs_ldo_reg {
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regulator-always-on;
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};
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&mt6359codec {
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mediatek,dmic-mode = <1>; /* one-wire */
|
|
mediatek,mic-type-0 = <2>; /* DMIC */
|
|
mediatek,mic-type-2 = <2>; /* DMIC */
|
|
};
|
|
|
|
&nor_flash {
|
|
status = "okay";
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&nor_flash_pins>;
|
|
assigned-clocks = <&topckgen CLK_TOP_SFLASH_SEL>;
|
|
assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D6_D8>;
|
|
|
|
flash@0 {
|
|
compatible = "winbond,w25q64jwm", "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <52000000>;
|
|
spi-rx-bus-width = <2>;
|
|
spi-tx-bus-width = <2>;
|
|
};
|
|
};
|
|
|
|
&pcie {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pcie_pins>;
|
|
|
|
pcie0: pcie@0,0 {
|
|
device_type = "pci";
|
|
reg = <0x0000 0 0 0 0>;
|
|
num-lanes = <1>;
|
|
bus-range = <0x1 0x1>;
|
|
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
ranges;
|
|
|
|
wifi: wifi@0,0 {
|
|
reg = <0x10000 0 0 0 0x100000>,
|
|
<0x10000 0 0x100000 0 0x100000>;
|
|
memory-region = <&wifi_restricted_dma_region>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pio {
|
|
/* 220 lines */
|
|
gpio-line-names = "I2S_DP_LRCK",
|
|
"IS_DP_BCLK",
|
|
"I2S_DP_MCLK",
|
|
"I2S_DP_DATAOUT",
|
|
"SAR0_INT_ODL",
|
|
"EC_AP_INT_ODL",
|
|
"EDPBRDG_INT_ODL",
|
|
"DPBRDG_INT_ODL",
|
|
"DPBRDG_PWREN",
|
|
"DPBRDG_RST_ODL",
|
|
"I2S_HP_MCLK",
|
|
"I2S_HP_BCK",
|
|
"I2S_HP_LRCK",
|
|
"I2S_HP_DATAIN",
|
|
/*
|
|
* AP_FLASH_WP_L is crossystem ABI. Schematics
|
|
* call it AP_FLASH_WP_ODL.
|
|
*/
|
|
"AP_FLASH_WP_L",
|
|
"TRACKPAD_INT_ODL",
|
|
"EC_AP_HPD_OD",
|
|
"SD_CD_ODL",
|
|
"HP_INT_ODL_ALC",
|
|
"EN_PP1000_DPBRDG",
|
|
"AP_GPIO20",
|
|
"TOUCH_INT_L_1V8",
|
|
"UART_BT_WAKE_ODL",
|
|
"AP_GPIO23",
|
|
"AP_SPI_FLASH_CS_L",
|
|
"AP_SPI_FLASH_CLK",
|
|
"EN_PP3300_DPBRDG_DX",
|
|
"AP_SPI_FLASH_MOSI",
|
|
"AP_SPI_FLASH_MISO",
|
|
"I2S_HP_DATAOUT",
|
|
"AP_GPIO30",
|
|
"I2S_SPKR_MCLK",
|
|
"I2S_SPKR_BCLK",
|
|
"I2S_SPKR_LRCK",
|
|
"I2S_SPKR_DATAIN",
|
|
"I2S_SPKR_DATAOUT",
|
|
"AP_SPI_H1_TPM_CLK",
|
|
"AP_SPI_H1_TPM_CS_L",
|
|
"AP_SPI_H1_TPM_MISO",
|
|
"AP_SPI_H1_TPM_MOSI",
|
|
"BL_PWM",
|
|
"EDPBRDG_PWREN",
|
|
"EDPBRDG_RST_ODL",
|
|
"EN_PP3300_HUB",
|
|
"HUB_RST_L",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"SD_CLK",
|
|
"SD_CMD",
|
|
"SD_DATA3",
|
|
"SD_DATA0",
|
|
"SD_DATA2",
|
|
"SD_DATA1",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"PCIE_WAKE_ODL",
|
|
"PCIE_RST_L",
|
|
"PCIE_CLKREQ_ODL",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"SPMI_SCL",
|
|
"SPMI_SDA",
|
|
"AP_GOOD",
|
|
"UART_DBG_TX_AP_RX",
|
|
"UART_AP_TX_DBG_RX",
|
|
"UART_AP_TX_BT_RX",
|
|
"UART_BT_TX_AP_RX",
|
|
"MIPI_DPI_D0_R",
|
|
"MIPI_DPI_D1_R",
|
|
"MIPI_DPI_D2_R",
|
|
"MIPI_DPI_D3_R",
|
|
"MIPI_DPI_D4_R",
|
|
"MIPI_DPI_D5_R",
|
|
"MIPI_DPI_D6_R",
|
|
"MIPI_DPI_D7_R",
|
|
"MIPI_DPI_D8_R",
|
|
"MIPI_DPI_D9_R",
|
|
"MIPI_DPI_D10_R",
|
|
"",
|
|
"",
|
|
"MIPI_DPI_DE_R",
|
|
"MIPI_DPI_D11_R",
|
|
"MIPI_DPI_VSYNC_R",
|
|
"MIPI_DPI_CLK_R",
|
|
"MIPI_DPI_HSYNC_R",
|
|
"PCM_BT_DATAIN",
|
|
"PCM_BT_SYNC",
|
|
"PCM_BT_DATAOUT",
|
|
"PCM_BT_CLK",
|
|
"AP_I2C_AUDIO_SCL",
|
|
"AP_I2C_AUDIO_SDA",
|
|
"SCP_I2C_SCL",
|
|
"SCP_I2C_SDA",
|
|
"AP_I2C_WLAN_SCL",
|
|
"AP_I2C_WLAN_SDA",
|
|
"AP_I2C_DPBRDG_SCL",
|
|
"AP_I2C_DPBRDG_SDA",
|
|
"EN_PP1800_DPBRDG_DX",
|
|
"EN_PP3300_EDP_DX",
|
|
"EN_PP1800_EDPBRDG_DX",
|
|
"EN_PP1000_EDPBRDG",
|
|
"SCP_JTAG0_TDO",
|
|
"SCP_JTAG0_TDI",
|
|
"SCP_JTAG0_TMS",
|
|
"SCP_JTAG0_TCK",
|
|
"SCP_JTAG0_TRSTN",
|
|
"EN_PP3000_VMC_PMU",
|
|
"EN_PP3300_DISPLAY_DX",
|
|
"TOUCH_RST_L_1V8",
|
|
"TOUCH_REPORT_DISABLE",
|
|
"",
|
|
"",
|
|
"AP_I2C_TRACKPAD_SCL_1V8",
|
|
"AP_I2C_TRACKPAD_SDA_1V8",
|
|
"EN_PP3300_WLAN",
|
|
"BT_KILL_L",
|
|
"WIFI_KILL_L",
|
|
"SET_VMC_VOLT_AT_1V8",
|
|
"EN_SPK",
|
|
"AP_WARM_RST_REQ",
|
|
"",
|
|
"",
|
|
"EN_PP3000_SD_S3",
|
|
"AP_EDP_BKLTEN",
|
|
"",
|
|
"",
|
|
"",
|
|
"AP_SPI_EC_CLK",
|
|
"AP_SPI_EC_CS_L",
|
|
"AP_SPI_EC_MISO",
|
|
"AP_SPI_EC_MOSI",
|
|
"AP_I2C_EDPBRDG_SCL",
|
|
"AP_I2C_EDPBRDG_SDA",
|
|
"MT6315_PROC_INT",
|
|
"MT6315_GPU_INT",
|
|
"UART_SERVO_TX_SCP_RX",
|
|
"UART_SCP_TX_SERVO_RX",
|
|
"BT_RTS_AP_CTS",
|
|
"AP_RTS_BT_CTS",
|
|
"UART_AP_WAKE_BT_ODL",
|
|
"WLAN_ALERT_ODL",
|
|
"EC_IN_RW_ODL",
|
|
"H1_AP_INT_ODL",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"MSDC0_CMD",
|
|
"MSDC0_DAT0",
|
|
"MSDC0_DAT2",
|
|
"MSDC0_DAT4",
|
|
"MSDC0_DAT6",
|
|
"MSDC0_DAT1",
|
|
"MSDC0_DAT5",
|
|
"MSDC0_DAT7",
|
|
"MSDC0_DSL",
|
|
"MSDC0_CLK",
|
|
"MSDC0_DAT3",
|
|
"MSDC0_RST_L",
|
|
"SCP_VREQ_VAO",
|
|
"AUD_DAT_MOSI2",
|
|
"AUD_NLE_MOSI1",
|
|
"AUD_NLE_MOSI0",
|
|
"AUD_DAT_MISO2",
|
|
"AP_I2C_SAR_SDA",
|
|
"AP_I2C_SAR_SCL",
|
|
"AP_I2C_PWR_SCL",
|
|
"AP_I2C_PWR_SDA",
|
|
"AP_I2C_TS_SCL_1V8",
|
|
"AP_I2C_TS_SDA_1V8",
|
|
"SRCLKENA0",
|
|
"SRCLKENA1",
|
|
"AP_EC_WATCHDOG_L",
|
|
"PWRAP_SPI0_MI",
|
|
"PWRAP_SPI0_CSN",
|
|
"PWRAP_SPI0_MO",
|
|
"PWRAP_SPI0_CK",
|
|
"AP_RTC_CLK32K",
|
|
"AUD_CLK_MOSI",
|
|
"AUD_SYNC_MOSI",
|
|
"AUD_DAT_MOSI0",
|
|
"AUD_DAT_MOSI1",
|
|
"AUD_DAT_MISO0",
|
|
"AUD_DAT_MISO1";
|
|
|
|
anx7625_pins: anx7625-default-pins {
|
|
pins-out {
|
|
pinmux = <PINMUX_GPIO41__FUNC_GPIO41>,
|
|
<PINMUX_GPIO42__FUNC_GPIO42>;
|
|
output-low;
|
|
};
|
|
|
|
pins-in {
|
|
pinmux = <PINMUX_GPIO6__FUNC_GPIO6>;
|
|
input-enable;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
aud_clk_mosi_off_pins: aud-clk-mosi-off-pins {
|
|
pins-mosi-off {
|
|
pinmux = <PINMUX_GPIO214__FUNC_GPIO214>,
|
|
<PINMUX_GPIO215__FUNC_GPIO215>;
|
|
};
|
|
};
|
|
|
|
aud_clk_mosi_on_pins: aud-clk-mosi-on-pins {
|
|
pins-mosi-on {
|
|
pinmux = <PINMUX_GPIO214__FUNC_AUD_CLK_MOSI>,
|
|
<PINMUX_GPIO215__FUNC_AUD_SYNC_MOSI>;
|
|
drive-strength = <10>;
|
|
};
|
|
};
|
|
|
|
aud_dat_miso_ch34_off_pins: aud-dat-miso-ch34-off-pins {
|
|
pins-miso-off {
|
|
pinmux = <PINMUX_GPIO199__FUNC_GPIO199>;
|
|
};
|
|
};
|
|
|
|
aud_dat_miso_ch34_on_pins: aud-dat-miso-ch34-on-pins {
|
|
pins-miso-on {
|
|
pinmux = <PINMUX_GPIO199__FUNC_AUD_DAT_MISO2>;
|
|
};
|
|
};
|
|
|
|
aud_dat_miso_off_pins: aud-dat-miso-off-pins {
|
|
pins-miso-off {
|
|
pinmux = <PINMUX_GPIO218__FUNC_GPIO218>,
|
|
<PINMUX_GPIO219__FUNC_GPIO219>;
|
|
};
|
|
};
|
|
|
|
aud_dat_miso_on_pins: aud-dat-miso-on-pins {
|
|
pins-miso-on {
|
|
pinmux = <PINMUX_GPIO218__FUNC_AUD_DAT_MISO0>,
|
|
<PINMUX_GPIO219__FUNC_AUD_DAT_MISO1>;
|
|
drive-strength = <10>;
|
|
};
|
|
};
|
|
|
|
aud_dat_miso2_off_pins: aud-dat-miso2-off-pins {
|
|
pins-miso-off {
|
|
pinmux = <PINMUX_GPIO199__FUNC_GPIO199>;
|
|
};
|
|
};
|
|
|
|
aud_dat_miso2_on_pins: aud-dat-miso2-on-pins {
|
|
pins-miso-on {
|
|
pinmux = <PINMUX_GPIO199__FUNC_AUD_DAT_MISO2>;
|
|
};
|
|
};
|
|
|
|
aud_dat_mosi_ch34_off_pins: aud-dat-mosi-ch34-off-pins {
|
|
pins-mosi-off {
|
|
pinmux = <PINMUX_GPIO196__FUNC_GPIO196>;
|
|
};
|
|
};
|
|
|
|
aud_dat_mosi_ch34_on_pins: aud-dat-mosi-ch34-on-pins {
|
|
pins-mosi-on {
|
|
pinmux = <PINMUX_GPIO196__FUNC_AUD_DAT_MOSI2>;
|
|
};
|
|
};
|
|
|
|
aud_dat_mosi_off_pins: aud-dat-mosi-off-pins {
|
|
pins-mosi-off {
|
|
pinmux = <PINMUX_GPIO216__FUNC_GPIO216>,
|
|
<PINMUX_GPIO217__FUNC_GPIO217>;
|
|
};
|
|
};
|
|
|
|
aud_dat_mosi_on_pins: aud-dat-mosi-on-pins {
|
|
pins-mosi-on {
|
|
pinmux = <PINMUX_GPIO216__FUNC_AUD_DAT_MOSI0>,
|
|
<PINMUX_GPIO217__FUNC_AUD_DAT_MOSI1>;
|
|
drive-strength = <10>;
|
|
};
|
|
};
|
|
|
|
aud_gpio_i2s3_off_pins: aud-gpio-i2s3-off-pins {
|
|
pins-i2s3-off {
|
|
pinmux = <PINMUX_GPIO32__FUNC_GPIO32>,
|
|
<PINMUX_GPIO33__FUNC_GPIO33>,
|
|
<PINMUX_GPIO35__FUNC_GPIO35>;
|
|
};
|
|
};
|
|
|
|
aud_gpio_i2s3_on_pins: aud-gpio-i2s3-on-pins {
|
|
pins-i2s3-on {
|
|
pinmux = <PINMUX_GPIO32__FUNC_I2S3_BCK>,
|
|
<PINMUX_GPIO33__FUNC_I2S3_LRCK>,
|
|
<PINMUX_GPIO35__FUNC_I2S3_DO>;
|
|
};
|
|
};
|
|
|
|
aud_gpio_i2s8_off_pins: aud-gpio-i2s8-off-pins {
|
|
pins-i2s8-off {
|
|
pinmux = <PINMUX_GPIO10__FUNC_GPIO10>,
|
|
<PINMUX_GPIO11__FUNC_GPIO11>,
|
|
<PINMUX_GPIO12__FUNC_GPIO12>,
|
|
<PINMUX_GPIO13__FUNC_GPIO13>;
|
|
};
|
|
};
|
|
|
|
aud_gpio_i2s8_on_pins: aud-gpio-i2s8-on-pins {
|
|
pins-i2s8-on {
|
|
pinmux = <PINMUX_GPIO10__FUNC_I2S8_MCK>,
|
|
<PINMUX_GPIO11__FUNC_I2S8_BCK>,
|
|
<PINMUX_GPIO12__FUNC_I2S8_LRCK>,
|
|
<PINMUX_GPIO13__FUNC_I2S8_DI>;
|
|
};
|
|
};
|
|
|
|
aud_gpio_i2s9_off_pins: aud-gpio-i2s9-off-pins {
|
|
pins-i2s9-off {
|
|
pinmux = <PINMUX_GPIO29__FUNC_GPIO29>;
|
|
};
|
|
};
|
|
|
|
aud_gpio_i2s9_on_pins: aud-gpio-i2s9-on-pins {
|
|
pins-i2s9-on {
|
|
pinmux = <PINMUX_GPIO29__FUNC_I2S9_DO>;
|
|
};
|
|
};
|
|
|
|
aud_gpio_tdm_off_pins: aud-gpio-tdm-off-pins {
|
|
pins-tdm-off {
|
|
pinmux = <PINMUX_GPIO0__FUNC_GPIO0>,
|
|
<PINMUX_GPIO1__FUNC_GPIO1>,
|
|
<PINMUX_GPIO2__FUNC_GPIO2>,
|
|
<PINMUX_GPIO3__FUNC_GPIO3>;
|
|
};
|
|
};
|
|
|
|
aud_gpio_tdm_on_pins: aud-gpio-tdm-on-pins {
|
|
pins-tdm-on {
|
|
pinmux = <PINMUX_GPIO0__FUNC_TDM_LRCK>,
|
|
<PINMUX_GPIO1__FUNC_TDM_BCK>,
|
|
<PINMUX_GPIO2__FUNC_TDM_MCK>,
|
|
<PINMUX_GPIO3__FUNC_TDM_DATA0>;
|
|
};
|
|
};
|
|
|
|
aud_nle_mosi_off_pins: aud-nle-mosi-off-pins {
|
|
pins-nle-mosi-off {
|
|
pinmux = <PINMUX_GPIO197__FUNC_GPIO197>,
|
|
<PINMUX_GPIO198__FUNC_GPIO198>;
|
|
};
|
|
};
|
|
|
|
aud_nle_mosi_on_pins: aud-nle-mosi-on-pins {
|
|
pins-nle-mosi-on {
|
|
pinmux = <PINMUX_GPIO197__FUNC_AUD_NLE_MOSI1>,
|
|
<PINMUX_GPIO198__FUNC_AUD_NLE_MOSI0>;
|
|
};
|
|
};
|
|
|
|
cr50_int: cr50-irq-default-pins {
|
|
pins-gsc-ap-int-odl {
|
|
pinmux = <PINMUX_GPIO171__FUNC_GPIO171>;
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
cros_ec_int: cros-ec-irq-default-pins {
|
|
pins-ec-ap-int-odl {
|
|
pinmux = <PINMUX_GPIO5__FUNC_GPIO5>;
|
|
input-enable;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
i2c0_pins: i2c0-default-pins {
|
|
pins-bus {
|
|
pinmux = <PINMUX_GPIO204__FUNC_SCL0>,
|
|
<PINMUX_GPIO205__FUNC_SDA0>;
|
|
bias-pull-up = <MTK_PULL_SET_RSEL_011>;
|
|
drive-strength-microamp = <1000>;
|
|
};
|
|
};
|
|
|
|
i2c1_pins: i2c1-default-pins {
|
|
pins-bus {
|
|
pinmux = <PINMUX_GPIO118__FUNC_SCL1>,
|
|
<PINMUX_GPIO119__FUNC_SDA1>;
|
|
bias-pull-up = <MTK_PULL_SET_RSEL_011>;
|
|
drive-strength-microamp = <1000>;
|
|
};
|
|
};
|
|
|
|
i2c2_pins: i2c2-default-pins {
|
|
pins-bus {
|
|
pinmux = <PINMUX_GPIO141__FUNC_SCL2>,
|
|
<PINMUX_GPIO142__FUNC_SDA2>;
|
|
bias-pull-up = <MTK_PULL_SET_RSEL_011>;
|
|
};
|
|
};
|
|
|
|
i2c3_pins: i2c3-default-pins {
|
|
pins-bus {
|
|
pinmux = <PINMUX_GPIO160__FUNC_SCL3>,
|
|
<PINMUX_GPIO161__FUNC_SDA3>;
|
|
bias-disable;
|
|
drive-strength-microamp = <1000>;
|
|
};
|
|
};
|
|
|
|
i2c7_pins: i2c7-default-pins {
|
|
pins-bus {
|
|
pinmux = <PINMUX_GPIO124__FUNC_SCL7>,
|
|
<PINMUX_GPIO125__FUNC_SDA7>;
|
|
bias-disable;
|
|
drive-strength-microamp = <1000>;
|
|
};
|
|
};
|
|
|
|
mmc0_default_pins: mmc0-default-pins {
|
|
pins-cmd-dat {
|
|
pinmux = <PINMUX_GPIO184__FUNC_MSDC0_DAT0>,
|
|
<PINMUX_GPIO188__FUNC_MSDC0_DAT1>,
|
|
<PINMUX_GPIO185__FUNC_MSDC0_DAT2>,
|
|
<PINMUX_GPIO193__FUNC_MSDC0_DAT3>,
|
|
<PINMUX_GPIO186__FUNC_MSDC0_DAT4>,
|
|
<PINMUX_GPIO189__FUNC_MSDC0_DAT5>,
|
|
<PINMUX_GPIO187__FUNC_MSDC0_DAT6>,
|
|
<PINMUX_GPIO190__FUNC_MSDC0_DAT7>,
|
|
<PINMUX_GPIO183__FUNC_MSDC0_CMD>;
|
|
input-enable;
|
|
drive-strength = <8>;
|
|
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
|
|
};
|
|
|
|
pins-clk {
|
|
pinmux = <PINMUX_GPIO192__FUNC_MSDC0_CLK>;
|
|
drive-strength = <8>;
|
|
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
|
|
};
|
|
|
|
pins-rst {
|
|
pinmux = <PINMUX_GPIO194__FUNC_MSDC0_RSTB>;
|
|
drive-strength = <8>;
|
|
bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
|
|
};
|
|
};
|
|
|
|
mmc0_uhs_pins: mmc0-uhs-pins {
|
|
pins-cmd-dat {
|
|
pinmux = <PINMUX_GPIO184__FUNC_MSDC0_DAT0>,
|
|
<PINMUX_GPIO188__FUNC_MSDC0_DAT1>,
|
|
<PINMUX_GPIO185__FUNC_MSDC0_DAT2>,
|
|
<PINMUX_GPIO193__FUNC_MSDC0_DAT3>,
|
|
<PINMUX_GPIO186__FUNC_MSDC0_DAT4>,
|
|
<PINMUX_GPIO189__FUNC_MSDC0_DAT5>,
|
|
<PINMUX_GPIO187__FUNC_MSDC0_DAT6>,
|
|
<PINMUX_GPIO190__FUNC_MSDC0_DAT7>,
|
|
<PINMUX_GPIO183__FUNC_MSDC0_CMD>;
|
|
input-enable;
|
|
drive-strength = <10>;
|
|
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
|
|
};
|
|
|
|
pins-clk {
|
|
pinmux = <PINMUX_GPIO192__FUNC_MSDC0_CLK>;
|
|
drive-strength = <10>;
|
|
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
|
|
};
|
|
|
|
pins-rst {
|
|
pinmux = <PINMUX_GPIO194__FUNC_MSDC0_RSTB>;
|
|
drive-strength = <8>;
|
|
bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
|
|
};
|
|
|
|
pins-ds {
|
|
pinmux = <PINMUX_GPIO191__FUNC_MSDC0_DSL>;
|
|
drive-strength = <10>;
|
|
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
|
|
};
|
|
};
|
|
|
|
mmc1_default_pins: mmc1-default-pins {
|
|
pins-cmd-dat {
|
|
pinmux = <PINMUX_GPIO54__FUNC_MSDC1_DAT0>,
|
|
<PINMUX_GPIO56__FUNC_MSDC1_DAT1>,
|
|
<PINMUX_GPIO55__FUNC_MSDC1_DAT2>,
|
|
<PINMUX_GPIO53__FUNC_MSDC1_DAT3>,
|
|
<PINMUX_GPIO52__FUNC_MSDC1_CMD>;
|
|
input-enable;
|
|
drive-strength = <8>;
|
|
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
|
|
};
|
|
|
|
pins-clk {
|
|
pinmux = <PINMUX_GPIO51__FUNC_MSDC1_CLK>;
|
|
drive-strength = <8>;
|
|
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
|
|
};
|
|
|
|
pins-insert {
|
|
pinmux = <PINMUX_GPIO17__FUNC_GPIO17>;
|
|
input-enable;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
mmc1_uhs_pins: mmc1-uhs-pins {
|
|
pins-cmd-dat {
|
|
pinmux = <PINMUX_GPIO54__FUNC_MSDC1_DAT0>,
|
|
<PINMUX_GPIO56__FUNC_MSDC1_DAT1>,
|
|
<PINMUX_GPIO55__FUNC_MSDC1_DAT2>,
|
|
<PINMUX_GPIO53__FUNC_MSDC1_DAT3>,
|
|
<PINMUX_GPIO52__FUNC_MSDC1_CMD>;
|
|
input-enable;
|
|
drive-strength = <8>;
|
|
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
|
|
};
|
|
|
|
pins-clk {
|
|
pinmux = <PINMUX_GPIO51__FUNC_MSDC1_CLK>;
|
|
input-enable;
|
|
drive-strength = <8>;
|
|
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
|
|
};
|
|
};
|
|
|
|
nor_flash_pins: nor-flash-default-pins {
|
|
pins-cs-io1 {
|
|
pinmux = <PINMUX_GPIO24__FUNC_SPINOR_CS>,
|
|
<PINMUX_GPIO28__FUNC_SPINOR_IO1>;
|
|
input-enable;
|
|
bias-pull-up;
|
|
drive-strength = <10>;
|
|
};
|
|
|
|
pins-io0 {
|
|
pinmux = <PINMUX_GPIO27__FUNC_SPINOR_IO0>;
|
|
bias-pull-up;
|
|
drive-strength = <10>;
|
|
};
|
|
|
|
pins-clk {
|
|
pinmux = <PINMUX_GPIO25__FUNC_SPINOR_CK>;
|
|
input-enable;
|
|
bias-pull-up;
|
|
drive-strength = <10>;
|
|
};
|
|
};
|
|
|
|
pcie_pins: pcie-default-pins {
|
|
pins-pcie-wake {
|
|
pinmux = <PINMUX_GPIO63__FUNC_PCIE_WAKE_N>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
pins-pcie-pereset {
|
|
pinmux = <PINMUX_GPIO64__FUNC_PCIE_PERESET_N>;
|
|
};
|
|
|
|
pins-pcie-clkreq {
|
|
pinmux = <PINMUX_GPIO65__FUNC_PCIE_CLKREQ_N>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
pins-wifi-kill {
|
|
pinmux = <PINMUX_GPIO145__FUNC_GPIO145>; /* WIFI_KILL_L */
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
pp1000_dpbrdg_en_pins: pp1000-dpbrdg-en-pins {
|
|
pins-en {
|
|
pinmux = <PINMUX_GPIO19__FUNC_GPIO19>;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
pp1000_mipibrdg_en_pins: pp1000-mipibrdg-en-pins {
|
|
pins-en {
|
|
pinmux = <PINMUX_GPIO129__FUNC_GPIO129>;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
pp1800_dpbrdg_en_pins: pp1800-dpbrdg-en-pins {
|
|
pins-en {
|
|
pinmux = <PINMUX_GPIO126__FUNC_GPIO126>;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
pp1800_mipibrdg_en_pins: pp1800-mipibrd-en-pins {
|
|
pins-en {
|
|
pinmux = <PINMUX_GPIO128__FUNC_GPIO128>;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
pp3300_dpbrdg_en_pins: pp3300-dpbrdg-en-pins {
|
|
pins-en {
|
|
pinmux = <PINMUX_GPIO26__FUNC_GPIO26>;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
pp3300_mipibrdg_en_pins: pp3300-mipibrdg-en-pins {
|
|
pins-en {
|
|
pinmux = <PINMUX_GPIO127__FUNC_GPIO127>;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
pp3300_wlan_pins: pp3300-wlan-pins {
|
|
pins-pcie-en-pp3300-wlan {
|
|
pinmux = <PINMUX_GPIO143__FUNC_GPIO143>;
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
pwm0_pins: pwm0-default-pins {
|
|
pins-pwm {
|
|
pinmux = <PINMUX_GPIO40__FUNC_DISP_PWM>;
|
|
};
|
|
|
|
pins-inhibit {
|
|
pinmux = <PINMUX_GPIO152__FUNC_GPIO152>;
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
rt1015p_pins: rt1015p-default-pins {
|
|
pins {
|
|
pinmux = <PINMUX_GPIO147__FUNC_GPIO147>;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
scp_pins: scp-pins {
|
|
pins-vreq-vao {
|
|
pinmux = <PINMUX_GPIO195__FUNC_SCP_VREQ_VAO>;
|
|
};
|
|
};
|
|
|
|
spi1_pins: spi1-default-pins {
|
|
pins-cs-mosi-clk {
|
|
pinmux = <PINMUX_GPIO157__FUNC_SPI1_A_CSB>,
|
|
<PINMUX_GPIO159__FUNC_SPI1_A_MO>,
|
|
<PINMUX_GPIO156__FUNC_SPI1_A_CLK>;
|
|
bias-disable;
|
|
};
|
|
|
|
pins-miso {
|
|
pinmux = <PINMUX_GPIO158__FUNC_SPI1_A_MI>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
spi5_pins: spi5-default-pins {
|
|
pins-bus {
|
|
pinmux = <PINMUX_GPIO38__FUNC_SPI5_A_MI>,
|
|
<PINMUX_GPIO37__FUNC_GPIO37>,
|
|
<PINMUX_GPIO39__FUNC_SPI5_A_MO>,
|
|
<PINMUX_GPIO36__FUNC_SPI5_A_CLK>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
trackpad_pins: trackpad-default-pins {
|
|
pins-int-n {
|
|
pinmux = <PINMUX_GPIO15__FUNC_GPIO15>;
|
|
input-enable;
|
|
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
|
|
};
|
|
};
|
|
|
|
touchscreen_pins: touchscreen-default-pins {
|
|
pins-irq {
|
|
pinmux = <PINMUX_GPIO21__FUNC_GPIO21>;
|
|
input-enable;
|
|
bias-pull-up;
|
|
};
|
|
|
|
pins-reset {
|
|
pinmux = <PINMUX_GPIO137__FUNC_GPIO137>;
|
|
output-high;
|
|
};
|
|
|
|
pins-report-sw {
|
|
pinmux = <PINMUX_GPIO138__FUNC_GPIO138>;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
vow_clk_miso_off_pins: vow-clk-miso-off-pins {
|
|
pins-miso-off {
|
|
pinmux = <PINMUX_GPIO219__FUNC_GPIO219>;
|
|
};
|
|
};
|
|
|
|
vow_clk_miso_on_pins: vow-clk-miso-on-pins {
|
|
pins-miso-on {
|
|
pinmux = <PINMUX_GPIO219__FUNC_VOW_CLK_MISO>;
|
|
};
|
|
};
|
|
|
|
vow_dat_miso_off_pins: vow-dat-miso-off-pins {
|
|
pins-miso-off {
|
|
pinmux = <PINMUX_GPIO218__FUNC_GPIO218>;
|
|
};
|
|
};
|
|
|
|
vow_dat_miso_on_pins: vow-dat-miso-on-pins {
|
|
pins-miso-on {
|
|
pinmux = <PINMUX_GPIO218__FUNC_VOW_DAT_MISO>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pmic {
|
|
interrupts-extended = <&pio 214 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
|
|
&pwm0 {
|
|
status = "okay";
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pwm0_pins>;
|
|
};
|
|
|
|
&scp {
|
|
status = "okay";
|
|
|
|
firmware-name = "mediatek/mt8192/scp.img";
|
|
memory-region = <&scp_mem_reserved>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&scp_pins>;
|
|
|
|
cros-ec-rpmsg {
|
|
compatible = "google,cros-ec-rpmsg";
|
|
mediatek,rpmsg-name = "cros-ec-rpmsg";
|
|
};
|
|
};
|
|
|
|
&spi1 {
|
|
status = "okay";
|
|
|
|
mediatek,pad-select = <0>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&spi1_pins>;
|
|
|
|
cros_ec: ec@0 {
|
|
compatible = "google,cros-ec-spi";
|
|
reg = <0>;
|
|
interrupts-extended = <&pio 5 IRQ_TYPE_LEVEL_LOW>;
|
|
spi-max-frequency = <3000000>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&cros_ec_int>;
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
cros_ec_pwm: pwm {
|
|
compatible = "google,cros-ec-pwm";
|
|
#pwm-cells = <1>;
|
|
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c_tunnel: i2c-tunnel {
|
|
compatible = "google,cros-ec-i2c-tunnel";
|
|
google,remote-bus = <0>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
};
|
|
|
|
mt6360_ldo3_reg: regulator@0 {
|
|
compatible = "google,cros-ec-regulator";
|
|
reg = <0>;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
};
|
|
|
|
mt6360_ldo5_reg: regulator@1 {
|
|
compatible = "google,cros-ec-regulator";
|
|
reg = <1>;
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
};
|
|
|
|
typec {
|
|
compatible = "google,cros-ec-typec";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
usb_c0: connector@0 {
|
|
compatible = "usb-c-connector";
|
|
reg = <0>;
|
|
label = "left";
|
|
power-role = "dual";
|
|
data-role = "host";
|
|
try-power-role = "source";
|
|
};
|
|
|
|
usb_c1: connector@1 {
|
|
compatible = "usb-c-connector";
|
|
reg = <1>;
|
|
label = "right";
|
|
power-role = "dual";
|
|
data-role = "host";
|
|
try-power-role = "source";
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&spi5 {
|
|
status = "okay";
|
|
|
|
cs-gpios = <&pio 37 GPIO_ACTIVE_LOW>;
|
|
mediatek,pad-select = <0>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&spi5_pins>;
|
|
|
|
tpm@0 {
|
|
compatible = "google,cr50";
|
|
reg = <0>;
|
|
interrupts-extended = <&pio 171 IRQ_TYPE_EDGE_RISING>;
|
|
spi-max-frequency = <1000000>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&cr50_int>;
|
|
};
|
|
};
|
|
|
|
&spmi {
|
|
#address-cells = <2>;
|
|
#size-cells = <0>;
|
|
|
|
mt6315_6: pmic@6 {
|
|
compatible = "mediatek,mt6315-regulator";
|
|
reg = <0x6 SPMI_USID>;
|
|
|
|
regulators {
|
|
mt6315_6_vbuck1: vbuck1 {
|
|
regulator-compatible = "vbuck1";
|
|
regulator-name = "Vbcpu";
|
|
regulator-min-microvolt = <400000>;
|
|
regulator-max-microvolt = <1193750>;
|
|
regulator-enable-ramp-delay = <256>;
|
|
regulator-allowed-modes = <0 1 2>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
mt6315_6_vbuck3: vbuck3 {
|
|
regulator-compatible = "vbuck3";
|
|
regulator-name = "Vlcpu";
|
|
regulator-min-microvolt = <400000>;
|
|
regulator-max-microvolt = <1193750>;
|
|
regulator-enable-ramp-delay = <256>;
|
|
regulator-allowed-modes = <0 1 2>;
|
|
regulator-always-on;
|
|
};
|
|
};
|
|
};
|
|
|
|
mt6315_7: pmic@7 {
|
|
compatible = "mediatek,mt6315-regulator";
|
|
reg = <0x7 SPMI_USID>;
|
|
|
|
regulators {
|
|
mt6315_7_vbuck1: vbuck1 {
|
|
regulator-compatible = "vbuck1";
|
|
regulator-name = "Vgpu";
|
|
regulator-min-microvolt = <400000>;
|
|
regulator-max-microvolt = <800000>;
|
|
regulator-enable-ramp-delay = <256>;
|
|
regulator-allowed-modes = <0 1 2>;
|
|
regulator-coupled-with = <&mt6359_vsram_others_ldo_reg>;
|
|
regulator-coupled-max-spread = <10000>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&uart0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&xhci {
|
|
status = "okay";
|
|
|
|
wakeup-source;
|
|
vusb33-supply = <&pp3300_g>;
|
|
vbus-supply = <&pp5000_a>;
|
|
};
|
|
|
|
#include <arm/cros-ec-keyboard.dtsi>
|
|
#include <arm/cros-ec-sbs.dtsi>
|