Thomas Zimmermann 0a6dab7d07 drm/mgag200: Compute PLL values during atomic check ... PLL setup can fail if the display mode's clock is not supported by any PLL configuration. Compute the PLL values during atomic check, so that atomic commits can fail at the appropriate time. If successful, use the values in the atomic-update phase. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Acked-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20210714142240.21979-14-tzimmermann@suse.de		2021-08-08 20:14:14 +02:00
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drm	drm/mgag200: Compute PLL values during atomic check	2021-08-08 20:14:14 +02:00
host1x
ipu-v3
trace
vga	vgaarb: don't pass a cookie to vga_client_register	2021-07-21 10:29:10 +02:00
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