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ed6e6a3487
The kernel queue module enables the amdkfd to establish kernel queues, not exposed to user space. The kernel queues are used for HIQ (HSA Interface Queue) and DIQ (Debug Interface Queue) operations v3: Removed use of internal typedefs and added use of the new gart allocation functions v4: Fixed a miscalculation in kernel queue wrapping v5: Move amdkfd from drm/radeon/ to drm/amd/ Change format of mqd structure to match latest KV firmware Add support for AQL queues creation to enable working with open-source HSA runtime Add define for kernel queue size Various fixes Signed-off-by: Ben Goz <ben.goz@amd.com> Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>
107 lines
4.5 KiB
C
107 lines
4.5 KiB
C
/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef KFD_PM4_OPCODES_H
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#define KFD_PM4_OPCODES_H
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enum it_opcode_type {
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IT_NOP = 0x10,
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IT_SET_BASE = 0x11,
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IT_CLEAR_STATE = 0x12,
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IT_INDEX_BUFFER_SIZE = 0x13,
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IT_DISPATCH_DIRECT = 0x15,
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IT_DISPATCH_INDIRECT = 0x16,
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IT_ATOMIC_GDS = 0x1D,
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IT_OCCLUSION_QUERY = 0x1F,
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IT_SET_PREDICATION = 0x20,
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IT_REG_RMW = 0x21,
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IT_COND_EXEC = 0x22,
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IT_PRED_EXEC = 0x23,
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IT_DRAW_INDIRECT = 0x24,
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IT_DRAW_INDEX_INDIRECT = 0x25,
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IT_INDEX_BASE = 0x26,
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IT_DRAW_INDEX_2 = 0x27,
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IT_CONTEXT_CONTROL = 0x28,
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IT_INDEX_TYPE = 0x2A,
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IT_DRAW_INDIRECT_MULTI = 0x2C,
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IT_DRAW_INDEX_AUTO = 0x2D,
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IT_NUM_INSTANCES = 0x2F,
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IT_DRAW_INDEX_MULTI_AUTO = 0x30,
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IT_INDIRECT_BUFFER_CNST = 0x33,
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IT_STRMOUT_BUFFER_UPDATE = 0x34,
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IT_DRAW_INDEX_OFFSET_2 = 0x35,
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IT_DRAW_PREAMBLE = 0x36,
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IT_WRITE_DATA = 0x37,
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IT_DRAW_INDEX_INDIRECT_MULTI = 0x38,
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IT_MEM_SEMAPHORE = 0x39,
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IT_COPY_DW = 0x3B,
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IT_WAIT_REG_MEM = 0x3C,
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IT_INDIRECT_BUFFER = 0x3F,
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IT_COPY_DATA = 0x40,
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IT_PFP_SYNC_ME = 0x42,
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IT_SURFACE_SYNC = 0x43,
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IT_COND_WRITE = 0x45,
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IT_EVENT_WRITE = 0x46,
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IT_EVENT_WRITE_EOP = 0x47,
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IT_EVENT_WRITE_EOS = 0x48,
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IT_RELEASE_MEM = 0x49,
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IT_PREAMBLE_CNTL = 0x4A,
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IT_DMA_DATA = 0x50,
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IT_ACQUIRE_MEM = 0x58,
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IT_REWIND = 0x59,
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IT_LOAD_UCONFIG_REG = 0x5E,
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IT_LOAD_SH_REG = 0x5F,
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IT_LOAD_CONFIG_REG = 0x60,
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IT_LOAD_CONTEXT_REG = 0x61,
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IT_SET_CONFIG_REG = 0x68,
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IT_SET_CONTEXT_REG = 0x69,
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IT_SET_CONTEXT_REG_INDIRECT = 0x73,
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IT_SET_SH_REG = 0x76,
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IT_SET_SH_REG_OFFSET = 0x77,
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IT_SET_QUEUE_REG = 0x78,
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IT_SET_UCONFIG_REG = 0x79,
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IT_SCRATCH_RAM_WRITE = 0x7D,
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IT_SCRATCH_RAM_READ = 0x7E,
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IT_LOAD_CONST_RAM = 0x80,
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IT_WRITE_CONST_RAM = 0x81,
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IT_DUMP_CONST_RAM = 0x83,
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IT_INCREMENT_CE_COUNTER = 0x84,
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IT_INCREMENT_DE_COUNTER = 0x85,
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IT_WAIT_ON_CE_COUNTER = 0x86,
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IT_WAIT_ON_DE_COUNTER_DIFF = 0x88,
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IT_SWITCH_BUFFER = 0x8B,
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IT_SET_RESOURCES = 0xA0,
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IT_MAP_PROCESS = 0xA1,
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IT_MAP_QUEUES = 0xA2,
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IT_UNMAP_QUEUES = 0xA3,
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IT_QUERY_STATUS = 0xA4,
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IT_RUN_LIST = 0xA5,
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};
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#define PM4_TYPE_0 0
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#define PM4_TYPE_2 2
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#define PM4_TYPE_3 3
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#endif /* KFD_PM4_OPCODES_H */
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