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68abdbbb03
This patch reworks the ipr code by grouping the offset array together with the ipr_data structure in a new data structure called ipr_desc. This new structure also contains the name of the controller in struct irq_chip. The idea behind putting struct irq_chip in there is that we can use offsetof() to locate the base addresses in the irq_chip callbacks. This strategy has much in common with the recently merged intc2 code. One logic change has been made - the original ipr code enabled the interrupts by default but with this patch they are all disabled by default. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
75 lines
2.1 KiB
C
75 lines
2.1 KiB
C
/*
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* include/asm-sh/snapgear.h
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*
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* Modified version of io_se.h for the snapgear-specific functions.
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*
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* May be copied or modified under the terms of the GNU General Public
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* License. See linux/COPYING for more information.
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*
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* IO functions for a SnapGear
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*/
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#ifndef _ASM_SH_IO_SNAPGEAR_H
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#define _ASM_SH_IO_SNAPGEAR_H
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#if defined(CONFIG_CPU_SH4)
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/*
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* The external interrupt lines, these take up ints 0 - 15 inclusive
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* depending on the priority for the interrupt. In fact the priority
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* is the interrupt :-)
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*/
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#define IRL0_IRQ 2
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#define IRL0_IPR_POS 3
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#define IRL0_PRIORITY 13
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#define IRL1_IRQ 5
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#define IRL1_IPR_POS 2
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#define IRL1_PRIORITY 10
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#define IRL2_IRQ 8
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#define IRL2_IPR_POS 1
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#define IRL2_PRIORITY 7
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#define IRL3_IRQ 11
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#define IRL3_IPR_POS 0
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#define IRL3_PRIORITY 4
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#endif
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#define __IO_PREFIX snapgear
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#include <asm/io_generic.h>
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#ifdef CONFIG_SH_SECUREEDGE5410
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/*
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* We need to remember what was written to the ioport as some bits
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* are shared with other functions and you cannot read back what was
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* written :-|
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*
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* Bit Read Write
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* -----------------------------------------------
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* D0 DCD on ttySC1 power
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* D1 Reset Switch heatbeat
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* D2 ttySC0 CTS (7100) LAN
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* D3 - WAN
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* D4 ttySC0 DCD (7100) CONSOLE
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* D5 - ONLINE
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* D6 - VPN
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* D7 - DTR on ttySC1
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* D8 - ttySC0 RTS (7100)
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* D9 - ttySC0 DTR (7100)
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* D10 - RTC SCLK
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* D11 RTC DATA RTC DATA
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* D12 - RTS RESET
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*/
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#define SECUREEDGE_IOPORT_ADDR ((volatile short *) 0xb0000000)
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extern unsigned short secureedge5410_ioport;
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#define SECUREEDGE_WRITE_IOPORT(val, mask) (*SECUREEDGE_IOPORT_ADDR = \
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(secureedge5410_ioport = \
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((secureedge5410_ioport & ~(mask)) | ((val) & (mask)))))
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#define SECUREEDGE_READ_IOPORT() \
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((*SECUREEDGE_IOPORT_ADDR&0x0817) | (secureedge5410_ioport&~0x0817))
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#endif
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#endif /* _ASM_SH_IO_SNAPGEAR_H */
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