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![Gustavo A. R. Silva](/assets/img/avatar_default.png)
Use 2-factor multiplication argument form kcalloc() instead of kzalloc(). Link: https://github.com/KSPP/linux/issues/162 Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Link: https://lore.kernel.org/r/20211006180843.GA913399@embeddedor Signed-off-by: Jakub Kicinski <kuba@kernel.org>
767 lines
20 KiB
C
767 lines
20 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2021 Rafał Miłecki <rafal@milecki.pl>
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*/
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#include <linux/delay.h>
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#include <linux/etherdevice.h>
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#include <linux/if_vlan.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_net.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include "bcm4908_enet.h"
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#include "unimac.h"
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#define ENET_DMA_CH_RX_CFG ENET_DMA_CH0_CFG
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#define ENET_DMA_CH_TX_CFG ENET_DMA_CH1_CFG
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#define ENET_DMA_CH_RX_STATE_RAM ENET_DMA_CH0_STATE_RAM
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#define ENET_DMA_CH_TX_STATE_RAM ENET_DMA_CH1_STATE_RAM
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#define ENET_TX_BDS_NUM 200
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#define ENET_RX_BDS_NUM 200
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#define ENET_RX_BDS_NUM_MAX 8192
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#define ENET_DMA_INT_DEFAULTS (ENET_DMA_CH_CFG_INT_DONE | \
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ENET_DMA_CH_CFG_INT_NO_DESC | \
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ENET_DMA_CH_CFG_INT_BUFF_DONE)
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#define ENET_DMA_MAX_BURST_LEN 8 /* in 64 bit words */
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#define ENET_MTU_MAX ETH_DATA_LEN /* Is it possible to support 2044? */
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#define BRCM_MAX_TAG_LEN 6
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#define ENET_MAX_ETH_OVERHEAD (ETH_HLEN + BRCM_MAX_TAG_LEN + VLAN_HLEN + \
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ETH_FCS_LEN + 4) /* 32 */
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struct bcm4908_enet_dma_ring_bd {
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__le32 ctl;
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__le32 addr;
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} __packed;
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struct bcm4908_enet_dma_ring_slot {
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struct sk_buff *skb;
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unsigned int len;
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dma_addr_t dma_addr;
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};
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struct bcm4908_enet_dma_ring {
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int is_tx;
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int read_idx;
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int write_idx;
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int length;
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u16 cfg_block;
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u16 st_ram_block;
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struct napi_struct napi;
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union {
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void *cpu_addr;
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struct bcm4908_enet_dma_ring_bd *buf_desc;
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};
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dma_addr_t dma_addr;
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struct bcm4908_enet_dma_ring_slot *slots;
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};
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struct bcm4908_enet {
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struct device *dev;
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struct net_device *netdev;
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void __iomem *base;
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int irq_tx;
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struct bcm4908_enet_dma_ring tx_ring;
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struct bcm4908_enet_dma_ring rx_ring;
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};
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/***
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* R/W ops
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*/
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static u32 enet_read(struct bcm4908_enet *enet, u16 offset)
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{
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return readl(enet->base + offset);
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}
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static void enet_write(struct bcm4908_enet *enet, u16 offset, u32 value)
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{
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writel(value, enet->base + offset);
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}
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static void enet_maskset(struct bcm4908_enet *enet, u16 offset, u32 mask, u32 set)
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{
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u32 val;
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WARN_ON(set & ~mask);
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val = enet_read(enet, offset);
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val = (val & ~mask) | (set & mask);
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enet_write(enet, offset, val);
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}
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static void enet_set(struct bcm4908_enet *enet, u16 offset, u32 set)
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{
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enet_maskset(enet, offset, set, set);
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}
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static u32 enet_umac_read(struct bcm4908_enet *enet, u16 offset)
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{
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return enet_read(enet, ENET_UNIMAC + offset);
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}
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static void enet_umac_write(struct bcm4908_enet *enet, u16 offset, u32 value)
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{
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enet_write(enet, ENET_UNIMAC + offset, value);
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}
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static void enet_umac_set(struct bcm4908_enet *enet, u16 offset, u32 set)
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{
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enet_set(enet, ENET_UNIMAC + offset, set);
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}
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/***
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* Helpers
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*/
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static void bcm4908_enet_set_mtu(struct bcm4908_enet *enet, int mtu)
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{
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enet_umac_write(enet, UMAC_MAX_FRAME_LEN, mtu + ENET_MAX_ETH_OVERHEAD);
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}
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/***
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* DMA ring ops
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*/
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static void bcm4908_enet_dma_ring_intrs_on(struct bcm4908_enet *enet,
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struct bcm4908_enet_dma_ring *ring)
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{
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enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_INT_MASK, ENET_DMA_INT_DEFAULTS);
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}
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static void bcm4908_enet_dma_ring_intrs_off(struct bcm4908_enet *enet,
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struct bcm4908_enet_dma_ring *ring)
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{
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enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_INT_MASK, 0);
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}
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static void bcm4908_enet_dma_ring_intrs_ack(struct bcm4908_enet *enet,
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struct bcm4908_enet_dma_ring *ring)
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{
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enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_INT_STAT, ENET_DMA_INT_DEFAULTS);
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}
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/***
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* DMA
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*/
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static int bcm4908_dma_alloc_buf_descs(struct bcm4908_enet *enet,
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struct bcm4908_enet_dma_ring *ring)
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{
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int size = ring->length * sizeof(struct bcm4908_enet_dma_ring_bd);
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struct device *dev = enet->dev;
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ring->cpu_addr = dma_alloc_coherent(dev, size, &ring->dma_addr, GFP_KERNEL);
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if (!ring->cpu_addr)
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return -ENOMEM;
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if (((uintptr_t)ring->cpu_addr) & (0x40 - 1)) {
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dev_err(dev, "Invalid DMA ring alignment\n");
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goto err_free_buf_descs;
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}
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ring->slots = kcalloc(ring->length, sizeof(*ring->slots), GFP_KERNEL);
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if (!ring->slots)
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goto err_free_buf_descs;
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return 0;
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err_free_buf_descs:
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dma_free_coherent(dev, size, ring->cpu_addr, ring->dma_addr);
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ring->cpu_addr = NULL;
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return -ENOMEM;
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}
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static void bcm4908_enet_dma_free(struct bcm4908_enet *enet)
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{
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struct bcm4908_enet_dma_ring *tx_ring = &enet->tx_ring;
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struct bcm4908_enet_dma_ring *rx_ring = &enet->rx_ring;
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struct device *dev = enet->dev;
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int size;
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size = rx_ring->length * sizeof(struct bcm4908_enet_dma_ring_bd);
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if (rx_ring->cpu_addr)
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dma_free_coherent(dev, size, rx_ring->cpu_addr, rx_ring->dma_addr);
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kfree(rx_ring->slots);
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size = tx_ring->length * sizeof(struct bcm4908_enet_dma_ring_bd);
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if (tx_ring->cpu_addr)
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dma_free_coherent(dev, size, tx_ring->cpu_addr, tx_ring->dma_addr);
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kfree(tx_ring->slots);
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}
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static int bcm4908_enet_dma_alloc(struct bcm4908_enet *enet)
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{
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struct bcm4908_enet_dma_ring *tx_ring = &enet->tx_ring;
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struct bcm4908_enet_dma_ring *rx_ring = &enet->rx_ring;
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struct device *dev = enet->dev;
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int err;
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tx_ring->length = ENET_TX_BDS_NUM;
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tx_ring->is_tx = 1;
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tx_ring->cfg_block = ENET_DMA_CH_TX_CFG;
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tx_ring->st_ram_block = ENET_DMA_CH_TX_STATE_RAM;
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err = bcm4908_dma_alloc_buf_descs(enet, tx_ring);
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if (err) {
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dev_err(dev, "Failed to alloc TX buf descriptors: %d\n", err);
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return err;
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}
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rx_ring->length = ENET_RX_BDS_NUM;
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rx_ring->is_tx = 0;
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rx_ring->cfg_block = ENET_DMA_CH_RX_CFG;
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rx_ring->st_ram_block = ENET_DMA_CH_RX_STATE_RAM;
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err = bcm4908_dma_alloc_buf_descs(enet, rx_ring);
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if (err) {
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dev_err(dev, "Failed to alloc RX buf descriptors: %d\n", err);
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bcm4908_enet_dma_free(enet);
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return err;
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}
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return 0;
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}
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static void bcm4908_enet_dma_reset(struct bcm4908_enet *enet)
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{
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struct bcm4908_enet_dma_ring *rings[] = { &enet->rx_ring, &enet->tx_ring };
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int i;
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/* Disable the DMA controller and channel */
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for (i = 0; i < ARRAY_SIZE(rings); i++)
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enet_write(enet, rings[i]->cfg_block + ENET_DMA_CH_CFG, 0);
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enet_maskset(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_MASTER_EN, 0);
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/* Reset channels state */
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for (i = 0; i < ARRAY_SIZE(rings); i++) {
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struct bcm4908_enet_dma_ring *ring = rings[i];
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enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR, 0);
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enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_STATE_DATA, 0);
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enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_DESC_LEN_STATUS, 0);
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enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_DESC_BASE_BUFPTR, 0);
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}
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}
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static int bcm4908_enet_dma_alloc_rx_buf(struct bcm4908_enet *enet, unsigned int idx)
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{
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struct bcm4908_enet_dma_ring_bd *buf_desc = &enet->rx_ring.buf_desc[idx];
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struct bcm4908_enet_dma_ring_slot *slot = &enet->rx_ring.slots[idx];
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struct device *dev = enet->dev;
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u32 tmp;
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int err;
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slot->len = ENET_MTU_MAX + ENET_MAX_ETH_OVERHEAD;
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slot->skb = netdev_alloc_skb(enet->netdev, slot->len);
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if (!slot->skb)
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return -ENOMEM;
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slot->dma_addr = dma_map_single(dev, slot->skb->data, slot->len, DMA_FROM_DEVICE);
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err = dma_mapping_error(dev, slot->dma_addr);
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if (err) {
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dev_err(dev, "Failed to map DMA buffer: %d\n", err);
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kfree_skb(slot->skb);
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slot->skb = NULL;
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return err;
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}
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tmp = slot->len << DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT;
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tmp |= DMA_CTL_STATUS_OWN;
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if (idx == enet->rx_ring.length - 1)
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tmp |= DMA_CTL_STATUS_WRAP;
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buf_desc->ctl = cpu_to_le32(tmp);
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buf_desc->addr = cpu_to_le32(slot->dma_addr);
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return 0;
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}
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static void bcm4908_enet_dma_ring_init(struct bcm4908_enet *enet,
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struct bcm4908_enet_dma_ring *ring)
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{
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int reset_channel = 0; /* We support only 1 main channel (with TX and RX) */
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int reset_subch = ring->is_tx ? 1 : 0;
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/* Reset the DMA channel */
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enet_write(enet, ENET_DMA_CTRL_CHANNEL_RESET, BIT(reset_channel * 2 + reset_subch));
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enet_write(enet, ENET_DMA_CTRL_CHANNEL_RESET, 0);
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enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, 0);
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enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_MAX_BURST, ENET_DMA_MAX_BURST_LEN);
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enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG_INT_MASK, 0);
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enet_write(enet, ring->st_ram_block + ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR,
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(uint32_t)ring->dma_addr);
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ring->read_idx = 0;
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ring->write_idx = 0;
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}
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static void bcm4908_enet_dma_uninit(struct bcm4908_enet *enet)
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{
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struct bcm4908_enet_dma_ring *rx_ring = &enet->rx_ring;
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struct bcm4908_enet_dma_ring_slot *slot;
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struct device *dev = enet->dev;
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int i;
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for (i = rx_ring->length - 1; i >= 0; i--) {
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slot = &rx_ring->slots[i];
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if (!slot->skb)
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continue;
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dma_unmap_single(dev, slot->dma_addr, slot->len, DMA_FROM_DEVICE);
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kfree_skb(slot->skb);
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slot->skb = NULL;
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}
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}
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static int bcm4908_enet_dma_init(struct bcm4908_enet *enet)
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{
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struct bcm4908_enet_dma_ring *rx_ring = &enet->rx_ring;
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struct device *dev = enet->dev;
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int err;
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int i;
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for (i = 0; i < rx_ring->length; i++) {
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err = bcm4908_enet_dma_alloc_rx_buf(enet, i);
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if (err) {
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dev_err(dev, "Failed to alloc RX buffer: %d\n", err);
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bcm4908_enet_dma_uninit(enet);
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return err;
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}
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}
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bcm4908_enet_dma_ring_init(enet, &enet->tx_ring);
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bcm4908_enet_dma_ring_init(enet, &enet->rx_ring);
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return 0;
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}
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static void bcm4908_enet_dma_tx_ring_enable(struct bcm4908_enet *enet,
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struct bcm4908_enet_dma_ring *ring)
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{
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enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE);
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}
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static void bcm4908_enet_dma_tx_ring_disable(struct bcm4908_enet *enet,
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struct bcm4908_enet_dma_ring *ring)
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{
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enet_write(enet, ring->cfg_block + ENET_DMA_CH_CFG, 0);
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}
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static void bcm4908_enet_dma_rx_ring_enable(struct bcm4908_enet *enet,
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struct bcm4908_enet_dma_ring *ring)
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{
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enet_set(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE);
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}
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static void bcm4908_enet_dma_rx_ring_disable(struct bcm4908_enet *enet,
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struct bcm4908_enet_dma_ring *ring)
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{
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unsigned long deadline;
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u32 tmp;
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enet_maskset(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE, 0);
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deadline = jiffies + usecs_to_jiffies(2000);
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do {
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tmp = enet_read(enet, ring->cfg_block + ENET_DMA_CH_CFG);
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if (!(tmp & ENET_DMA_CH_CFG_ENABLE))
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return;
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enet_maskset(enet, ring->cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE, 0);
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usleep_range(10, 30);
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} while (!time_after_eq(jiffies, deadline));
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dev_warn(enet->dev, "Timeout waiting for DMA TX stop\n");
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}
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/***
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* Ethernet driver
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*/
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static void bcm4908_enet_gmac_init(struct bcm4908_enet *enet)
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{
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u32 cmd;
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bcm4908_enet_set_mtu(enet, enet->netdev->mtu);
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cmd = enet_umac_read(enet, UMAC_CMD);
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enet_umac_write(enet, UMAC_CMD, cmd | CMD_SW_RESET);
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enet_umac_write(enet, UMAC_CMD, cmd & ~CMD_SW_RESET);
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enet_set(enet, ENET_FLUSH, ENET_FLUSH_RXFIFO_FLUSH | ENET_FLUSH_TXFIFO_FLUSH);
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enet_maskset(enet, ENET_FLUSH, ENET_FLUSH_RXFIFO_FLUSH | ENET_FLUSH_TXFIFO_FLUSH, 0);
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enet_set(enet, ENET_MIB_CTRL, ENET_MIB_CTRL_CLR_MIB);
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enet_maskset(enet, ENET_MIB_CTRL, ENET_MIB_CTRL_CLR_MIB, 0);
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cmd = enet_umac_read(enet, UMAC_CMD);
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cmd &= ~(CMD_SPEED_MASK << CMD_SPEED_SHIFT);
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cmd &= ~CMD_TX_EN;
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cmd &= ~CMD_RX_EN;
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cmd |= CMD_SPEED_1000 << CMD_SPEED_SHIFT;
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enet_umac_write(enet, UMAC_CMD, cmd);
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enet_maskset(enet, ENET_GMAC_STATUS,
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ENET_GMAC_STATUS_ETH_SPEED_MASK |
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ENET_GMAC_STATUS_HD |
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ENET_GMAC_STATUS_AUTO_CFG_EN |
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ENET_GMAC_STATUS_LINK_UP,
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ENET_GMAC_STATUS_ETH_SPEED_1000 |
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ENET_GMAC_STATUS_AUTO_CFG_EN |
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ENET_GMAC_STATUS_LINK_UP);
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}
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static irqreturn_t bcm4908_enet_irq_handler(int irq, void *dev_id)
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{
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struct bcm4908_enet *enet = dev_id;
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struct bcm4908_enet_dma_ring *ring;
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ring = (irq == enet->irq_tx) ? &enet->tx_ring : &enet->rx_ring;
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bcm4908_enet_dma_ring_intrs_off(enet, ring);
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bcm4908_enet_dma_ring_intrs_ack(enet, ring);
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napi_schedule(&ring->napi);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static int bcm4908_enet_open(struct net_device *netdev)
|
|
{
|
|
struct bcm4908_enet *enet = netdev_priv(netdev);
|
|
struct bcm4908_enet_dma_ring *tx_ring = &enet->tx_ring;
|
|
struct bcm4908_enet_dma_ring *rx_ring = &enet->rx_ring;
|
|
struct device *dev = enet->dev;
|
|
int err;
|
|
|
|
err = request_irq(netdev->irq, bcm4908_enet_irq_handler, 0, "enet", enet);
|
|
if (err) {
|
|
dev_err(dev, "Failed to request IRQ %d: %d\n", netdev->irq, err);
|
|
return err;
|
|
}
|
|
|
|
if (enet->irq_tx > 0) {
|
|
err = request_irq(enet->irq_tx, bcm4908_enet_irq_handler, 0,
|
|
"tx", enet);
|
|
if (err) {
|
|
dev_err(dev, "Failed to request IRQ %d: %d\n",
|
|
enet->irq_tx, err);
|
|
free_irq(netdev->irq, enet);
|
|
return err;
|
|
}
|
|
}
|
|
|
|
bcm4908_enet_gmac_init(enet);
|
|
bcm4908_enet_dma_reset(enet);
|
|
bcm4908_enet_dma_init(enet);
|
|
|
|
enet_umac_set(enet, UMAC_CMD, CMD_TX_EN | CMD_RX_EN);
|
|
|
|
enet_set(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_MASTER_EN);
|
|
enet_maskset(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_FLOWC_CH1_EN, 0);
|
|
|
|
if (enet->irq_tx > 0) {
|
|
napi_enable(&tx_ring->napi);
|
|
bcm4908_enet_dma_ring_intrs_ack(enet, tx_ring);
|
|
bcm4908_enet_dma_ring_intrs_on(enet, tx_ring);
|
|
}
|
|
|
|
bcm4908_enet_dma_rx_ring_enable(enet, rx_ring);
|
|
napi_enable(&rx_ring->napi);
|
|
netif_carrier_on(netdev);
|
|
netif_start_queue(netdev);
|
|
bcm4908_enet_dma_ring_intrs_ack(enet, rx_ring);
|
|
bcm4908_enet_dma_ring_intrs_on(enet, rx_ring);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int bcm4908_enet_stop(struct net_device *netdev)
|
|
{
|
|
struct bcm4908_enet *enet = netdev_priv(netdev);
|
|
struct bcm4908_enet_dma_ring *tx_ring = &enet->tx_ring;
|
|
struct bcm4908_enet_dma_ring *rx_ring = &enet->rx_ring;
|
|
|
|
netif_stop_queue(netdev);
|
|
netif_carrier_off(netdev);
|
|
napi_disable(&rx_ring->napi);
|
|
napi_disable(&tx_ring->napi);
|
|
|
|
bcm4908_enet_dma_rx_ring_disable(enet, &enet->rx_ring);
|
|
bcm4908_enet_dma_tx_ring_disable(enet, &enet->tx_ring);
|
|
|
|
bcm4908_enet_dma_uninit(enet);
|
|
|
|
free_irq(enet->irq_tx, enet);
|
|
free_irq(enet->netdev->irq, enet);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int bcm4908_enet_start_xmit(struct sk_buff *skb, struct net_device *netdev)
|
|
{
|
|
struct bcm4908_enet *enet = netdev_priv(netdev);
|
|
struct bcm4908_enet_dma_ring *ring = &enet->tx_ring;
|
|
struct bcm4908_enet_dma_ring_slot *slot;
|
|
struct device *dev = enet->dev;
|
|
struct bcm4908_enet_dma_ring_bd *buf_desc;
|
|
int free_buf_descs;
|
|
u32 tmp;
|
|
|
|
/* Free transmitted skbs */
|
|
if (enet->irq_tx < 0 &&
|
|
!(le32_to_cpu(ring->buf_desc[ring->read_idx].ctl) & DMA_CTL_STATUS_OWN))
|
|
napi_schedule(&enet->tx_ring.napi);
|
|
|
|
/* Don't use the last empty buf descriptor */
|
|
if (ring->read_idx <= ring->write_idx)
|
|
free_buf_descs = ring->read_idx - ring->write_idx + ring->length;
|
|
else
|
|
free_buf_descs = ring->read_idx - ring->write_idx;
|
|
if (free_buf_descs < 2) {
|
|
netif_stop_queue(netdev);
|
|
return NETDEV_TX_BUSY;
|
|
}
|
|
|
|
/* Hardware removes OWN bit after sending data */
|
|
buf_desc = &ring->buf_desc[ring->write_idx];
|
|
if (unlikely(le32_to_cpu(buf_desc->ctl) & DMA_CTL_STATUS_OWN)) {
|
|
netif_stop_queue(netdev);
|
|
return NETDEV_TX_BUSY;
|
|
}
|
|
|
|
slot = &ring->slots[ring->write_idx];
|
|
slot->skb = skb;
|
|
slot->len = skb->len;
|
|
slot->dma_addr = dma_map_single(dev, skb->data, skb->len, DMA_TO_DEVICE);
|
|
if (unlikely(dma_mapping_error(dev, slot->dma_addr)))
|
|
return NETDEV_TX_BUSY;
|
|
|
|
tmp = skb->len << DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT;
|
|
tmp |= DMA_CTL_STATUS_OWN;
|
|
tmp |= DMA_CTL_STATUS_SOP;
|
|
tmp |= DMA_CTL_STATUS_EOP;
|
|
tmp |= DMA_CTL_STATUS_APPEND_CRC;
|
|
if (ring->write_idx + 1 == ring->length - 1)
|
|
tmp |= DMA_CTL_STATUS_WRAP;
|
|
|
|
buf_desc->addr = cpu_to_le32((uint32_t)slot->dma_addr);
|
|
buf_desc->ctl = cpu_to_le32(tmp);
|
|
|
|
bcm4908_enet_dma_tx_ring_enable(enet, &enet->tx_ring);
|
|
|
|
if (++ring->write_idx == ring->length - 1)
|
|
ring->write_idx = 0;
|
|
enet->netdev->stats.tx_bytes += skb->len;
|
|
enet->netdev->stats.tx_packets++;
|
|
|
|
return NETDEV_TX_OK;
|
|
}
|
|
|
|
static int bcm4908_enet_poll_rx(struct napi_struct *napi, int weight)
|
|
{
|
|
struct bcm4908_enet_dma_ring *rx_ring = container_of(napi, struct bcm4908_enet_dma_ring, napi);
|
|
struct bcm4908_enet *enet = container_of(rx_ring, struct bcm4908_enet, rx_ring);
|
|
struct device *dev = enet->dev;
|
|
int handled = 0;
|
|
|
|
while (handled < weight) {
|
|
struct bcm4908_enet_dma_ring_bd *buf_desc;
|
|
struct bcm4908_enet_dma_ring_slot slot;
|
|
u32 ctl;
|
|
int len;
|
|
int err;
|
|
|
|
buf_desc = &enet->rx_ring.buf_desc[enet->rx_ring.read_idx];
|
|
ctl = le32_to_cpu(buf_desc->ctl);
|
|
if (ctl & DMA_CTL_STATUS_OWN)
|
|
break;
|
|
|
|
slot = enet->rx_ring.slots[enet->rx_ring.read_idx];
|
|
|
|
/* Provide new buffer before unpinning the old one */
|
|
err = bcm4908_enet_dma_alloc_rx_buf(enet, enet->rx_ring.read_idx);
|
|
if (err)
|
|
break;
|
|
|
|
if (++enet->rx_ring.read_idx == enet->rx_ring.length)
|
|
enet->rx_ring.read_idx = 0;
|
|
|
|
len = (ctl & DMA_CTL_LEN_DESC_BUFLENGTH) >> DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT;
|
|
|
|
if (len < ETH_ZLEN ||
|
|
(ctl & (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) != (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) {
|
|
kfree_skb(slot.skb);
|
|
enet->netdev->stats.rx_dropped++;
|
|
break;
|
|
}
|
|
|
|
dma_unmap_single(dev, slot.dma_addr, slot.len, DMA_FROM_DEVICE);
|
|
|
|
skb_put(slot.skb, len - ETH_FCS_LEN);
|
|
slot.skb->protocol = eth_type_trans(slot.skb, enet->netdev);
|
|
netif_receive_skb(slot.skb);
|
|
|
|
enet->netdev->stats.rx_packets++;
|
|
enet->netdev->stats.rx_bytes += len;
|
|
|
|
handled++;
|
|
}
|
|
|
|
if (handled < weight) {
|
|
napi_complete_done(napi, handled);
|
|
bcm4908_enet_dma_ring_intrs_on(enet, rx_ring);
|
|
}
|
|
|
|
/* Hardware could disable ring if it run out of descriptors */
|
|
bcm4908_enet_dma_rx_ring_enable(enet, &enet->rx_ring);
|
|
|
|
return handled;
|
|
}
|
|
|
|
static int bcm4908_enet_poll_tx(struct napi_struct *napi, int weight)
|
|
{
|
|
struct bcm4908_enet_dma_ring *tx_ring = container_of(napi, struct bcm4908_enet_dma_ring, napi);
|
|
struct bcm4908_enet *enet = container_of(tx_ring, struct bcm4908_enet, tx_ring);
|
|
struct bcm4908_enet_dma_ring_bd *buf_desc;
|
|
struct bcm4908_enet_dma_ring_slot *slot;
|
|
struct device *dev = enet->dev;
|
|
unsigned int bytes = 0;
|
|
int handled = 0;
|
|
|
|
while (handled < weight && tx_ring->read_idx != tx_ring->write_idx) {
|
|
buf_desc = &tx_ring->buf_desc[tx_ring->read_idx];
|
|
if (le32_to_cpu(buf_desc->ctl) & DMA_CTL_STATUS_OWN)
|
|
break;
|
|
slot = &tx_ring->slots[tx_ring->read_idx];
|
|
|
|
dma_unmap_single(dev, slot->dma_addr, slot->len, DMA_TO_DEVICE);
|
|
dev_kfree_skb(slot->skb);
|
|
bytes += slot->len;
|
|
if (++tx_ring->read_idx == tx_ring->length)
|
|
tx_ring->read_idx = 0;
|
|
|
|
handled++;
|
|
}
|
|
|
|
if (handled < weight) {
|
|
napi_complete_done(napi, handled);
|
|
bcm4908_enet_dma_ring_intrs_on(enet, tx_ring);
|
|
}
|
|
|
|
if (netif_queue_stopped(enet->netdev))
|
|
netif_wake_queue(enet->netdev);
|
|
|
|
return handled;
|
|
}
|
|
|
|
static int bcm4908_enet_change_mtu(struct net_device *netdev, int new_mtu)
|
|
{
|
|
struct bcm4908_enet *enet = netdev_priv(netdev);
|
|
|
|
bcm4908_enet_set_mtu(enet, new_mtu);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct net_device_ops bcm4908_enet_netdev_ops = {
|
|
.ndo_open = bcm4908_enet_open,
|
|
.ndo_stop = bcm4908_enet_stop,
|
|
.ndo_start_xmit = bcm4908_enet_start_xmit,
|
|
.ndo_set_mac_address = eth_mac_addr,
|
|
.ndo_change_mtu = bcm4908_enet_change_mtu,
|
|
};
|
|
|
|
static int bcm4908_enet_probe(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct net_device *netdev;
|
|
struct bcm4908_enet *enet;
|
|
int err;
|
|
|
|
netdev = devm_alloc_etherdev(dev, sizeof(*enet));
|
|
if (!netdev)
|
|
return -ENOMEM;
|
|
|
|
enet = netdev_priv(netdev);
|
|
enet->dev = dev;
|
|
enet->netdev = netdev;
|
|
|
|
enet->base = devm_platform_ioremap_resource(pdev, 0);
|
|
if (IS_ERR(enet->base)) {
|
|
dev_err(dev, "Failed to map registers: %ld\n", PTR_ERR(enet->base));
|
|
return PTR_ERR(enet->base);
|
|
}
|
|
|
|
netdev->irq = platform_get_irq_byname(pdev, "rx");
|
|
if (netdev->irq < 0)
|
|
return netdev->irq;
|
|
|
|
enet->irq_tx = platform_get_irq_byname(pdev, "tx");
|
|
|
|
dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
|
|
|
|
err = bcm4908_enet_dma_alloc(enet);
|
|
if (err)
|
|
return err;
|
|
|
|
SET_NETDEV_DEV(netdev, &pdev->dev);
|
|
err = of_get_ethdev_address(dev->of_node, netdev);
|
|
if (err)
|
|
eth_hw_addr_random(netdev);
|
|
netdev->netdev_ops = &bcm4908_enet_netdev_ops;
|
|
netdev->min_mtu = ETH_ZLEN;
|
|
netdev->mtu = ETH_DATA_LEN;
|
|
netdev->max_mtu = ENET_MTU_MAX;
|
|
netif_tx_napi_add(netdev, &enet->tx_ring.napi, bcm4908_enet_poll_tx, NAPI_POLL_WEIGHT);
|
|
netif_napi_add(netdev, &enet->rx_ring.napi, bcm4908_enet_poll_rx, NAPI_POLL_WEIGHT);
|
|
|
|
err = register_netdev(netdev);
|
|
if (err) {
|
|
bcm4908_enet_dma_free(enet);
|
|
return err;
|
|
}
|
|
|
|
platform_set_drvdata(pdev, enet);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int bcm4908_enet_remove(struct platform_device *pdev)
|
|
{
|
|
struct bcm4908_enet *enet = platform_get_drvdata(pdev);
|
|
|
|
unregister_netdev(enet->netdev);
|
|
netif_napi_del(&enet->rx_ring.napi);
|
|
netif_napi_del(&enet->tx_ring.napi);
|
|
bcm4908_enet_dma_free(enet);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id bcm4908_enet_of_match[] = {
|
|
{ .compatible = "brcm,bcm4908-enet"},
|
|
{},
|
|
};
|
|
|
|
static struct platform_driver bcm4908_enet_driver = {
|
|
.driver = {
|
|
.name = "bcm4908_enet",
|
|
.of_match_table = bcm4908_enet_of_match,
|
|
},
|
|
.probe = bcm4908_enet_probe,
|
|
.remove = bcm4908_enet_remove,
|
|
};
|
|
module_platform_driver(bcm4908_enet_driver);
|
|
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_DEVICE_TABLE(of, bcm4908_enet_of_match);
|