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![Yang Yingliang](/assets/img/avatar_default.png)
Use the devm_platform_ioremap_resource_byname() helper instead of calling platform_get_resource_byname() and devm_ioremap_resource() separately. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
244 lines
5.3 KiB
C
244 lines
5.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/* Texas Instruments Ethernet Switch Driver
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*
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* Copyright (C) 2013 Texas Instruments
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*
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* Module Author: Mugunthan V N <mugunthanvnm@ti.com>
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*
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*/
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#include <linux/platform_device.h>
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#include <linux/init.h>
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#include <linux/netdevice.h>
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#include <linux/phy.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include "cpsw.h"
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/* AM33xx SoC specific definitions for the CONTROL port */
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#define AM33XX_GMII_SEL_MODE_MII 0
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#define AM33XX_GMII_SEL_MODE_RMII 1
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#define AM33XX_GMII_SEL_MODE_RGMII 2
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#define AM33XX_GMII_SEL_RMII2_IO_CLK_EN BIT(7)
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#define AM33XX_GMII_SEL_RMII1_IO_CLK_EN BIT(6)
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#define AM33XX_GMII_SEL_RGMII2_IDMODE BIT(5)
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#define AM33XX_GMII_SEL_RGMII1_IDMODE BIT(4)
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#define GMII_SEL_MODE_MASK 0x3
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struct cpsw_phy_sel_priv {
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struct device *dev;
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u32 __iomem *gmii_sel;
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bool rmii_clock_external;
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void (*cpsw_phy_sel)(struct cpsw_phy_sel_priv *priv,
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phy_interface_t phy_mode, int slave);
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};
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static void cpsw_gmii_sel_am3352(struct cpsw_phy_sel_priv *priv,
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phy_interface_t phy_mode, int slave)
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{
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u32 reg;
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u32 mask;
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u32 mode = 0;
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bool rgmii_id = false;
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reg = readl(priv->gmii_sel);
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switch (phy_mode) {
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case PHY_INTERFACE_MODE_RMII:
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mode = AM33XX_GMII_SEL_MODE_RMII;
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break;
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case PHY_INTERFACE_MODE_RGMII:
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mode = AM33XX_GMII_SEL_MODE_RGMII;
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break;
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case PHY_INTERFACE_MODE_RGMII_ID:
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case PHY_INTERFACE_MODE_RGMII_RXID:
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case PHY_INTERFACE_MODE_RGMII_TXID:
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mode = AM33XX_GMII_SEL_MODE_RGMII;
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rgmii_id = true;
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break;
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default:
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dev_warn(priv->dev,
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"Unsupported PHY mode: \"%s\". Defaulting to MII.\n",
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phy_modes(phy_mode));
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fallthrough;
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case PHY_INTERFACE_MODE_MII:
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mode = AM33XX_GMII_SEL_MODE_MII;
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break;
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}
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mask = GMII_SEL_MODE_MASK << (slave * 2) | BIT(slave + 6);
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mask |= BIT(slave + 4);
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mode <<= slave * 2;
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if (priv->rmii_clock_external) {
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if (slave == 0)
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mode |= AM33XX_GMII_SEL_RMII1_IO_CLK_EN;
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else
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mode |= AM33XX_GMII_SEL_RMII2_IO_CLK_EN;
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}
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if (rgmii_id) {
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if (slave == 0)
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mode |= AM33XX_GMII_SEL_RGMII1_IDMODE;
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else
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mode |= AM33XX_GMII_SEL_RGMII2_IDMODE;
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}
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reg &= ~mask;
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reg |= mode;
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writel(reg, priv->gmii_sel);
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}
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static void cpsw_gmii_sel_dra7xx(struct cpsw_phy_sel_priv *priv,
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phy_interface_t phy_mode, int slave)
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{
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u32 reg;
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u32 mask;
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u32 mode = 0;
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reg = readl(priv->gmii_sel);
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switch (phy_mode) {
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case PHY_INTERFACE_MODE_RMII:
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mode = AM33XX_GMII_SEL_MODE_RMII;
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break;
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case PHY_INTERFACE_MODE_RGMII:
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case PHY_INTERFACE_MODE_RGMII_ID:
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case PHY_INTERFACE_MODE_RGMII_RXID:
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case PHY_INTERFACE_MODE_RGMII_TXID:
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mode = AM33XX_GMII_SEL_MODE_RGMII;
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break;
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default:
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dev_warn(priv->dev,
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"Unsupported PHY mode: \"%s\". Defaulting to MII.\n",
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phy_modes(phy_mode));
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fallthrough;
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case PHY_INTERFACE_MODE_MII:
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mode = AM33XX_GMII_SEL_MODE_MII;
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break;
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}
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switch (slave) {
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case 0:
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mask = GMII_SEL_MODE_MASK;
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break;
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case 1:
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mask = GMII_SEL_MODE_MASK << 4;
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mode <<= 4;
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break;
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default:
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dev_err(priv->dev, "invalid slave number...\n");
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return;
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}
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if (priv->rmii_clock_external)
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dev_err(priv->dev, "RMII External clock is not supported\n");
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reg &= ~mask;
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reg |= mode;
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writel(reg, priv->gmii_sel);
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}
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static struct platform_driver cpsw_phy_sel_driver;
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static int match(struct device *dev, const void *data)
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{
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const struct device_node *node = (const struct device_node *)data;
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return dev->of_node == node &&
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dev->driver == &cpsw_phy_sel_driver.driver;
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}
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void cpsw_phy_sel(struct device *dev, phy_interface_t phy_mode, int slave)
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{
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struct device_node *node;
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struct cpsw_phy_sel_priv *priv;
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node = of_parse_phandle(dev->of_node, "cpsw-phy-sel", 0);
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if (!node) {
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node = of_get_child_by_name(dev->of_node, "cpsw-phy-sel");
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if (!node) {
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dev_err(dev, "Phy mode driver DT not found\n");
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return;
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}
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}
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dev = bus_find_device(&platform_bus_type, NULL, node, match);
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if (!dev) {
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dev_err(dev, "unable to find platform device for %pOF\n", node);
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goto out;
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}
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priv = dev_get_drvdata(dev);
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priv->cpsw_phy_sel(priv, phy_mode, slave);
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put_device(dev);
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out:
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of_node_put(node);
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}
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EXPORT_SYMBOL_GPL(cpsw_phy_sel);
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static const struct of_device_id cpsw_phy_sel_id_table[] = {
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{
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.compatible = "ti,am3352-cpsw-phy-sel",
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.data = &cpsw_gmii_sel_am3352,
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},
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{
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.compatible = "ti,dra7xx-cpsw-phy-sel",
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.data = &cpsw_gmii_sel_dra7xx,
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},
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{
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.compatible = "ti,am43xx-cpsw-phy-sel",
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.data = &cpsw_gmii_sel_am3352,
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},
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{}
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};
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static int cpsw_phy_sel_probe(struct platform_device *pdev)
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{
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const struct of_device_id *of_id;
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struct cpsw_phy_sel_priv *priv;
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of_id = of_match_node(cpsw_phy_sel_id_table, pdev->dev.of_node);
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if (!of_id)
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return -EINVAL;
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv) {
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dev_err(&pdev->dev, "unable to alloc memory for cpsw phy sel\n");
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return -ENOMEM;
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}
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priv->dev = &pdev->dev;
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priv->cpsw_phy_sel = of_id->data;
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priv->gmii_sel = devm_platform_ioremap_resource_byname(pdev, "gmii-sel");
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if (IS_ERR(priv->gmii_sel))
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return PTR_ERR(priv->gmii_sel);
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if (of_find_property(pdev->dev.of_node, "rmii-clock-ext", NULL))
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priv->rmii_clock_external = true;
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dev_set_drvdata(&pdev->dev, priv);
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return 0;
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}
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static struct platform_driver cpsw_phy_sel_driver = {
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.probe = cpsw_phy_sel_probe,
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.driver = {
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.name = "cpsw-phy-sel",
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.of_match_table = cpsw_phy_sel_id_table,
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},
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};
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builtin_platform_driver(cpsw_phy_sel_driver);
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