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d05799d7b4
Commit35727af2b1("irqchip/gicv3: Workaround for NVIDIA erratum T241-FABRIC-4") moved the initialisation of the SoC version to arm_smccc_version_init() but forgot to update the results structure and it's usage. Fix the use of the uninitialised results structure and update the error strings. Fixes:35727af2b1("irqchip/gicv3: Workaround for NVIDIA erratum T241-FABRIC-4") Signed-off-by: Punit Agrawal <punit.agrawal@bytedance.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Marc Zyngier <maz@kernel.org> Cc: Vikram Sethi <vsethi@nvidia.com> Cc: Shanker Donthineni <sdonthineni@nvidia.com> Acked-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20230717171702.424253-1-punit.agrawal@bytedance.com Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
95 lines
2.5 KiB
C
95 lines
2.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2020 Arm Limited
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*/
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#define pr_fmt(fmt) "SMCCC: SOC_ID: " fmt
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#include <linux/arm-smccc.h>
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#include <linux/bitfield.h>
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#include <linux/device.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/sys_soc.h>
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#define SMCCC_SOC_ID_JEP106_BANK_IDX_MASK GENMASK(30, 24)
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/*
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* As per the SMC Calling Convention specification v1.2 (ARM DEN 0028C)
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* Section 7.4 SMCCC_ARCH_SOC_ID bits[23:16] are JEP-106 identification
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* code with parity bit for the SiP. We can drop the parity bit.
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*/
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#define SMCCC_SOC_ID_JEP106_ID_CODE_MASK GENMASK(22, 16)
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#define SMCCC_SOC_ID_IMP_DEF_SOC_ID_MASK GENMASK(15, 0)
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#define JEP106_BANK_CONT_CODE(x) \
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(u8)(FIELD_GET(SMCCC_SOC_ID_JEP106_BANK_IDX_MASK, (x)))
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#define JEP106_ID_CODE(x) \
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(u8)(FIELD_GET(SMCCC_SOC_ID_JEP106_ID_CODE_MASK, (x)))
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#define IMP_DEF_SOC_ID(x) \
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(u16)(FIELD_GET(SMCCC_SOC_ID_IMP_DEF_SOC_ID_MASK, (x)))
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static struct soc_device *soc_dev;
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static struct soc_device_attribute *soc_dev_attr;
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static int __init smccc_soc_init(void)
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{
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int soc_id_rev, soc_id_version;
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static char soc_id_str[20], soc_id_rev_str[12];
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static char soc_id_jep106_id_str[12];
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if (arm_smccc_get_version() < ARM_SMCCC_VERSION_1_2)
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return 0;
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soc_id_version = arm_smccc_get_soc_id_version();
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if (soc_id_version == SMCCC_RET_NOT_SUPPORTED) {
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pr_info("ARCH_SOC_ID not implemented, skipping ....\n");
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return 0;
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}
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if (soc_id_version < 0) {
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pr_err("Invalid SoC Version: %x\n", soc_id_version);
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return -EINVAL;
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}
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soc_id_rev = arm_smccc_get_soc_id_revision();
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if (soc_id_rev < 0) {
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pr_err("Invalid SoC Revision: %x\n", soc_id_rev);
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return -EINVAL;
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}
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soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
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if (!soc_dev_attr)
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return -ENOMEM;
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sprintf(soc_id_rev_str, "0x%08x", soc_id_rev);
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sprintf(soc_id_jep106_id_str, "jep106:%02x%02x",
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JEP106_BANK_CONT_CODE(soc_id_version),
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JEP106_ID_CODE(soc_id_version));
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sprintf(soc_id_str, "%s:%04x", soc_id_jep106_id_str,
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IMP_DEF_SOC_ID(soc_id_version));
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soc_dev_attr->soc_id = soc_id_str;
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soc_dev_attr->revision = soc_id_rev_str;
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soc_dev_attr->family = soc_id_jep106_id_str;
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soc_dev = soc_device_register(soc_dev_attr);
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if (IS_ERR(soc_dev)) {
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kfree(soc_dev_attr);
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return PTR_ERR(soc_dev);
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}
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pr_info("ID = %s Revision = %s\n", soc_dev_attr->soc_id,
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soc_dev_attr->revision);
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return 0;
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}
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module_init(smccc_soc_init);
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static void __exit smccc_soc_exit(void)
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{
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if (soc_dev)
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soc_device_unregister(soc_dev);
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kfree(soc_dev_attr);
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}
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module_exit(smccc_soc_exit);
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