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![Damien Le Moal](/assets/img/avatar_default.png)
Add a clock provider driver for the Canaan Kendryte K210 RISC-V SoC. This new driver with the compatible string "canaan,k210-clk" implements support for the full clock structure of the K210 SoC. Since it is required for the correct operation of the SoC, this driver is selected by default for compilation when the SOC_CANAAN option is selected. With this change, the k210-sysctl driver is turned into a simple platform driver which enables its power bus clock and triggers populating its child nodes. The sysctl driver retains the SOC early initialization code, but the implementation now relies on the new function k210_clk_early_init() provided by the new clk-k210 driver. The clock structure implemented and many of the coding ideas for the driver come from the work by Sean Anderson on the K210 support for the U-Boot project. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: linux-clk@vger.kernel.org Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
78 lines
1.8 KiB
C
78 lines
1.8 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (c) 2019 Christoph Hellwig.
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* Copyright (c) 2019 Western Digital Corporation or its affiliates.
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*/
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/of_platform.h>
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#include <linux/clk.h>
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#include <asm/soc.h>
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#include <soc/canaan/k210-sysctl.h>
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static int k210_sysctl_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct clk *pclk;
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int ret;
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dev_info(dev, "K210 system controller\n");
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/* Get power bus clock */
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pclk = devm_clk_get(dev, NULL);
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if (IS_ERR(pclk))
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return dev_err_probe(dev, PTR_ERR(pclk),
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"Get bus clock failed\n");
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ret = clk_prepare_enable(pclk);
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if (ret) {
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dev_err(dev, "Enable bus clock failed\n");
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return ret;
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}
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/* Populate children */
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ret = devm_of_platform_populate(dev);
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if (ret)
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dev_err(dev, "Populate platform failed %d\n", ret);
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return ret;
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}
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static const struct of_device_id k210_sysctl_of_match[] = {
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{ .compatible = "canaan,k210-sysctl", },
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{ /* sentinel */ },
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};
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static struct platform_driver k210_sysctl_driver = {
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.driver = {
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.name = "k210-sysctl",
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.of_match_table = k210_sysctl_of_match,
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},
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.probe = k210_sysctl_probe,
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};
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builtin_platform_driver(k210_sysctl_driver);
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/*
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* System controller registers base address and size.
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*/
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#define K210_SYSCTL_BASE_ADDR 0x50440000ULL
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#define K210_SYSCTL_BASE_SIZE 0x1000
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/*
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* This needs to be called very early during initialization, given that
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* PLL1 needs to be enabled to be able to use all SRAM.
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*/
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static void __init k210_soc_early_init(const void *fdt)
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{
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void __iomem *sysctl_base;
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sysctl_base = ioremap(K210_SYSCTL_BASE_ADDR, K210_SYSCTL_BASE_SIZE);
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if (!sysctl_base)
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panic("k210-sysctl: ioremap failed");
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k210_clk_early_init(sysctl_base);
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iounmap(sysctl_base);
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}
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SOC_EARLY_INIT_DECLARE(k210_soc, "canaan,kendryte-k210", k210_soc_early_init);
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