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![Miaoqian Lin](/assets/img/avatar_default.png)
of_find_matching_node_and_match returns a node pointer with refcount
incremented, we should use of_node_put() on it when done.
Add missing of_node_put() to avoid refcount leak.
Fixes: 4c58063d42
("soc: rockchip: add driver handling grf setup")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Link: https://lore.kernel.org/r/20220516072013.19731-1-linmq006@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
194 lines
5.1 KiB
C
194 lines
5.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Rockchip Generic Register Files setup
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*
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* Copyright (c) 2016 Heiko Stuebner <heiko@sntech.de>
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*/
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#include <linux/err.h>
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#include <linux/mfd/syscon.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#define HIWORD_UPDATE(val, mask, shift) \
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((val) << (shift) | (mask) << ((shift) + 16))
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struct rockchip_grf_value {
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const char *desc;
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u32 reg;
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u32 val;
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};
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struct rockchip_grf_info {
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const struct rockchip_grf_value *values;
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int num_values;
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};
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#define RK3036_GRF_SOC_CON0 0x140
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static const struct rockchip_grf_value rk3036_defaults[] __initconst = {
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/*
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* Disable auto jtag/sdmmc switching that causes issues with the
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* clock-framework and the mmc controllers making them unreliable.
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*/
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{ "jtag switching", RK3036_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 11) },
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};
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static const struct rockchip_grf_info rk3036_grf __initconst = {
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.values = rk3036_defaults,
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.num_values = ARRAY_SIZE(rk3036_defaults),
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};
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#define RK3128_GRF_SOC_CON0 0x140
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static const struct rockchip_grf_value rk3128_defaults[] __initconst = {
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{ "jtag switching", RK3128_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 8) },
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};
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static const struct rockchip_grf_info rk3128_grf __initconst = {
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.values = rk3128_defaults,
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.num_values = ARRAY_SIZE(rk3128_defaults),
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};
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#define RK3228_GRF_SOC_CON6 0x418
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static const struct rockchip_grf_value rk3228_defaults[] __initconst = {
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{ "jtag switching", RK3228_GRF_SOC_CON6, HIWORD_UPDATE(0, 1, 8) },
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};
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static const struct rockchip_grf_info rk3228_grf __initconst = {
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.values = rk3228_defaults,
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.num_values = ARRAY_SIZE(rk3228_defaults),
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};
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#define RK3288_GRF_SOC_CON0 0x244
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#define RK3288_GRF_SOC_CON2 0x24c
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static const struct rockchip_grf_value rk3288_defaults[] __initconst = {
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{ "jtag switching", RK3288_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 12) },
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{ "pwm select", RK3288_GRF_SOC_CON2, HIWORD_UPDATE(1, 1, 0) },
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};
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static const struct rockchip_grf_info rk3288_grf __initconst = {
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.values = rk3288_defaults,
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.num_values = ARRAY_SIZE(rk3288_defaults),
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};
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#define RK3328_GRF_SOC_CON4 0x410
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static const struct rockchip_grf_value rk3328_defaults[] __initconst = {
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{ "jtag switching", RK3328_GRF_SOC_CON4, HIWORD_UPDATE(0, 1, 12) },
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};
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static const struct rockchip_grf_info rk3328_grf __initconst = {
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.values = rk3328_defaults,
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.num_values = ARRAY_SIZE(rk3328_defaults),
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};
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#define RK3368_GRF_SOC_CON15 0x43c
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static const struct rockchip_grf_value rk3368_defaults[] __initconst = {
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{ "jtag switching", RK3368_GRF_SOC_CON15, HIWORD_UPDATE(0, 1, 13) },
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};
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static const struct rockchip_grf_info rk3368_grf __initconst = {
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.values = rk3368_defaults,
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.num_values = ARRAY_SIZE(rk3368_defaults),
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};
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#define RK3399_GRF_SOC_CON7 0xe21c
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static const struct rockchip_grf_value rk3399_defaults[] __initconst = {
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{ "jtag switching", RK3399_GRF_SOC_CON7, HIWORD_UPDATE(0, 1, 12) },
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};
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static const struct rockchip_grf_info rk3399_grf __initconst = {
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.values = rk3399_defaults,
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.num_values = ARRAY_SIZE(rk3399_defaults),
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};
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#define RK3566_GRF_USB3OTG0_CON1 0x0104
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static const struct rockchip_grf_value rk3566_defaults[] __initconst = {
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{ "usb3otg port switch", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(0, 1, 12) },
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{ "usb3otg clock switch", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(1, 1, 7) },
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{ "usb3otg disable usb3", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(1, 1, 0) },
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};
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static const struct rockchip_grf_info rk3566_pipegrf __initconst = {
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.values = rk3566_defaults,
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.num_values = ARRAY_SIZE(rk3566_defaults),
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};
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static const struct of_device_id rockchip_grf_dt_match[] __initconst = {
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{
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.compatible = "rockchip,rk3036-grf",
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.data = (void *)&rk3036_grf,
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}, {
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.compatible = "rockchip,rk3128-grf",
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.data = (void *)&rk3128_grf,
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}, {
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.compatible = "rockchip,rk3228-grf",
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.data = (void *)&rk3228_grf,
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}, {
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.compatible = "rockchip,rk3288-grf",
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.data = (void *)&rk3288_grf,
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}, {
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.compatible = "rockchip,rk3328-grf",
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.data = (void *)&rk3328_grf,
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}, {
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.compatible = "rockchip,rk3368-grf",
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.data = (void *)&rk3368_grf,
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}, {
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.compatible = "rockchip,rk3399-grf",
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.data = (void *)&rk3399_grf,
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}, {
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.compatible = "rockchip,rk3566-pipe-grf",
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.data = (void *)&rk3566_pipegrf,
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},
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{ /* sentinel */ },
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};
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static int __init rockchip_grf_init(void)
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{
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const struct rockchip_grf_info *grf_info;
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const struct of_device_id *match;
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struct device_node *np;
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struct regmap *grf;
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int ret, i;
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np = of_find_matching_node_and_match(NULL, rockchip_grf_dt_match,
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&match);
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if (!np)
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return -ENODEV;
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if (!match || !match->data) {
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pr_err("%s: missing grf data\n", __func__);
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of_node_put(np);
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return -EINVAL;
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}
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grf_info = match->data;
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grf = syscon_node_to_regmap(np);
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of_node_put(np);
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if (IS_ERR(grf)) {
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pr_err("%s: could not get grf syscon\n", __func__);
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return PTR_ERR(grf);
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}
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for (i = 0; i < grf_info->num_values; i++) {
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const struct rockchip_grf_value *val = &grf_info->values[i];
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pr_debug("%s: adjusting %s in %#6x to %#10x\n", __func__,
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val->desc, val->reg, val->val);
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ret = regmap_write(grf, val->reg, val->val);
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if (ret < 0)
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pr_err("%s: write to %#6x failed with %d\n",
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__func__, val->reg, ret);
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}
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return 0;
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}
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postcore_initcall(rockchip_grf_init);
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