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![Philipp Hortmann](/assets/img/avatar_default.png)
Fix name of a macro that uses CamelCase which is not accepted by checkpatch.pl Signed-off-by: Philipp Hortmann <philipp.g.hortmann@gmail.com> Link: https://lore.kernel.org/r/b8d4b72ddfdefb6b8a73fb95f6851e0f365118ba.1657657918.git.philipp.g.hortmann@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
830 lines
20 KiB
C
830 lines
20 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
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* All rights reserved.
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*
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* Purpose: Provide functions to setup NIC operation mode
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* Functions:
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* s_vSafeResetTx - Rest Tx
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* CARDvSetRSPINF - Set RSPINF
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* CARDvUpdateBasicTopRate - Update BasicTopRate
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* CARDbAddBasicRate - Add to BasicRateSet
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* CARDbIsOFDMinBasicRate - Check if any OFDM rate is in BasicRateSet
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* CARDqGetTSFOffset - Calculate TSFOffset
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* vt6655_get_current_tsf - Read Current NIC TSF counter
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* CARDqGetNextTBTT - Calculate Next Beacon TSF counter
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* CARDvSetFirstNextTBTT - Set NIC Beacon time
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* CARDvUpdateNextTBTT - Sync. NIC Beacon time
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* CARDbRadioPowerOff - Turn Off NIC Radio Power
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*
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* Revision History:
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* 06-10-2003 Bryan YC Fan: Re-write codes to support VT3253 spec.
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* 08-26-2003 Kyle Hsu: Modify the definition type of iobase.
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* 09-01-2003 Bryan YC Fan: Add vUpdateIFS().
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*
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*/
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#include "card.h"
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#include "baseband.h"
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#include "mac.h"
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#include "desc.h"
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#include "rf.h"
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#include "power.h"
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/*--------------------- Static Definitions -------------------------*/
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#define C_SIFS_A 16 /* micro sec. */
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#define C_SIFS_BG 10
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#define C_EIFS 80 /* micro sec. */
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#define C_SLOT_SHORT 9 /* micro sec. */
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#define C_SLOT_LONG 20
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#define C_CWMIN_A 15 /* slot time */
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#define C_CWMIN_B 31
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#define C_CWMAX 1023 /* slot time */
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#define WAIT_BEACON_TX_DOWN_TMO 3 /* Times */
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/*--------------------- Static Variables --------------------------*/
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static const unsigned short cwRXBCNTSFOff[MAX_RATE] = {
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17, 17, 17, 17, 34, 23, 17, 11, 8, 5, 4, 3};
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/*--------------------- Static Functions --------------------------*/
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static void s_vCalculateOFDMRParameter(unsigned char rate, u8 bb_type,
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unsigned char *pbyTxRate,
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unsigned char *pbyRsvTime);
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/*--------------------- Export Functions --------------------------*/
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/*
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* Description: Calculate TxRate and RsvTime fields for RSPINF in OFDM mode.
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*
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* Parameters:
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* In:
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* wRate - Tx Rate
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* byPktType - Tx Packet type
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* Out:
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* pbyTxRate - pointer to RSPINF TxRate field
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* pbyRsvTime - pointer to RSPINF RsvTime field
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*
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* Return Value: none
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*/
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static void s_vCalculateOFDMRParameter(unsigned char rate,
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u8 bb_type,
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unsigned char *pbyTxRate,
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unsigned char *pbyRsvTime)
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{
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switch (rate) {
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case RATE_6M:
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if (bb_type == BB_TYPE_11A) { /* 5GHZ */
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*pbyTxRate = 0x9B;
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*pbyRsvTime = 44;
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} else {
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*pbyTxRate = 0x8B;
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*pbyRsvTime = 50;
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}
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break;
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case RATE_9M:
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if (bb_type == BB_TYPE_11A) { /* 5GHZ */
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*pbyTxRate = 0x9F;
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*pbyRsvTime = 36;
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} else {
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*pbyTxRate = 0x8F;
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*pbyRsvTime = 42;
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}
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break;
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case RATE_12M:
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if (bb_type == BB_TYPE_11A) { /* 5GHZ */
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*pbyTxRate = 0x9A;
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*pbyRsvTime = 32;
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} else {
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*pbyTxRate = 0x8A;
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*pbyRsvTime = 38;
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}
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break;
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case RATE_18M:
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if (bb_type == BB_TYPE_11A) { /* 5GHZ */
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*pbyTxRate = 0x9E;
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*pbyRsvTime = 28;
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} else {
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*pbyTxRate = 0x8E;
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*pbyRsvTime = 34;
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}
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break;
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case RATE_36M:
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if (bb_type == BB_TYPE_11A) { /* 5GHZ */
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*pbyTxRate = 0x9D;
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*pbyRsvTime = 24;
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} else {
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*pbyTxRate = 0x8D;
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*pbyRsvTime = 30;
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}
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break;
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case RATE_48M:
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if (bb_type == BB_TYPE_11A) { /* 5GHZ */
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*pbyTxRate = 0x98;
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*pbyRsvTime = 24;
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} else {
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*pbyTxRate = 0x88;
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*pbyRsvTime = 30;
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}
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break;
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case RATE_54M:
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if (bb_type == BB_TYPE_11A) { /* 5GHZ */
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*pbyTxRate = 0x9C;
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*pbyRsvTime = 24;
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} else {
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*pbyTxRate = 0x8C;
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*pbyRsvTime = 30;
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}
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break;
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case RATE_24M:
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default:
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if (bb_type == BB_TYPE_11A) { /* 5GHZ */
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*pbyTxRate = 0x99;
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*pbyRsvTime = 28;
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} else {
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*pbyTxRate = 0x89;
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*pbyRsvTime = 34;
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}
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break;
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}
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}
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/*--------------------- Export Functions --------------------------*/
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/*
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* Description: Update IFS
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*
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* Parameters:
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* In:
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* priv - The adapter to be set
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* Out:
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* none
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*
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* Return Value: None.
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*/
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bool CARDbSetPhyParameter(struct vnt_private *priv, u8 bb_type)
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{
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unsigned char byCWMaxMin = 0;
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unsigned char bySlot = 0;
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unsigned char bySIFS = 0;
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unsigned char byDIFS = 0;
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int i;
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/* Set SIFS, DIFS, EIFS, SlotTime, CwMin */
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if (bb_type == BB_TYPE_11A) {
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MACvSetBBType(priv->port_offset, BB_TYPE_11A);
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bb_write_embedded(priv, 0x88, 0x03);
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bySlot = C_SLOT_SHORT;
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bySIFS = C_SIFS_A;
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byDIFS = C_SIFS_A + 2 * C_SLOT_SHORT;
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byCWMaxMin = 0xA4;
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} else if (bb_type == BB_TYPE_11B) {
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MACvSetBBType(priv->port_offset, BB_TYPE_11B);
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bb_write_embedded(priv, 0x88, 0x02);
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bySlot = C_SLOT_LONG;
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bySIFS = C_SIFS_BG;
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byDIFS = C_SIFS_BG + 2 * C_SLOT_LONG;
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byCWMaxMin = 0xA5;
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} else { /* PK_TYPE_11GA & PK_TYPE_11GB */
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MACvSetBBType(priv->port_offset, BB_TYPE_11G);
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bb_write_embedded(priv, 0x88, 0x08);
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bySIFS = C_SIFS_BG;
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if (priv->short_slot_time) {
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bySlot = C_SLOT_SHORT;
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byDIFS = C_SIFS_BG + 2 * C_SLOT_SHORT;
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} else {
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bySlot = C_SLOT_LONG;
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byDIFS = C_SIFS_BG + 2 * C_SLOT_LONG;
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}
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byCWMaxMin = 0xa4;
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for (i = RATE_54M; i >= RATE_6M; i--) {
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if (priv->basic_rates & ((u32)(0x1 << i))) {
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byCWMaxMin |= 0x1;
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break;
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}
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}
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}
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if (priv->byRFType == RF_RFMD2959) {
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/*
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* bcs TX_PE will reserve 3 us hardware's processing
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* time here is 2 us.
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*/
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bySIFS -= 3;
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byDIFS -= 3;
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/*
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* TX_PE will reserve 3 us for MAX2829 A mode only, it is for
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* better TX throughput; MAC will need 2 us to process, so the
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* SIFS, DIFS can be shorter by 2 us.
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*/
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}
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if (priv->bySIFS != bySIFS) {
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priv->bySIFS = bySIFS;
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iowrite8(priv->bySIFS, priv->port_offset + MAC_REG_SIFS);
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}
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if (priv->byDIFS != byDIFS) {
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priv->byDIFS = byDIFS;
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iowrite8(priv->byDIFS, priv->port_offset + MAC_REG_DIFS);
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}
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if (priv->byEIFS != C_EIFS) {
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priv->byEIFS = C_EIFS;
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iowrite8(priv->byEIFS, priv->port_offset + MAC_REG_EIFS);
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}
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if (priv->bySlot != bySlot) {
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priv->bySlot = bySlot;
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iowrite8(priv->bySlot, priv->port_offset + MAC_REG_SLOT);
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bb_set_short_slot_time(priv);
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}
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if (priv->byCWMaxMin != byCWMaxMin) {
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priv->byCWMaxMin = byCWMaxMin;
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iowrite8(priv->byCWMaxMin, priv->port_offset + MAC_REG_CWMAXMIN0);
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}
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priv->byPacketType = CARDbyGetPktType(priv);
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CARDvSetRSPINF(priv, bb_type);
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return true;
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}
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/*
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* Description: Sync. TSF counter to BSS
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* Get TSF offset and write to HW
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*
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* Parameters:
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* In:
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* priv - The adapter to be sync.
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* byRxRate - data rate of receive beacon
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* qwBSSTimestamp - Rx BCN's TSF
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* qwLocalTSF - Local TSF
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* Out:
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* none
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*
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* Return Value: none
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*/
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bool CARDbUpdateTSF(struct vnt_private *priv, unsigned char byRxRate,
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u64 qwBSSTimestamp)
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{
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u64 local_tsf;
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u64 qwTSFOffset = 0;
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local_tsf = vt6655_get_current_tsf(priv);
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if (qwBSSTimestamp != local_tsf) {
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qwTSFOffset = CARDqGetTSFOffset(byRxRate, qwBSSTimestamp,
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local_tsf);
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/* adjust TSF, HW's TSF add TSF Offset reg */
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qwTSFOffset = le64_to_cpu(qwTSFOffset);
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iowrite32((u32)qwTSFOffset, priv->port_offset + MAC_REG_TSFOFST);
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iowrite32((u32)(qwTSFOffset >> 32), priv->port_offset + MAC_REG_TSFOFST + 4);
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vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_TSFSYNCEN);
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}
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return true;
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}
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/*
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* Description: Set NIC TSF counter for first Beacon time
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* Get NEXTTBTT from adjusted TSF and Beacon Interval
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*
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* Parameters:
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* In:
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* priv - The adapter to be set.
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* wBeaconInterval - Beacon Interval
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* Out:
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* none
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*
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* Return Value: true if succeed; otherwise false
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*/
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bool CARDbSetBeaconPeriod(struct vnt_private *priv,
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unsigned short wBeaconInterval)
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{
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u64 qwNextTBTT;
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qwNextTBTT = vt6655_get_current_tsf(priv); /* Get Local TSF counter */
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qwNextTBTT = CARDqGetNextTBTT(qwNextTBTT, wBeaconInterval);
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/* set HW beacon interval */
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iowrite16(wBeaconInterval, priv->port_offset + MAC_REG_BI);
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priv->wBeaconInterval = wBeaconInterval;
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/* Set NextTBTT */
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qwNextTBTT = le64_to_cpu(qwNextTBTT);
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iowrite32((u32)qwNextTBTT, priv->port_offset + MAC_REG_NEXTTBTT);
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iowrite32((u32)(qwNextTBTT >> 32), priv->port_offset + MAC_REG_NEXTTBTT + 4);
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vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
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return true;
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}
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/*
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* Description: Turn off Radio power
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*
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* Parameters:
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* In:
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* priv - The adapter to be turned off
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* Out:
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* none
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*
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*/
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void CARDbRadioPowerOff(struct vnt_private *priv)
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{
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if (priv->radio_off)
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return;
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switch (priv->byRFType) {
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case RF_RFMD2959:
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vt6655_mac_word_reg_bits_off(priv->port_offset, MAC_REG_SOFTPWRCTL,
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SOFTPWRCTL_TXPEINV);
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vt6655_mac_word_reg_bits_on(priv->port_offset, MAC_REG_SOFTPWRCTL,
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SOFTPWRCTL_SWPE1);
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break;
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case RF_AIROHA:
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case RF_AL2230S:
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vt6655_mac_word_reg_bits_off(priv->port_offset, MAC_REG_SOFTPWRCTL,
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SOFTPWRCTL_SWPE2);
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vt6655_mac_word_reg_bits_off(priv->port_offset, MAC_REG_SOFTPWRCTL,
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SOFTPWRCTL_SWPE3);
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break;
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}
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vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_RXON);
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bb_set_deep_sleep(priv, priv->local_id);
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priv->radio_off = true;
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pr_debug("chester power off\n");
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vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_GPIOCTL0, LED_ACTSET); /* LED issue */
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}
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void CARDvSafeResetTx(struct vnt_private *priv)
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{
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unsigned int uu;
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struct vnt_tx_desc *pCurrTD;
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/* initialize TD index */
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priv->apTailTD[0] = &priv->apTD0Rings[0];
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priv->apCurrTD[0] = &priv->apTD0Rings[0];
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priv->apTailTD[1] = &priv->apTD1Rings[0];
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priv->apCurrTD[1] = &priv->apTD1Rings[0];
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for (uu = 0; uu < TYPE_MAXTD; uu++)
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priv->iTDUsed[uu] = 0;
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for (uu = 0; uu < priv->opts.tx_descs[0]; uu++) {
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pCurrTD = &priv->apTD0Rings[uu];
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pCurrTD->td0.owner = OWNED_BY_HOST;
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/* init all Tx Packet pointer to NULL */
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}
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for (uu = 0; uu < priv->opts.tx_descs[1]; uu++) {
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pCurrTD = &priv->apTD1Rings[uu];
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pCurrTD->td0.owner = OWNED_BY_HOST;
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/* init all Tx Packet pointer to NULL */
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}
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/* set MAC TD pointer */
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MACvSetCurrTXDescAddr(TYPE_TXDMA0, priv, priv->td0_pool_dma);
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MACvSetCurrTXDescAddr(TYPE_AC0DMA, priv, priv->td1_pool_dma);
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/* set MAC Beacon TX pointer */
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iowrite32((u32)priv->tx_beacon_dma, priv->port_offset + MAC_REG_BCNDMAPTR);
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}
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/*
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* Description:
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* Reset Rx
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*
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* Parameters:
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* In:
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* priv - Pointer to the adapter
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* Out:
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* none
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*
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* Return Value: none
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*/
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void CARDvSafeResetRx(struct vnt_private *priv)
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{
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unsigned int uu;
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struct vnt_rx_desc *pDesc;
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/* initialize RD index */
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priv->pCurrRD[0] = &priv->aRD0Ring[0];
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priv->pCurrRD[1] = &priv->aRD1Ring[0];
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/* init state, all RD is chip's */
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for (uu = 0; uu < priv->opts.rx_descs0; uu++) {
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pDesc = &priv->aRD0Ring[uu];
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pDesc->rd0.res_count = cpu_to_le16(priv->rx_buf_sz);
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pDesc->rd0.owner = OWNED_BY_NIC;
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pDesc->rd1.req_count = cpu_to_le16(priv->rx_buf_sz);
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}
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/* init state, all RD is chip's */
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for (uu = 0; uu < priv->opts.rx_descs1; uu++) {
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pDesc = &priv->aRD1Ring[uu];
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pDesc->rd0.res_count = cpu_to_le16(priv->rx_buf_sz);
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pDesc->rd0.owner = OWNED_BY_NIC;
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pDesc->rd1.req_count = cpu_to_le16(priv->rx_buf_sz);
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}
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/* set perPkt mode */
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iowrite32(RX_PERPKT, priv->port_offset + MAC_REG_RXDMACTL0);
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iowrite32(RX_PERPKT, priv->port_offset + MAC_REG_RXDMACTL1);
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/* set MAC RD pointer */
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MACvSetCurrRx0DescAddr(priv, priv->rd0_pool_dma);
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MACvSetCurrRx1DescAddr(priv, priv->rd1_pool_dma);
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}
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/*
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* Description: Get response Control frame rate in CCK mode
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*
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* Parameters:
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* In:
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* priv - The adapter to be set
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* wRateIdx - Receiving data rate
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* Out:
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* none
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*
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* Return Value: response Control frame rate
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*/
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static unsigned short CARDwGetCCKControlRate(struct vnt_private *priv,
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unsigned short wRateIdx)
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{
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unsigned int ui = (unsigned int)wRateIdx;
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while (ui > RATE_1M) {
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if (priv->basic_rates & ((u32)0x1 << ui))
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return (unsigned short)ui;
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ui--;
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}
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return (unsigned short)RATE_1M;
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}
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/*
|
|
* Description: Get response Control frame rate in OFDM mode
|
|
*
|
|
* Parameters:
|
|
* In:
|
|
* priv - The adapter to be set
|
|
* wRateIdx - Receiving data rate
|
|
* Out:
|
|
* none
|
|
*
|
|
* Return Value: response Control frame rate
|
|
*/
|
|
static unsigned short CARDwGetOFDMControlRate(struct vnt_private *priv,
|
|
unsigned short wRateIdx)
|
|
{
|
|
unsigned int ui = (unsigned int)wRateIdx;
|
|
|
|
pr_debug("BASIC RATE: %X\n", priv->basic_rates);
|
|
|
|
if (!CARDbIsOFDMinBasicRate((void *)priv)) {
|
|
pr_debug("%s:(NO OFDM) %d\n", __func__, wRateIdx);
|
|
if (wRateIdx > RATE_24M)
|
|
wRateIdx = RATE_24M;
|
|
return wRateIdx;
|
|
}
|
|
while (ui > RATE_11M) {
|
|
if (priv->basic_rates & ((u32)0x1 << ui)) {
|
|
pr_debug("%s : %d\n", __func__, ui);
|
|
return (unsigned short)ui;
|
|
}
|
|
ui--;
|
|
}
|
|
pr_debug("%s: 6M\n", __func__);
|
|
return (unsigned short)RATE_24M;
|
|
}
|
|
|
|
/*
|
|
* Description: Set RSPINF
|
|
*
|
|
* Parameters:
|
|
* In:
|
|
* priv - The adapter to be set
|
|
* Out:
|
|
* none
|
|
*
|
|
* Return Value: None.
|
|
*/
|
|
void CARDvSetRSPINF(struct vnt_private *priv, u8 bb_type)
|
|
{
|
|
union vnt_phy_field_swap phy;
|
|
unsigned char byTxRate, byRsvTime; /* For OFDM */
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&priv->lock, flags);
|
|
|
|
/* Set to Page1 */
|
|
MACvSelectPage1(priv->port_offset);
|
|
|
|
/* RSPINF_b_1 */
|
|
vnt_get_phy_field(priv, 14,
|
|
CARDwGetCCKControlRate(priv, RATE_1M),
|
|
PK_TYPE_11B, &phy.field_read);
|
|
|
|
/* swap over to get correct write order */
|
|
swap(phy.swap[0], phy.swap[1]);
|
|
|
|
iowrite32(phy.field_write, priv->port_offset + MAC_REG_RSPINF_B_1);
|
|
|
|
/* RSPINF_b_2 */
|
|
vnt_get_phy_field(priv, 14,
|
|
CARDwGetCCKControlRate(priv, RATE_2M),
|
|
PK_TYPE_11B, &phy.field_read);
|
|
|
|
swap(phy.swap[0], phy.swap[1]);
|
|
|
|
iowrite32(phy.field_write, priv->port_offset + MAC_REG_RSPINF_B_2);
|
|
|
|
/* RSPINF_b_5 */
|
|
vnt_get_phy_field(priv, 14,
|
|
CARDwGetCCKControlRate(priv, RATE_5M),
|
|
PK_TYPE_11B, &phy.field_read);
|
|
|
|
swap(phy.swap[0], phy.swap[1]);
|
|
|
|
iowrite32(phy.field_write, priv->port_offset + MAC_REG_RSPINF_B_5);
|
|
|
|
/* RSPINF_b_11 */
|
|
vnt_get_phy_field(priv, 14,
|
|
CARDwGetCCKControlRate(priv, RATE_11M),
|
|
PK_TYPE_11B, &phy.field_read);
|
|
|
|
swap(phy.swap[0], phy.swap[1]);
|
|
|
|
iowrite32(phy.field_write, priv->port_offset + MAC_REG_RSPINF_B_11);
|
|
|
|
/* RSPINF_a_6 */
|
|
s_vCalculateOFDMRParameter(RATE_6M,
|
|
bb_type,
|
|
&byTxRate,
|
|
&byRsvTime);
|
|
iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_6);
|
|
/* RSPINF_a_9 */
|
|
s_vCalculateOFDMRParameter(RATE_9M,
|
|
bb_type,
|
|
&byTxRate,
|
|
&byRsvTime);
|
|
iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_9);
|
|
/* RSPINF_a_12 */
|
|
s_vCalculateOFDMRParameter(RATE_12M,
|
|
bb_type,
|
|
&byTxRate,
|
|
&byRsvTime);
|
|
iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_12);
|
|
/* RSPINF_a_18 */
|
|
s_vCalculateOFDMRParameter(RATE_18M,
|
|
bb_type,
|
|
&byTxRate,
|
|
&byRsvTime);
|
|
iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_18);
|
|
/* RSPINF_a_24 */
|
|
s_vCalculateOFDMRParameter(RATE_24M,
|
|
bb_type,
|
|
&byTxRate,
|
|
&byRsvTime);
|
|
iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_24);
|
|
/* RSPINF_a_36 */
|
|
s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv,
|
|
RATE_36M),
|
|
bb_type,
|
|
&byTxRate,
|
|
&byRsvTime);
|
|
iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_36);
|
|
/* RSPINF_a_48 */
|
|
s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv,
|
|
RATE_48M),
|
|
bb_type,
|
|
&byTxRate,
|
|
&byRsvTime);
|
|
iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_48);
|
|
/* RSPINF_a_54 */
|
|
s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv,
|
|
RATE_54M),
|
|
bb_type,
|
|
&byTxRate,
|
|
&byRsvTime);
|
|
iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_54);
|
|
/* RSPINF_a_72 */
|
|
s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv,
|
|
RATE_54M),
|
|
bb_type,
|
|
&byTxRate,
|
|
&byRsvTime);
|
|
iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_72);
|
|
/* Set to Page0 */
|
|
MACvSelectPage0(priv->port_offset);
|
|
|
|
spin_unlock_irqrestore(&priv->lock, flags);
|
|
}
|
|
|
|
void CARDvUpdateBasicTopRate(struct vnt_private *priv)
|
|
{
|
|
unsigned char byTopOFDM = RATE_24M, byTopCCK = RATE_1M;
|
|
unsigned char ii;
|
|
|
|
/* Determines the highest basic rate. */
|
|
for (ii = RATE_54M; ii >= RATE_6M; ii--) {
|
|
if ((priv->basic_rates) & ((u32)(1 << ii))) {
|
|
byTopOFDM = ii;
|
|
break;
|
|
}
|
|
}
|
|
priv->byTopOFDMBasicRate = byTopOFDM;
|
|
|
|
for (ii = RATE_11M;; ii--) {
|
|
if ((priv->basic_rates) & ((u32)(1 << ii))) {
|
|
byTopCCK = ii;
|
|
break;
|
|
}
|
|
if (ii == RATE_1M)
|
|
break;
|
|
}
|
|
priv->byTopCCKBasicRate = byTopCCK;
|
|
}
|
|
|
|
bool CARDbIsOFDMinBasicRate(struct vnt_private *priv)
|
|
{
|
|
int ii;
|
|
|
|
for (ii = RATE_54M; ii >= RATE_6M; ii--) {
|
|
if ((priv->basic_rates) & ((u32)BIT(ii)))
|
|
return true;
|
|
}
|
|
return false;
|
|
}
|
|
|
|
unsigned char CARDbyGetPktType(struct vnt_private *priv)
|
|
{
|
|
if (priv->byBBType == BB_TYPE_11A || priv->byBBType == BB_TYPE_11B)
|
|
return (unsigned char)priv->byBBType;
|
|
else if (CARDbIsOFDMinBasicRate((void *)priv))
|
|
return PK_TYPE_11GA;
|
|
else
|
|
return PK_TYPE_11GB;
|
|
}
|
|
|
|
/*
|
|
* Description: Calculate TSF offset of two TSF input
|
|
* Get TSF Offset from RxBCN's TSF and local TSF
|
|
*
|
|
* Parameters:
|
|
* In:
|
|
* priv - The adapter to be sync.
|
|
* qwTSF1 - Rx BCN's TSF
|
|
* qwTSF2 - Local TSF
|
|
* Out:
|
|
* none
|
|
*
|
|
* Return Value: TSF Offset value
|
|
*/
|
|
u64 CARDqGetTSFOffset(unsigned char byRxRate, u64 qwTSF1, u64 qwTSF2)
|
|
{
|
|
unsigned short wRxBcnTSFOffst;
|
|
|
|
wRxBcnTSFOffst = cwRXBCNTSFOff[byRxRate % MAX_RATE];
|
|
|
|
qwTSF2 += (u64)wRxBcnTSFOffst;
|
|
|
|
return qwTSF1 - qwTSF2;
|
|
}
|
|
|
|
/*
|
|
* Description: Read NIC TSF counter
|
|
* Get local TSF counter
|
|
*
|
|
* Parameters:
|
|
* In:
|
|
* priv - The adapter to be read
|
|
* Out:
|
|
* none
|
|
*
|
|
* Return Value: Current TSF counter
|
|
*/
|
|
u64 vt6655_get_current_tsf(struct vnt_private *priv)
|
|
{
|
|
void __iomem *iobase = priv->port_offset;
|
|
unsigned short ww;
|
|
unsigned char data;
|
|
u32 low, high;
|
|
|
|
vt6655_mac_reg_bits_on(iobase, MAC_REG_TFTCTL, TFTCTL_TSFCNTRRD);
|
|
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
|
|
data = ioread8(iobase + MAC_REG_TFTCTL);
|
|
if (!(data & TFTCTL_TSFCNTRRD))
|
|
break;
|
|
}
|
|
if (ww == W_MAX_TIMEOUT)
|
|
return 0;
|
|
low = ioread32(iobase + MAC_REG_TSFCNTR);
|
|
high = ioread32(iobase + MAC_REG_TSFCNTR + 4);
|
|
return le64_to_cpu(low + ((u64)high << 32));
|
|
}
|
|
|
|
/*
|
|
* Description: Read NIC TSF counter
|
|
* Get NEXTTBTT from adjusted TSF and Beacon Interval
|
|
*
|
|
* Parameters:
|
|
* In:
|
|
* qwTSF - Current TSF counter
|
|
* wbeaconInterval - Beacon Interval
|
|
* Out:
|
|
* qwCurrTSF - Current TSF counter
|
|
*
|
|
* Return Value: TSF value of next Beacon
|
|
*/
|
|
u64 CARDqGetNextTBTT(u64 qwTSF, unsigned short wBeaconInterval)
|
|
{
|
|
u32 beacon_int;
|
|
|
|
beacon_int = wBeaconInterval * 1024;
|
|
if (beacon_int) {
|
|
do_div(qwTSF, beacon_int);
|
|
qwTSF += 1;
|
|
qwTSF *= beacon_int;
|
|
}
|
|
|
|
return qwTSF;
|
|
}
|
|
|
|
/*
|
|
* Description: Set NIC TSF counter for first Beacon time
|
|
* Get NEXTTBTT from adjusted TSF and Beacon Interval
|
|
*
|
|
* Parameters:
|
|
* In:
|
|
* iobase - IO Base
|
|
* wBeaconInterval - Beacon Interval
|
|
* Out:
|
|
* none
|
|
*
|
|
* Return Value: none
|
|
*/
|
|
void CARDvSetFirstNextTBTT(struct vnt_private *priv,
|
|
unsigned short wBeaconInterval)
|
|
{
|
|
void __iomem *iobase = priv->port_offset;
|
|
u64 qwNextTBTT;
|
|
|
|
qwNextTBTT = vt6655_get_current_tsf(priv); /* Get Local TSF counter */
|
|
|
|
qwNextTBTT = CARDqGetNextTBTT(qwNextTBTT, wBeaconInterval);
|
|
/* Set NextTBTT */
|
|
qwNextTBTT = le64_to_cpu(qwNextTBTT);
|
|
iowrite32((u32)qwNextTBTT, iobase + MAC_REG_NEXTTBTT);
|
|
iowrite32((u32)(qwNextTBTT >> 32), iobase + MAC_REG_NEXTTBTT + 4);
|
|
vt6655_mac_reg_bits_on(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
|
|
}
|
|
|
|
/*
|
|
* Description: Sync NIC TSF counter for Beacon time
|
|
* Get NEXTTBTT and write to HW
|
|
*
|
|
* Parameters:
|
|
* In:
|
|
* priv - The adapter to be set
|
|
* qwTSF - Current TSF counter
|
|
* wBeaconInterval - Beacon Interval
|
|
* Out:
|
|
* none
|
|
*
|
|
* Return Value: none
|
|
*/
|
|
void CARDvUpdateNextTBTT(struct vnt_private *priv, u64 qwTSF,
|
|
unsigned short wBeaconInterval)
|
|
{
|
|
void __iomem *iobase = priv->port_offset;
|
|
|
|
qwTSF = CARDqGetNextTBTT(qwTSF, wBeaconInterval);
|
|
/* Set NextTBTT */
|
|
qwTSF = le64_to_cpu(qwTSF);
|
|
iowrite32((u32)qwTSF, iobase + MAC_REG_NEXTTBTT);
|
|
iowrite32((u32)(qwTSF >> 32), iobase + MAC_REG_NEXTTBTT + 4);
|
|
vt6655_mac_reg_bits_on(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
|
|
pr_debug("Card:Update Next TBTT[%8llx]\n", qwTSF);
|
|
}
|